diff options
Diffstat (limited to 'drivers/net/igb')
-rw-r--r-- | drivers/net/igb/e1000_82575.c | 72 | ||||
-rw-r--r-- | drivers/net/igb/e1000_82575.h | 1 | ||||
-rw-r--r-- | drivers/net/igb/e1000_defines.h | 1 | ||||
-rw-r--r-- | drivers/net/igb/e1000_hw.h | 1 | ||||
-rw-r--r-- | drivers/net/igb/e1000_mac.c | 84 | ||||
-rw-r--r-- | drivers/net/igb/e1000_mac.h | 5 | ||||
-rw-r--r-- | drivers/net/igb/e1000_regs.h | 3 | ||||
-rw-r--r-- | drivers/net/igb/igb_main.c | 30 |
8 files changed, 13 insertions, 184 deletions
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c index e098f234770f..bb823acc7443 100644 --- a/drivers/net/igb/e1000_82575.c +++ b/drivers/net/igb/e1000_82575.c | |||
@@ -850,7 +850,7 @@ void igb_update_mc_addr_list_82575(struct e1000_hw *hw, | |||
850 | for (; mc_addr_count > 0; mc_addr_count--) { | 850 | for (; mc_addr_count > 0; mc_addr_count--) { |
851 | hash_value = igb_hash_mc_addr(hw, mc_addr_list); | 851 | hash_value = igb_hash_mc_addr(hw, mc_addr_list); |
852 | hw_dbg("Hash value = 0x%03X\n", hash_value); | 852 | hw_dbg("Hash value = 0x%03X\n", hash_value); |
853 | hw->mac.ops.mta_set(hw, hash_value); | 853 | igb_mta_set(hw, hash_value); |
854 | mc_addr_list += ETH_ALEN; | 854 | mc_addr_list += ETH_ALEN; |
855 | } | 855 | } |
856 | } | 856 | } |
@@ -1136,6 +1136,12 @@ static s32 igb_setup_fiber_serdes_link_82575(struct e1000_hw *hw) | |||
1136 | E1000_PCS_LCTL_FORCE_LINK; /* Force Link */ | 1136 | E1000_PCS_LCTL_FORCE_LINK; /* Force Link */ |
1137 | hw_dbg("Configuring Forced Link; PCS_LCTL = 0x%08X\n", reg); | 1137 | hw_dbg("Configuring Forced Link; PCS_LCTL = 0x%08X\n", reg); |
1138 | } | 1138 | } |
1139 | |||
1140 | if (hw->mac.type == e1000_82576) { | ||
1141 | reg |= E1000_PCS_LCTL_FORCE_FCTRL; | ||
1142 | igb_force_mac_fc(hw); | ||
1143 | } | ||
1144 | |||
1139 | wr32(E1000_PCS_LCTL, reg); | 1145 | wr32(E1000_PCS_LCTL, reg); |
1140 | 1146 | ||
1141 | return 0; | 1147 | return 0; |
@@ -1232,70 +1238,6 @@ out: | |||
1232 | } | 1238 | } |
1233 | 1239 | ||
1234 | /** | 1240 | /** |
1235 | * igb_translate_register_82576 - Translate the proper register offset | ||
1236 | * @reg: e1000 register to be read | ||
1237 | * | ||
1238 | * Registers in 82576 are located in different offsets than other adapters | ||
1239 | * even though they function in the same manner. This function takes in | ||
1240 | * the name of the register to read and returns the correct offset for | ||
1241 | * 82576 silicon. | ||
1242 | **/ | ||
1243 | u32 igb_translate_register_82576(u32 reg) | ||
1244 | { | ||
1245 | /* | ||
1246 | * Some of the Kawela registers are located at different | ||
1247 | * offsets than they are in older adapters. | ||
1248 | * Despite the difference in location, the registers | ||
1249 | * function in the same manner. | ||
1250 | */ | ||
1251 | switch (reg) { | ||
1252 | case E1000_TDBAL(0): | ||
1253 | reg = 0x0E000; | ||
1254 | break; | ||
1255 | case E1000_TDBAH(0): | ||
1256 | reg = 0x0E004; | ||
1257 | break; | ||
1258 | case E1000_TDLEN(0): | ||
1259 | reg = 0x0E008; | ||
1260 | break; | ||
1261 | case E1000_TDH(0): | ||
1262 | reg = 0x0E010; | ||
1263 | break; | ||
1264 | case E1000_TDT(0): | ||
1265 | reg = 0x0E018; | ||
1266 | break; | ||
1267 | case E1000_TXDCTL(0): | ||
1268 | reg = 0x0E028; | ||
1269 | break; | ||
1270 | case E1000_RDBAL(0): | ||
1271 | reg = 0x0C000; | ||
1272 | break; | ||
1273 | case E1000_RDBAH(0): | ||
1274 | reg = 0x0C004; | ||
1275 | break; | ||
1276 | case E1000_RDLEN(0): | ||
1277 | reg = 0x0C008; | ||
1278 | break; | ||
1279 | case E1000_RDH(0): | ||
1280 | reg = 0x0C010; | ||
1281 | break; | ||
1282 | case E1000_RDT(0): | ||
1283 | reg = 0x0C018; | ||
1284 | break; | ||
1285 | case E1000_RXDCTL(0): | ||
1286 | reg = 0x0C028; | ||
1287 | break; | ||
1288 | case E1000_SRRCTL(0): | ||
1289 | reg = 0x0C00C; | ||
1290 | break; | ||
1291 | default: | ||
1292 | break; | ||
1293 | } | ||
1294 | |||
1295 | return reg; | ||
1296 | } | ||
1297 | |||
1298 | /** | ||
1299 | * igb_reset_init_script_82575 - Inits HW defaults after reset | 1241 | * igb_reset_init_script_82575 - Inits HW defaults after reset |
1300 | * @hw: pointer to the HW structure | 1242 | * @hw: pointer to the HW structure |
1301 | * | 1243 | * |
diff --git a/drivers/net/igb/e1000_82575.h b/drivers/net/igb/e1000_82575.h index 2f848e578a24..c1928b5efe1f 100644 --- a/drivers/net/igb/e1000_82575.h +++ b/drivers/net/igb/e1000_82575.h | |||
@@ -28,7 +28,6 @@ | |||
28 | #ifndef _E1000_82575_H_ | 28 | #ifndef _E1000_82575_H_ |
29 | #define _E1000_82575_H_ | 29 | #define _E1000_82575_H_ |
30 | 30 | ||
31 | u32 igb_translate_register_82576(u32 reg); | ||
32 | void igb_update_mc_addr_list_82575(struct e1000_hw*, u8*, u32, u32, u32); | 31 | void igb_update_mc_addr_list_82575(struct e1000_hw*, u8*, u32, u32, u32); |
33 | extern void igb_shutdown_fiber_serdes_link_82575(struct e1000_hw *hw); | 32 | extern void igb_shutdown_fiber_serdes_link_82575(struct e1000_hw *hw); |
34 | extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw); | 33 | extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw); |
diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h index afdba3c9073c..ce700689fb57 100644 --- a/drivers/net/igb/e1000_defines.h +++ b/drivers/net/igb/e1000_defines.h | |||
@@ -257,6 +257,7 @@ | |||
257 | #define E1000_PCS_LCTL_FDV_FULL 8 | 257 | #define E1000_PCS_LCTL_FDV_FULL 8 |
258 | #define E1000_PCS_LCTL_FSD 0x10 | 258 | #define E1000_PCS_LCTL_FSD 0x10 |
259 | #define E1000_PCS_LCTL_FORCE_LINK 0x20 | 259 | #define E1000_PCS_LCTL_FORCE_LINK 0x20 |
260 | #define E1000_PCS_LCTL_FORCE_FCTRL 0x80 | ||
260 | #define E1000_PCS_LCTL_AN_ENABLE 0x10000 | 261 | #define E1000_PCS_LCTL_AN_ENABLE 0x10000 |
261 | #define E1000_PCS_LCTL_AN_RESTART 0x20000 | 262 | #define E1000_PCS_LCTL_AN_RESTART 0x20000 |
262 | #define E1000_PCS_LCTL_AN_TIMEOUT 0x40000 | 263 | #define E1000_PCS_LCTL_AN_TIMEOUT 0x40000 |
diff --git a/drivers/net/igb/e1000_hw.h b/drivers/net/igb/e1000_hw.h index 19fa4ee96f2e..a65ccc3095c3 100644 --- a/drivers/net/igb/e1000_hw.h +++ b/drivers/net/igb/e1000_hw.h | |||
@@ -420,7 +420,6 @@ struct e1000_mac_operations { | |||
420 | void (*rar_set)(struct e1000_hw *, u8 *, u32); | 420 | void (*rar_set)(struct e1000_hw *, u8 *, u32); |
421 | s32 (*read_mac_addr)(struct e1000_hw *); | 421 | s32 (*read_mac_addr)(struct e1000_hw *); |
422 | s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *); | 422 | s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *); |
423 | void (*mta_set)(struct e1000_hw *, u32); | ||
424 | }; | 423 | }; |
425 | 424 | ||
426 | struct e1000_phy_operations { | 425 | struct e1000_phy_operations { |
diff --git a/drivers/net/igb/e1000_mac.c b/drivers/net/igb/e1000_mac.c index 20408aa1f916..e18747c70bec 100644 --- a/drivers/net/igb/e1000_mac.c +++ b/drivers/net/igb/e1000_mac.c | |||
@@ -144,34 +144,6 @@ void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value) | |||
144 | } | 144 | } |
145 | 145 | ||
146 | /** | 146 | /** |
147 | * igb_init_rx_addrs - Initialize receive address's | ||
148 | * @hw: pointer to the HW structure | ||
149 | * @rar_count: receive address registers | ||
150 | * | ||
151 | * Setups the receive address registers by setting the base receive address | ||
152 | * register to the devices MAC address and clearing all the other receive | ||
153 | * address registers to 0. | ||
154 | **/ | ||
155 | void igb_init_rx_addrs(struct e1000_hw *hw, u16 rar_count) | ||
156 | { | ||
157 | u32 i; | ||
158 | |||
159 | /* Setup the receive address */ | ||
160 | hw_dbg("Programming MAC Address into RAR[0]\n"); | ||
161 | |||
162 | hw->mac.ops.rar_set(hw, hw->mac.addr, 0); | ||
163 | |||
164 | /* Zero out the other (rar_entry_count - 1) receive addresses */ | ||
165 | hw_dbg("Clearing RAR[1-%u]\n", rar_count-1); | ||
166 | for (i = 1; i < rar_count; i++) { | ||
167 | array_wr32(E1000_RA, (i << 1), 0); | ||
168 | wrfl(); | ||
169 | array_wr32(E1000_RA, ((i << 1) + 1), 0); | ||
170 | wrfl(); | ||
171 | } | ||
172 | } | ||
173 | |||
174 | /** | ||
175 | * igb_check_alt_mac_addr - Check for alternate MAC addr | 147 | * igb_check_alt_mac_addr - Check for alternate MAC addr |
176 | * @hw: pointer to the HW structure | 148 | * @hw: pointer to the HW structure |
177 | * | 149 | * |
@@ -271,7 +243,7 @@ void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index) | |||
271 | * current value is read, the new bit is OR'd in and the new value is | 243 | * current value is read, the new bit is OR'd in and the new value is |
272 | * written back into the register. | 244 | * written back into the register. |
273 | **/ | 245 | **/ |
274 | static void igb_mta_set(struct e1000_hw *hw, u32 hash_value) | 246 | void igb_mta_set(struct e1000_hw *hw, u32 hash_value) |
275 | { | 247 | { |
276 | u32 hash_bit, hash_reg, mta; | 248 | u32 hash_bit, hash_reg, mta; |
277 | 249 | ||
@@ -297,60 +269,6 @@ static void igb_mta_set(struct e1000_hw *hw, u32 hash_value) | |||
297 | } | 269 | } |
298 | 270 | ||
299 | /** | 271 | /** |
300 | * igb_update_mc_addr_list - Update Multicast addresses | ||
301 | * @hw: pointer to the HW structure | ||
302 | * @mc_addr_list: array of multicast addresses to program | ||
303 | * @mc_addr_count: number of multicast addresses to program | ||
304 | * @rar_used_count: the first RAR register free to program | ||
305 | * @rar_count: total number of supported Receive Address Registers | ||
306 | * | ||
307 | * Updates the Receive Address Registers and Multicast Table Array. | ||
308 | * The caller must have a packed mc_addr_list of multicast addresses. | ||
309 | * The parameter rar_count will usually be hw->mac.rar_entry_count | ||
310 | * unless there are workarounds that change this. | ||
311 | **/ | ||
312 | void igb_update_mc_addr_list(struct e1000_hw *hw, | ||
313 | u8 *mc_addr_list, u32 mc_addr_count, | ||
314 | u32 rar_used_count, u32 rar_count) | ||
315 | { | ||
316 | u32 hash_value; | ||
317 | u32 i; | ||
318 | |||
319 | /* | ||
320 | * Load the first set of multicast addresses into the exact | ||
321 | * filters (RAR). If there are not enough to fill the RAR | ||
322 | * array, clear the filters. | ||
323 | */ | ||
324 | for (i = rar_used_count; i < rar_count; i++) { | ||
325 | if (mc_addr_count) { | ||
326 | hw->mac.ops.rar_set(hw, mc_addr_list, i); | ||
327 | mc_addr_count--; | ||
328 | mc_addr_list += ETH_ALEN; | ||
329 | } else { | ||
330 | array_wr32(E1000_RA, i << 1, 0); | ||
331 | wrfl(); | ||
332 | array_wr32(E1000_RA, (i << 1) + 1, 0); | ||
333 | wrfl(); | ||
334 | } | ||
335 | } | ||
336 | |||
337 | /* Clear the old settings from the MTA */ | ||
338 | hw_dbg("Clearing MTA\n"); | ||
339 | for (i = 0; i < hw->mac.mta_reg_count; i++) { | ||
340 | array_wr32(E1000_MTA, i, 0); | ||
341 | wrfl(); | ||
342 | } | ||
343 | |||
344 | /* Load any remaining multicast addresses into the hash table. */ | ||
345 | for (; mc_addr_count > 0; mc_addr_count--) { | ||
346 | hash_value = igb_hash_mc_addr(hw, mc_addr_list); | ||
347 | hw_dbg("Hash value = 0x%03X\n", hash_value); | ||
348 | igb_mta_set(hw, hash_value); | ||
349 | mc_addr_list += ETH_ALEN; | ||
350 | } | ||
351 | } | ||
352 | |||
353 | /** | ||
354 | * igb_hash_mc_addr - Generate a multicast hash value | 272 | * igb_hash_mc_addr - Generate a multicast hash value |
355 | * @hw: pointer to the HW structure | 273 | * @hw: pointer to the HW structure |
356 | * @mc_addr: pointer to a multicast address | 274 | * @mc_addr: pointer to a multicast address |
diff --git a/drivers/net/igb/e1000_mac.h b/drivers/net/igb/e1000_mac.h index dc2f8cce15e7..cbee6af7d912 100644 --- a/drivers/net/igb/e1000_mac.h +++ b/drivers/net/igb/e1000_mac.h | |||
@@ -51,9 +51,6 @@ s32 igb_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, | |||
51 | u16 *duplex); | 51 | u16 *duplex); |
52 | s32 igb_id_led_init(struct e1000_hw *hw); | 52 | s32 igb_id_led_init(struct e1000_hw *hw); |
53 | s32 igb_led_off(struct e1000_hw *hw); | 53 | s32 igb_led_off(struct e1000_hw *hw); |
54 | void igb_update_mc_addr_list(struct e1000_hw *hw, | ||
55 | u8 *mc_addr_list, u32 mc_addr_count, | ||
56 | u32 rar_used_count, u32 rar_count); | ||
57 | s32 igb_setup_link(struct e1000_hw *hw); | 54 | s32 igb_setup_link(struct e1000_hw *hw); |
58 | s32 igb_validate_mdi_setting(struct e1000_hw *hw); | 55 | s32 igb_validate_mdi_setting(struct e1000_hw *hw); |
59 | s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, | 56 | s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, |
@@ -62,7 +59,7 @@ s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, | |||
62 | void igb_clear_hw_cntrs_base(struct e1000_hw *hw); | 59 | void igb_clear_hw_cntrs_base(struct e1000_hw *hw); |
63 | void igb_clear_vfta(struct e1000_hw *hw); | 60 | void igb_clear_vfta(struct e1000_hw *hw); |
64 | void igb_config_collision_dist(struct e1000_hw *hw); | 61 | void igb_config_collision_dist(struct e1000_hw *hw); |
65 | void igb_init_rx_addrs(struct e1000_hw *hw, u16 rar_count); | 62 | void igb_mta_set(struct e1000_hw *hw, u32 hash_value); |
66 | void igb_put_hw_semaphore(struct e1000_hw *hw); | 63 | void igb_put_hw_semaphore(struct e1000_hw *hw); |
67 | void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index); | 64 | void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index); |
68 | s32 igb_check_alt_mac_addr(struct e1000_hw *hw); | 65 | s32 igb_check_alt_mac_addr(struct e1000_hw *hw); |
diff --git a/drivers/net/igb/e1000_regs.h b/drivers/net/igb/e1000_regs.h index b95093d24c09..95523af26056 100644 --- a/drivers/net/igb/e1000_regs.h +++ b/drivers/net/igb/e1000_regs.h | |||
@@ -262,9 +262,6 @@ | |||
262 | #define E1000_RETA(_i) (0x05C00 + ((_i) * 4)) | 262 | #define E1000_RETA(_i) (0x05C00 + ((_i) * 4)) |
263 | #define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW Array */ | 263 | #define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW Array */ |
264 | 264 | ||
265 | #define E1000_REGISTER(a, reg) (((a)->mac.type < e1000_82576) \ | ||
266 | ? reg : e1000_translate_register_82576(reg)) | ||
267 | |||
268 | #define wr32(reg, value) (writel(value, hw->hw_addr + reg)) | 265 | #define wr32(reg, value) (writel(value, hw->hw_addr + reg)) |
269 | #define rd32(reg) (readl(hw->hw_addr + reg)) | 266 | #define rd32(reg) (readl(hw->hw_addr + reg)) |
270 | #define wrfl() ((void)rd32(E1000_STATUS)) | 267 | #define wrfl() ((void)rd32(E1000_STATUS)) |
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c index b602c4dd0d14..8f66e15ec8d6 100644 --- a/drivers/net/igb/igb_main.c +++ b/drivers/net/igb/igb_main.c | |||
@@ -311,7 +311,7 @@ static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue, | |||
311 | array_wr32(E1000_MSIXBM(0), msix_vector, msixbm); | 311 | array_wr32(E1000_MSIXBM(0), msix_vector, msixbm); |
312 | break; | 312 | break; |
313 | case e1000_82576: | 313 | case e1000_82576: |
314 | /* Kawela uses a table-based method for assigning vectors. | 314 | /* The 82576 uses a table-based method for assigning vectors. |
315 | Each queue has a single entry in the table to which we write | 315 | Each queue has a single entry in the table to which we write |
316 | a vector number along with a "valid" bit. Sadly, the layout | 316 | a vector number along with a "valid" bit. Sadly, the layout |
317 | of the table is somewhat counterintuitive. */ | 317 | of the table is somewhat counterintuitive. */ |
@@ -720,28 +720,6 @@ static void igb_get_hw_control(struct igb_adapter *adapter) | |||
720 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | 720 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); |
721 | } | 721 | } |
722 | 722 | ||
723 | static void igb_init_manageability(struct igb_adapter *adapter) | ||
724 | { | ||
725 | struct e1000_hw *hw = &adapter->hw; | ||
726 | |||
727 | if (adapter->en_mng_pt) { | ||
728 | u32 manc2h = rd32(E1000_MANC2H); | ||
729 | u32 manc = rd32(E1000_MANC); | ||
730 | |||
731 | /* enable receiving management packets to the host */ | ||
732 | /* this will probably generate destination unreachable messages | ||
733 | * from the host OS, but the packets will be handled on SMBUS */ | ||
734 | manc |= E1000_MANC_EN_MNG2HOST; | ||
735 | #define E1000_MNG2HOST_PORT_623 (1 << 5) | ||
736 | #define E1000_MNG2HOST_PORT_664 (1 << 6) | ||
737 | manc2h |= E1000_MNG2HOST_PORT_623; | ||
738 | manc2h |= E1000_MNG2HOST_PORT_664; | ||
739 | wr32(E1000_MANC2H, manc2h); | ||
740 | |||
741 | wr32(E1000_MANC, manc); | ||
742 | } | ||
743 | } | ||
744 | |||
745 | /** | 723 | /** |
746 | * igb_configure - configure the hardware for RX and TX | 724 | * igb_configure - configure the hardware for RX and TX |
747 | * @adapter: private board structure | 725 | * @adapter: private board structure |
@@ -755,7 +733,6 @@ static void igb_configure(struct igb_adapter *adapter) | |||
755 | igb_set_multi(netdev); | 733 | igb_set_multi(netdev); |
756 | 734 | ||
757 | igb_restore_vlan(adapter); | 735 | igb_restore_vlan(adapter); |
758 | igb_init_manageability(adapter); | ||
759 | 736 | ||
760 | igb_configure_tx(adapter); | 737 | igb_configure_tx(adapter); |
761 | igb_setup_rctl(adapter); | 738 | igb_setup_rctl(adapter); |
@@ -1372,7 +1349,8 @@ static void __devexit igb_remove(struct pci_dev *pdev) | |||
1372 | 1349 | ||
1373 | unregister_netdev(netdev); | 1350 | unregister_netdev(netdev); |
1374 | 1351 | ||
1375 | if (!igb_check_reset_block(&adapter->hw)) | 1352 | if (adapter->hw.phy.ops.reset_phy && |
1353 | !igb_check_reset_block(&adapter->hw)) | ||
1376 | adapter->hw.phy.ops.reset_phy(&adapter->hw); | 1354 | adapter->hw.phy.ops.reset_phy(&adapter->hw); |
1377 | 1355 | ||
1378 | igb_remove_device(&adapter->hw); | 1356 | igb_remove_device(&adapter->hw); |
@@ -4523,8 +4501,6 @@ static void igb_io_resume(struct pci_dev *pdev) | |||
4523 | struct net_device *netdev = pci_get_drvdata(pdev); | 4501 | struct net_device *netdev = pci_get_drvdata(pdev); |
4524 | struct igb_adapter *adapter = netdev_priv(netdev); | 4502 | struct igb_adapter *adapter = netdev_priv(netdev); |
4525 | 4503 | ||
4526 | igb_init_manageability(adapter); | ||
4527 | |||
4528 | if (netif_running(netdev)) { | 4504 | if (netif_running(netdev)) { |
4529 | if (igb_up(adapter)) { | 4505 | if (igb_up(adapter)) { |
4530 | dev_err(&pdev->dev, "igb_up failed after reset\n"); | 4506 | dev_err(&pdev->dev, "igb_up failed after reset\n"); |