1 files changed, 71 insertions, 3 deletions

diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index 3666b967846a..b4f92b06f2ac 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -50,7 +50,12 @@
 #endif
 #include "igb.h"
 
-#define DRV_VERSION "2.4.13-k2"
+#define MAJ 3
+#define MIN 0
+#define BUILD 6
+#define KFIX 2
+#define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
+__stringify(BUILD) "-k" __stringify(KFIX)
 char igb_driver_name[] = "igb";
 char igb_driver_version[] = DRV_VERSION;
 static const char igb_driver_string[] =
@@ -1674,7 +1679,58 @@ void igb_reset(struct igb_adapter *adapter)
 
         if (hw->mac.ops.init_hw(hw))
                 dev_err(&pdev->dev, "Hardware Error\n");
+        if (hw->mac.type > e1000_82580) {
+                if (adapter->flags & IGB_FLAG_DMAC) {
+                        u32 reg;
 
+                        /*
+                         * DMA Coalescing high water mark needs to be higher
+                         * than * the * Rx threshold.  The Rx threshold is
+                         * currently * pba - 6, so we * should use a high water
+                         * mark of pba * - 4. */
+                        hwm = (pba - 4) << 10;
+
+                        reg = (((pba-6) << E1000_DMACR_DMACTHR_SHIFT)
+                               & E1000_DMACR_DMACTHR_MASK);
+
+                        /* transition to L0x or L1 if available..*/
+                        reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
+
+                        /* watchdog timer= +-1000 usec in 32usec intervals */
+                        reg |= (1000 >> 5);
+                        wr32(E1000_DMACR, reg);
+
+                        /* no lower threshold to disable coalescing(smart fifb)
+                         * -UTRESH=0*/
+                        wr32(E1000_DMCRTRH, 0);
+
+                        /* set hwm to PBA -  2 * max frame size */
+                        wr32(E1000_FCRTC, hwm);
+
+                        /*
+                         * This sets the time to wait before requesting tran-
+                         * sition to * low power state to number of usecs needed
+                         * to receive 1 512 * byte frame at gigabit line rate
+                         */
+                        reg = rd32(E1000_DMCTLX);
+                        reg |= IGB_DMCTLX_DCFLUSH_DIS;
+
+                        /* Delay 255 usec before entering Lx state. */
+                        reg |= 0xFF;
+                        wr32(E1000_DMCTLX, reg);
+
+                        /* free space in Tx packet buffer to wake from DMAC */
+                        wr32(E1000_DMCTXTH,
+                             (IGB_MIN_TXPBSIZE -
+                             (IGB_TX_BUF_4096 + adapter->max_frame_size))
+                             >> 6);
+
+                        /* make low power state decision controlled by DMAC */
+                        reg = rd32(E1000_PCIEMISC);
+                        reg |= E1000_PCIEMISC_LX_DECISION;
+                        wr32(E1000_PCIEMISC, reg);
+                } /* end if IGB_FLAG_DMAC set */
+        }
         if (hw->mac.type == e1000_82580) {
                 u32 reg = rd32(E1000_PCIEMISC);
                 wr32(E1000_PCIEMISC,
@@ -1884,7 +1940,7 @@ static int __devinit igb_probe(struct pci_dev *pdev,
         hw->mac.ops.reset_hw(hw);
 
         /* make sure the NVM is good */
-        if (igb_validate_nvm_checksum(hw) < 0) {
+        if (hw->nvm.ops.validate(hw) < 0) {
                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
                 err = -EIO;
                 goto err_eeprom;
@@ -2014,7 +2070,13 @@ static int __devinit igb_probe(struct pci_dev *pdev,
                 adapter->msix_entries ? "MSI-X" :
                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
                 adapter->num_rx_queues, adapter->num_tx_queues);
-
+        switch (hw->mac.type) {
+        case e1000_i350:
+                igb_set_eee_i350(hw);
+                break;
+        default:
+                break;
+        }
         return 0;
 
 err_register:
@@ -2151,6 +2213,9 @@ static void __devinit igb_probe_vfs(struct igb_adapter * adapter)
                         random_ether_addr(mac_addr);
                         igb_set_vf_mac(adapter, i, mac_addr);
                 }
+                /* DMA Coalescing is not supported in IOV mode. */
+                if (adapter->flags & IGB_FLAG_DMAC)
+                        adapter->flags &= ~IGB_FLAG_DMAC;
         }
 #endif /* CONFIG_PCI_IOV */
 }
@@ -2325,6 +2390,9 @@ static int __devinit igb_sw_init(struct igb_adapter *adapter)
         /* Explicitly disable IRQ since the NIC can be in any state. */
         igb_irq_disable(adapter);
 
+        if (hw->mac.type == e1000_i350)
+                adapter->flags &= ~IGB_FLAG_DMAC;
+
         set_bit(__IGB_DOWN, &adapter->state);
         return 0;
 }