diff options
Diffstat (limited to 'drivers/net/igb/igb.h')
-rw-r--r-- | drivers/net/igb/igb.h | 160 |
1 files changed, 99 insertions, 61 deletions
diff --git a/drivers/net/igb/igb.h b/drivers/net/igb/igb.h index 7126fea26fec..3b772b822a5d 100644 --- a/drivers/net/igb/igb.h +++ b/drivers/net/igb/igb.h | |||
@@ -55,12 +55,14 @@ struct igb_adapter; | |||
55 | #define IGB_DEFAULT_ITR 3 /* dynamic */ | 55 | #define IGB_DEFAULT_ITR 3 /* dynamic */ |
56 | #define IGB_MAX_ITR_USECS 10000 | 56 | #define IGB_MAX_ITR_USECS 10000 |
57 | #define IGB_MIN_ITR_USECS 10 | 57 | #define IGB_MIN_ITR_USECS 10 |
58 | #define NON_Q_VECTORS 1 | ||
59 | #define MAX_Q_VECTORS 8 | ||
58 | 60 | ||
59 | /* Transmit and receive queues */ | 61 | /* Transmit and receive queues */ |
60 | #define IGB_MAX_RX_QUEUES (adapter->vfs_allocated_count ? \ | 62 | #define IGB_MAX_RX_QUEUES (adapter->vfs_allocated_count ? 2 : \ |
61 | (adapter->vfs_allocated_count > 6 ? 1 : 2) : 4) | 63 | (hw->mac.type > e1000_82575 ? 8 : 4)) |
62 | #define IGB_MAX_TX_QUEUES IGB_MAX_RX_QUEUES | 64 | #define IGB_ABS_MAX_TX_QUEUES 8 |
63 | #define IGB_ABS_MAX_TX_QUEUES 4 | 65 | #define IGB_MAX_TX_QUEUES IGB_MAX_RX_QUEUES |
64 | 66 | ||
65 | #define IGB_MAX_VF_MC_ENTRIES 30 | 67 | #define IGB_MAX_VF_MC_ENTRIES 30 |
66 | #define IGB_MAX_VF_FUNCTIONS 8 | 68 | #define IGB_MAX_VF_FUNCTIONS 8 |
@@ -71,9 +73,17 @@ struct vf_data_storage { | |||
71 | u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES]; | 73 | u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES]; |
72 | u16 num_vf_mc_hashes; | 74 | u16 num_vf_mc_hashes; |
73 | u16 vlans_enabled; | 75 | u16 vlans_enabled; |
74 | bool clear_to_send; | 76 | u32 flags; |
77 | unsigned long last_nack; | ||
78 | u16 pf_vlan; /* When set, guest VLAN config not allowed. */ | ||
79 | u16 pf_qos; | ||
75 | }; | 80 | }; |
76 | 81 | ||
82 | #define IGB_VF_FLAG_CTS 0x00000001 /* VF is clear to send data */ | ||
83 | #define IGB_VF_FLAG_UNI_PROMISC 0x00000002 /* VF has unicast promisc */ | ||
84 | #define IGB_VF_FLAG_MULTI_PROMISC 0x00000004 /* VF has multicast promisc */ | ||
85 | #define IGB_VF_FLAG_PF_SET_MAC 0x00000008 /* PF has set MAC address */ | ||
86 | |||
77 | /* RX descriptor control thresholds. | 87 | /* RX descriptor control thresholds. |
78 | * PTHRESH - MAC will consider prefetch if it has fewer than this number of | 88 | * PTHRESH - MAC will consider prefetch if it has fewer than this number of |
79 | * descriptors available in its onboard memory. | 89 | * descriptors available in its onboard memory. |
@@ -85,17 +95,19 @@ struct vf_data_storage { | |||
85 | * descriptors until either it has this many to write back, or the | 95 | * descriptors until either it has this many to write back, or the |
86 | * ITR timer expires. | 96 | * ITR timer expires. |
87 | */ | 97 | */ |
88 | #define IGB_RX_PTHRESH 16 | 98 | #define IGB_RX_PTHRESH 8 |
89 | #define IGB_RX_HTHRESH 8 | 99 | #define IGB_RX_HTHRESH 8 |
90 | #define IGB_RX_WTHRESH 1 | 100 | #define IGB_RX_WTHRESH 1 |
101 | #define IGB_TX_PTHRESH 8 | ||
102 | #define IGB_TX_HTHRESH 1 | ||
103 | #define IGB_TX_WTHRESH ((hw->mac.type == e1000_82576 && \ | ||
104 | adapter->msix_entries) ? 1 : 16) | ||
91 | 105 | ||
92 | /* this is the size past which hardware will drop packets when setting LPE=0 */ | 106 | /* this is the size past which hardware will drop packets when setting LPE=0 */ |
93 | #define MAXIMUM_ETHERNET_VLAN_SIZE 1522 | 107 | #define MAXIMUM_ETHERNET_VLAN_SIZE 1522 |
94 | 108 | ||
95 | /* Supported Rx Buffer Sizes */ | 109 | /* Supported Rx Buffer Sizes */ |
96 | #define IGB_RXBUFFER_128 128 /* Used for packet split */ | 110 | #define IGB_RXBUFFER_128 128 /* Used for packet split */ |
97 | #define IGB_RXBUFFER_256 256 /* Used for packet split */ | ||
98 | #define IGB_RXBUFFER_512 512 | ||
99 | #define IGB_RXBUFFER_1024 1024 | 111 | #define IGB_RXBUFFER_1024 1024 |
100 | #define IGB_RXBUFFER_2048 2048 | 112 | #define IGB_RXBUFFER_2048 2048 |
101 | #define IGB_RXBUFFER_16384 16384 | 113 | #define IGB_RXBUFFER_16384 16384 |
@@ -128,12 +140,14 @@ struct igb_buffer { | |||
128 | unsigned long time_stamp; | 140 | unsigned long time_stamp; |
129 | u16 length; | 141 | u16 length; |
130 | u16 next_to_watch; | 142 | u16 next_to_watch; |
143 | u16 mapped_as_page; | ||
144 | u16 gso_segs; | ||
131 | }; | 145 | }; |
132 | /* RX */ | 146 | /* RX */ |
133 | struct { | 147 | struct { |
134 | struct page *page; | 148 | struct page *page; |
135 | u64 page_dma; | 149 | dma_addr_t page_dma; |
136 | unsigned int page_offset; | 150 | u16 page_offset; |
137 | }; | 151 | }; |
138 | }; | 152 | }; |
139 | }; | 153 | }; |
@@ -141,36 +155,54 @@ struct igb_buffer { | |||
141 | struct igb_tx_queue_stats { | 155 | struct igb_tx_queue_stats { |
142 | u64 packets; | 156 | u64 packets; |
143 | u64 bytes; | 157 | u64 bytes; |
158 | u64 restart_queue; | ||
144 | }; | 159 | }; |
145 | 160 | ||
146 | struct igb_rx_queue_stats { | 161 | struct igb_rx_queue_stats { |
147 | u64 packets; | 162 | u64 packets; |
148 | u64 bytes; | 163 | u64 bytes; |
149 | u64 drops; | 164 | u64 drops; |
165 | u64 csum_err; | ||
166 | u64 alloc_failed; | ||
150 | }; | 167 | }; |
151 | 168 | ||
152 | struct igb_ring { | 169 | struct igb_q_vector { |
153 | struct igb_adapter *adapter; /* backlink */ | 170 | struct igb_adapter *adapter; /* backlink */ |
154 | void *desc; /* descriptor ring memory */ | 171 | struct igb_ring *rx_ring; |
155 | dma_addr_t dma; /* phys address of the ring */ | 172 | struct igb_ring *tx_ring; |
156 | unsigned int size; /* length of desc. ring in bytes */ | 173 | struct napi_struct napi; |
157 | unsigned int count; /* number of desc. in the ring */ | ||
158 | u16 next_to_use; | ||
159 | u16 next_to_clean; | ||
160 | u16 head; | ||
161 | u16 tail; | ||
162 | struct igb_buffer *buffer_info; /* array of buffer info structs */ | ||
163 | 174 | ||
164 | u32 eims_value; | 175 | u32 eims_value; |
165 | u32 itr_val; | ||
166 | u16 itr_register; | ||
167 | u16 cpu; | 176 | u16 cpu; |
168 | 177 | ||
169 | u16 queue_index; | 178 | u16 itr_val; |
170 | u16 reg_idx; | 179 | u8 set_itr; |
180 | void __iomem *itr_register; | ||
181 | |||
182 | char name[IFNAMSIZ + 9]; | ||
183 | }; | ||
184 | |||
185 | struct igb_ring { | ||
186 | struct igb_q_vector *q_vector; /* backlink to q_vector */ | ||
187 | struct net_device *netdev; /* back pointer to net_device */ | ||
188 | struct pci_dev *pdev; /* pci device for dma mapping */ | ||
189 | dma_addr_t dma; /* phys address of the ring */ | ||
190 | void *desc; /* descriptor ring memory */ | ||
191 | unsigned int size; /* length of desc. ring in bytes */ | ||
192 | u16 count; /* number of desc. in the ring */ | ||
193 | u16 next_to_use; | ||
194 | u16 next_to_clean; | ||
195 | u8 queue_index; | ||
196 | u8 reg_idx; | ||
197 | void __iomem *head; | ||
198 | void __iomem *tail; | ||
199 | struct igb_buffer *buffer_info; /* array of buffer info structs */ | ||
200 | |||
171 | unsigned int total_bytes; | 201 | unsigned int total_bytes; |
172 | unsigned int total_packets; | 202 | unsigned int total_packets; |
173 | 203 | ||
204 | u32 flags; | ||
205 | |||
174 | union { | 206 | union { |
175 | /* TX */ | 207 | /* TX */ |
176 | struct { | 208 | struct { |
@@ -180,16 +212,18 @@ struct igb_ring { | |||
180 | /* RX */ | 212 | /* RX */ |
181 | struct { | 213 | struct { |
182 | struct igb_rx_queue_stats rx_stats; | 214 | struct igb_rx_queue_stats rx_stats; |
183 | u64 rx_queue_drops; | 215 | u32 rx_buffer_len; |
184 | struct napi_struct napi; | ||
185 | int set_itr; | ||
186 | struct igb_ring *buddy; | ||
187 | }; | 216 | }; |
188 | }; | 217 | }; |
189 | |||
190 | char name[IFNAMSIZ + 5]; | ||
191 | }; | 218 | }; |
192 | 219 | ||
220 | #define IGB_RING_FLAG_RX_CSUM 0x00000001 /* RX CSUM enabled */ | ||
221 | #define IGB_RING_FLAG_RX_SCTP_CSUM 0x00000002 /* SCTP CSUM offload enabled */ | ||
222 | |||
223 | #define IGB_RING_FLAG_TX_CTX_IDX 0x00000001 /* HW requires context index */ | ||
224 | |||
225 | #define IGB_ADVTXD_DCMD (E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS) | ||
226 | |||
193 | #define E1000_RX_DESC_ADV(R, i) \ | 227 | #define E1000_RX_DESC_ADV(R, i) \ |
194 | (&(((union e1000_adv_rx_desc *)((R).desc))[i])) | 228 | (&(((union e1000_adv_rx_desc *)((R).desc))[i])) |
195 | #define E1000_TX_DESC_ADV(R, i) \ | 229 | #define E1000_TX_DESC_ADV(R, i) \ |
@@ -197,26 +231,30 @@ struct igb_ring { | |||
197 | #define E1000_TX_CTXTDESC_ADV(R, i) \ | 231 | #define E1000_TX_CTXTDESC_ADV(R, i) \ |
198 | (&(((struct e1000_adv_tx_context_desc *)((R).desc))[i])) | 232 | (&(((struct e1000_adv_tx_context_desc *)((R).desc))[i])) |
199 | 233 | ||
200 | /* board specific private data structure */ | 234 | /* igb_desc_unused - calculate if we have unused descriptors */ |
235 | static inline int igb_desc_unused(struct igb_ring *ring) | ||
236 | { | ||
237 | if (ring->next_to_clean > ring->next_to_use) | ||
238 | return ring->next_to_clean - ring->next_to_use - 1; | ||
201 | 239 | ||
240 | return ring->count + ring->next_to_clean - ring->next_to_use - 1; | ||
241 | } | ||
242 | |||
243 | /* board specific private data structure */ | ||
202 | struct igb_adapter { | 244 | struct igb_adapter { |
203 | struct timer_list watchdog_timer; | 245 | struct timer_list watchdog_timer; |
204 | struct timer_list phy_info_timer; | 246 | struct timer_list phy_info_timer; |
205 | struct vlan_group *vlgrp; | 247 | struct vlan_group *vlgrp; |
206 | u16 mng_vlan_id; | 248 | u16 mng_vlan_id; |
207 | u32 bd_number; | 249 | u32 bd_number; |
208 | u32 rx_buffer_len; | ||
209 | u32 wol; | 250 | u32 wol; |
210 | u32 en_mng_pt; | 251 | u32 en_mng_pt; |
211 | u16 link_speed; | 252 | u16 link_speed; |
212 | u16 link_duplex; | 253 | u16 link_duplex; |
213 | unsigned int total_tx_bytes; | 254 | |
214 | unsigned int total_tx_packets; | ||
215 | unsigned int total_rx_bytes; | ||
216 | unsigned int total_rx_packets; | ||
217 | /* Interrupt Throttle Rate */ | 255 | /* Interrupt Throttle Rate */ |
218 | u32 itr; | 256 | u32 rx_itr_setting; |
219 | u32 itr_setting; | 257 | u32 tx_itr_setting; |
220 | u16 tx_itr; | 258 | u16 tx_itr; |
221 | u16 rx_itr; | 259 | u16 rx_itr; |
222 | 260 | ||
@@ -228,35 +266,20 @@ struct igb_adapter { | |||
228 | unsigned long led_status; | 266 | unsigned long led_status; |
229 | 267 | ||
230 | /* TX */ | 268 | /* TX */ |
231 | struct igb_ring *tx_ring; /* One per active queue */ | 269 | struct igb_ring *tx_ring[16]; |
232 | unsigned int restart_queue; | ||
233 | unsigned long tx_queue_len; | ||
234 | u32 txd_cmd; | ||
235 | u32 gotc; | ||
236 | u64 gotc_old; | ||
237 | u64 tpt_old; | ||
238 | u64 colc_old; | ||
239 | u32 tx_timeout_count; | 270 | u32 tx_timeout_count; |
240 | 271 | ||
241 | /* RX */ | 272 | /* RX */ |
242 | struct igb_ring *rx_ring; /* One per active queue */ | 273 | struct igb_ring *rx_ring[16]; |
243 | int num_tx_queues; | 274 | int num_tx_queues; |
244 | int num_rx_queues; | 275 | int num_rx_queues; |
245 | 276 | ||
246 | u64 hw_csum_err; | ||
247 | u64 hw_csum_good; | ||
248 | u32 alloc_rx_buff_failed; | ||
249 | u32 gorc; | ||
250 | u64 gorc_old; | ||
251 | u16 rx_ps_hdr_size; | ||
252 | u32 max_frame_size; | 277 | u32 max_frame_size; |
253 | u32 min_frame_size; | 278 | u32 min_frame_size; |
254 | 279 | ||
255 | /* OS defined structs */ | 280 | /* OS defined structs */ |
256 | struct net_device *netdev; | 281 | struct net_device *netdev; |
257 | struct napi_struct napi; | ||
258 | struct pci_dev *pdev; | 282 | struct pci_dev *pdev; |
259 | struct net_device_stats net_stats; | ||
260 | struct cyclecounter cycles; | 283 | struct cyclecounter cycles; |
261 | struct timecounter clock; | 284 | struct timecounter clock; |
262 | struct timecompare compare; | 285 | struct timecompare compare; |
@@ -273,6 +296,9 @@ struct igb_adapter { | |||
273 | struct igb_ring test_rx_ring; | 296 | struct igb_ring test_rx_ring; |
274 | 297 | ||
275 | int msg_enable; | 298 | int msg_enable; |
299 | |||
300 | unsigned int num_q_vectors; | ||
301 | struct igb_q_vector *q_vector[MAX_Q_VECTORS]; | ||
276 | struct msix_entry *msix_entries; | 302 | struct msix_entry *msix_entries; |
277 | u32 eims_enable_mask; | 303 | u32 eims_enable_mask; |
278 | u32 eims_other; | 304 | u32 eims_other; |
@@ -283,18 +309,20 @@ struct igb_adapter { | |||
283 | u32 eeprom_wol; | 309 | u32 eeprom_wol; |
284 | 310 | ||
285 | struct igb_ring *multi_tx_table[IGB_ABS_MAX_TX_QUEUES]; | 311 | struct igb_ring *multi_tx_table[IGB_ABS_MAX_TX_QUEUES]; |
286 | unsigned int tx_ring_count; | 312 | u16 tx_ring_count; |
287 | unsigned int rx_ring_count; | 313 | u16 rx_ring_count; |
288 | unsigned int vfs_allocated_count; | 314 | unsigned int vfs_allocated_count; |
289 | struct vf_data_storage *vf_data; | 315 | struct vf_data_storage *vf_data; |
316 | u32 rss_queues; | ||
290 | }; | 317 | }; |
291 | 318 | ||
292 | #define IGB_FLAG_HAS_MSI (1 << 0) | 319 | #define IGB_FLAG_HAS_MSI (1 << 0) |
293 | #define IGB_FLAG_DCA_ENABLED (1 << 1) | 320 | #define IGB_FLAG_DCA_ENABLED (1 << 1) |
294 | #define IGB_FLAG_QUAD_PORT_A (1 << 2) | 321 | #define IGB_FLAG_QUAD_PORT_A (1 << 2) |
295 | #define IGB_FLAG_NEED_CTX_IDX (1 << 3) | 322 | #define IGB_FLAG_QUEUE_PAIRS (1 << 3) |
296 | #define IGB_FLAG_RX_CSUM_DISABLED (1 << 4) | ||
297 | 323 | ||
324 | #define IGB_82576_TSYNC_SHIFT 19 | ||
325 | #define IGB_82580_TSYNC_SHIFT 24 | ||
298 | enum e1000_state_t { | 326 | enum e1000_state_t { |
299 | __IGB_TESTING, | 327 | __IGB_TESTING, |
300 | __IGB_RESETTING, | 328 | __IGB_RESETTING, |
@@ -314,12 +342,22 @@ extern void igb_down(struct igb_adapter *); | |||
314 | extern void igb_reinit_locked(struct igb_adapter *); | 342 | extern void igb_reinit_locked(struct igb_adapter *); |
315 | extern void igb_reset(struct igb_adapter *); | 343 | extern void igb_reset(struct igb_adapter *); |
316 | extern int igb_set_spd_dplx(struct igb_adapter *, u16); | 344 | extern int igb_set_spd_dplx(struct igb_adapter *, u16); |
317 | extern int igb_setup_tx_resources(struct igb_adapter *, struct igb_ring *); | 345 | extern int igb_setup_tx_resources(struct igb_ring *); |
318 | extern int igb_setup_rx_resources(struct igb_adapter *, struct igb_ring *); | 346 | extern int igb_setup_rx_resources(struct igb_ring *); |
319 | extern void igb_free_tx_resources(struct igb_ring *); | 347 | extern void igb_free_tx_resources(struct igb_ring *); |
320 | extern void igb_free_rx_resources(struct igb_ring *); | 348 | extern void igb_free_rx_resources(struct igb_ring *); |
349 | extern void igb_configure_tx_ring(struct igb_adapter *, struct igb_ring *); | ||
350 | extern void igb_configure_rx_ring(struct igb_adapter *, struct igb_ring *); | ||
351 | extern void igb_setup_tctl(struct igb_adapter *); | ||
352 | extern void igb_setup_rctl(struct igb_adapter *); | ||
353 | extern netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *, struct igb_ring *); | ||
354 | extern void igb_unmap_and_free_tx_resource(struct igb_ring *, | ||
355 | struct igb_buffer *); | ||
356 | extern void igb_alloc_rx_buffers_adv(struct igb_ring *, int); | ||
321 | extern void igb_update_stats(struct igb_adapter *); | 357 | extern void igb_update_stats(struct igb_adapter *); |
358 | extern bool igb_has_link(struct igb_adapter *adapter); | ||
322 | extern void igb_set_ethtool_ops(struct net_device *); | 359 | extern void igb_set_ethtool_ops(struct net_device *); |
360 | extern void igb_power_up_link(struct igb_adapter *); | ||
323 | 361 | ||
324 | static inline s32 igb_reset_phy(struct e1000_hw *hw) | 362 | static inline s32 igb_reset_phy(struct e1000_hw *hw) |
325 | { | 363 | { |