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path: root/drivers/net/igb/e1000_phy.h
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Diffstat (limited to 'drivers/net/igb/e1000_phy.h')
-rw-r--r--drivers/net/igb/e1000_phy.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/net/igb/e1000_phy.h b/drivers/net/igb/e1000_phy.h
index adb9436b7336..e23b0211a203 100644
--- a/drivers/net/igb/e1000_phy.h
+++ b/drivers/net/igb/e1000_phy.h
@@ -63,6 +63,11 @@ s32 igb_phy_has_link(struct e1000_hw *hw, u32 iterations,
63s32 igb_phy_init_script_igp3(struct e1000_hw *hw); 63s32 igb_phy_init_script_igp3(struct e1000_hw *hw);
64s32 igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data); 64s32 igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data);
65s32 igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data); 65s32 igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data);
66s32 igb_copper_link_setup_82580(struct e1000_hw *hw);
67s32 igb_check_polarity_82580(struct e1000_hw *hw);
68s32 igb_get_phy_info_82580(struct e1000_hw *hw);
69s32 igb_phy_force_speed_duplex_82580(struct e1000_hw *hw);
70s32 igb_get_cable_length_82580(struct e1000_hw *hw);
66 71
67/* IGP01E1000 Specific Registers */ 72/* IGP01E1000 Specific Registers */
68#define IGP01E1000_PHY_PORT_CONFIG 0x10 /* Port Config */ 73#define IGP01E1000_PHY_PORT_CONFIG 0x10 /* Port Config */
@@ -77,6 +82,33 @@ s32 igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data);
77#define IGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000 /* 0=MDI, 1=MDIX */ 82#define IGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000 /* 0=MDI, 1=MDIX */
78#define IGP01E1000_PSCFR_SMART_SPEED 0x0080 83#define IGP01E1000_PSCFR_SMART_SPEED 0x0080
79 84
85#define I82580_ADDR_REG 16
86#define I82580_CFG_REG 22
87#define I82580_CFG_ASSERT_CRS_ON_TX (1 << 15)
88#define I82580_CFG_ENABLE_DOWNSHIFT (3 << 10) /* auto downshift 100/10 */
89#define I82580_CTRL_REG 23
90#define I82580_CTRL_DOWNSHIFT_MASK (7 << 10)
91
92/* 82580 specific PHY registers */
93#define I82580_PHY_CTRL_2 18
94#define I82580_PHY_LBK_CTRL 19
95#define I82580_PHY_STATUS_2 26
96#define I82580_PHY_DIAG_STATUS 31
97
98/* I82580 PHY Status 2 */
99#define I82580_PHY_STATUS2_REV_POLARITY 0x0400
100#define I82580_PHY_STATUS2_MDIX 0x0800
101#define I82580_PHY_STATUS2_SPEED_MASK 0x0300
102#define I82580_PHY_STATUS2_SPEED_1000MBPS 0x0200
103#define I82580_PHY_STATUS2_SPEED_100MBPS 0x0100
104
105/* I82580 PHY Control 2 */
106#define I82580_PHY_CTRL2_AUTO_MDIX 0x0400
107#define I82580_PHY_CTRL2_FORCE_MDI_MDIX 0x0200
108
109/* I82580 PHY Diagnostics Status */
110#define I82580_DSTATUS_CABLE_LENGTH 0x03FC
111#define I82580_DSTATUS_CABLE_LENGTH_SHIFT 2
80/* Enable flexible speed on link-up */ 112/* Enable flexible speed on link-up */
81#define IGP02E1000_PM_D0_LPLU 0x0002 /* For D0a states */ 113#define IGP02E1000_PM_D0_LPLU 0x0002 /* For D0a states */
82#define IGP02E1000_PM_D3_LPLU 0x0004 /* For all other states */ 114#define IGP02E1000_PM_D3_LPLU 0x0004 /* For all other states */