diff options
Diffstat (limited to 'drivers/net/igb/e1000_82575.c')
-rw-r--r-- | drivers/net/igb/e1000_82575.c | 72 |
1 files changed, 7 insertions, 65 deletions
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c index e098f234770f..bb823acc7443 100644 --- a/drivers/net/igb/e1000_82575.c +++ b/drivers/net/igb/e1000_82575.c | |||
@@ -850,7 +850,7 @@ void igb_update_mc_addr_list_82575(struct e1000_hw *hw, | |||
850 | for (; mc_addr_count > 0; mc_addr_count--) { | 850 | for (; mc_addr_count > 0; mc_addr_count--) { |
851 | hash_value = igb_hash_mc_addr(hw, mc_addr_list); | 851 | hash_value = igb_hash_mc_addr(hw, mc_addr_list); |
852 | hw_dbg("Hash value = 0x%03X\n", hash_value); | 852 | hw_dbg("Hash value = 0x%03X\n", hash_value); |
853 | hw->mac.ops.mta_set(hw, hash_value); | 853 | igb_mta_set(hw, hash_value); |
854 | mc_addr_list += ETH_ALEN; | 854 | mc_addr_list += ETH_ALEN; |
855 | } | 855 | } |
856 | } | 856 | } |
@@ -1136,6 +1136,12 @@ static s32 igb_setup_fiber_serdes_link_82575(struct e1000_hw *hw) | |||
1136 | E1000_PCS_LCTL_FORCE_LINK; /* Force Link */ | 1136 | E1000_PCS_LCTL_FORCE_LINK; /* Force Link */ |
1137 | hw_dbg("Configuring Forced Link; PCS_LCTL = 0x%08X\n", reg); | 1137 | hw_dbg("Configuring Forced Link; PCS_LCTL = 0x%08X\n", reg); |
1138 | } | 1138 | } |
1139 | |||
1140 | if (hw->mac.type == e1000_82576) { | ||
1141 | reg |= E1000_PCS_LCTL_FORCE_FCTRL; | ||
1142 | igb_force_mac_fc(hw); | ||
1143 | } | ||
1144 | |||
1139 | wr32(E1000_PCS_LCTL, reg); | 1145 | wr32(E1000_PCS_LCTL, reg); |
1140 | 1146 | ||
1141 | return 0; | 1147 | return 0; |
@@ -1232,70 +1238,6 @@ out: | |||
1232 | } | 1238 | } |
1233 | 1239 | ||
1234 | /** | 1240 | /** |
1235 | * igb_translate_register_82576 - Translate the proper register offset | ||
1236 | * @reg: e1000 register to be read | ||
1237 | * | ||
1238 | * Registers in 82576 are located in different offsets than other adapters | ||
1239 | * even though they function in the same manner. This function takes in | ||
1240 | * the name of the register to read and returns the correct offset for | ||
1241 | * 82576 silicon. | ||
1242 | **/ | ||
1243 | u32 igb_translate_register_82576(u32 reg) | ||
1244 | { | ||
1245 | /* | ||
1246 | * Some of the Kawela registers are located at different | ||
1247 | * offsets than they are in older adapters. | ||
1248 | * Despite the difference in location, the registers | ||
1249 | * function in the same manner. | ||
1250 | */ | ||
1251 | switch (reg) { | ||
1252 | case E1000_TDBAL(0): | ||
1253 | reg = 0x0E000; | ||
1254 | break; | ||
1255 | case E1000_TDBAH(0): | ||
1256 | reg = 0x0E004; | ||
1257 | break; | ||
1258 | case E1000_TDLEN(0): | ||
1259 | reg = 0x0E008; | ||
1260 | break; | ||
1261 | case E1000_TDH(0): | ||
1262 | reg = 0x0E010; | ||
1263 | break; | ||
1264 | case E1000_TDT(0): | ||
1265 | reg = 0x0E018; | ||
1266 | break; | ||
1267 | case E1000_TXDCTL(0): | ||
1268 | reg = 0x0E028; | ||
1269 | break; | ||
1270 | case E1000_RDBAL(0): | ||
1271 | reg = 0x0C000; | ||
1272 | break; | ||
1273 | case E1000_RDBAH(0): | ||
1274 | reg = 0x0C004; | ||
1275 | break; | ||
1276 | case E1000_RDLEN(0): | ||
1277 | reg = 0x0C008; | ||
1278 | break; | ||
1279 | case E1000_RDH(0): | ||
1280 | reg = 0x0C010; | ||
1281 | break; | ||
1282 | case E1000_RDT(0): | ||
1283 | reg = 0x0C018; | ||
1284 | break; | ||
1285 | case E1000_RXDCTL(0): | ||
1286 | reg = 0x0C028; | ||
1287 | break; | ||
1288 | case E1000_SRRCTL(0): | ||
1289 | reg = 0x0C00C; | ||
1290 | break; | ||
1291 | default: | ||
1292 | break; | ||
1293 | } | ||
1294 | |||
1295 | return reg; | ||
1296 | } | ||
1297 | |||
1298 | /** | ||
1299 | * igb_reset_init_script_82575 - Inits HW defaults after reset | 1241 | * igb_reset_init_script_82575 - Inits HW defaults after reset |
1300 | * @hw: pointer to the HW structure | 1242 | * @hw: pointer to the HW structure |
1301 | * | 1243 | * |