1 files changed, 18 insertions, 2 deletions

diff --git a/drivers/net/ibm_newemac/mal.c b/drivers/net/ibm_newemac/mal.c
index 6869f08c9dcb..10c267b2b961 100644
--- a/drivers/net/ibm_newemac/mal.c
+++ b/drivers/net/ibm_newemac/mal.c
@@ -61,8 +61,8 @@ int __devinit mal_register_commac(struct mal_instance	*mal,
         return 0;
 }
 
-void __devexit mal_unregister_commac(struct mal_instance        *mal,
-                                     struct mal_commac          *commac)
+void mal_unregister_commac(struct mal_instance  *mal,
+                struct mal_commac *commac)
 {
         unsigned long flags;
 
@@ -136,6 +136,14 @@ void mal_enable_rx_channel(struct mal_instance *mal, int channel)
 {
         unsigned long flags;
 
+        /*
+         * On some 4xx PPC's (e.g. 460EX/GT), the rx channel is a multiple
+         * of 8, but enabling in MAL_RXCASR needs the divided by 8 value
+         * for the bitmask
+         */
+        if (!(channel % 8))
+                channel >>= 3;
+
         spin_lock_irqsave(&mal->lock, flags);
 
         MAL_DBG(mal, "enable_rx(%d)" NL, channel);
@@ -148,6 +156,14 @@ void mal_enable_rx_channel(struct mal_instance *mal, int channel)
 
 void mal_disable_rx_channel(struct mal_instance *mal, int channel)
 {
+        /*
+         * On some 4xx PPC's (e.g. 460EX/GT), the rx channel is a multiple
+         * of 8, but enabling in MAL_RXCASR needs the divided by 8 value
+         * for the bitmask
+         */
+        if (!(channel % 8))
+                channel >>= 3;
+
         set_mal_dcrn(mal, MAL_RXCARR, MAL_CHAN_MASK(channel));
 
         MAL_DBG(mal, "disable_rx(%d)" NL, channel);