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1/* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2/*
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
5
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
12
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
17
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 adapter.
20
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
23 or
24 http://www.parl.clemson.edu/~keithu/hamachi.html
25
26
27
28 Linux kernel changelog:
29
30 LK1.0.1:
31 - fix lack of pci_dev<->dev association
32 - ethtool support (jgarzik)
33
34*/
35
36#define DRV_NAME "hamachi"
37#define DRV_VERSION "1.01+LK1.0.1"
38#define DRV_RELDATE "5/18/2001"
39
40
41/* A few user-configurable values. */
42
43static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
44#define final_version
45#define hamachi_debug debug
46/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
47static int max_interrupt_work = 40;
48static int mtu;
49/* Default values selected by testing on a dual processor PIII-450 */
50/* These six interrupt control parameters may be set directly when loading the
51 * module, or through the rx_params and tx_params variables
52 */
53static int max_rx_latency = 0x11;
54static int max_rx_gap = 0x05;
55static int min_rx_pkt = 0x18;
56static int max_tx_latency = 0x00;
57static int max_tx_gap = 0x00;
58static int min_tx_pkt = 0x30;
59
60/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
61 -Setting to > 1518 causes all frames to be copied
62 -Setting to 0 disables copies
63*/
64static int rx_copybreak;
65
66/* An override for the hardware detection of bus width.
67 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
68 Add 2 to disable parity detection.
69*/
70static int force32;
71
72
73/* Used to pass the media type, etc.
74 These exist for driver interoperability.
75 No media types are currently defined.
76 - The lower 4 bits are reserved for the media type.
77 - The next three bits may be set to one of the following:
78 0x00000000 : Autodetect PCI bus
79 0x00000010 : Force 32 bit PCI bus
80 0x00000020 : Disable parity detection
81 0x00000040 : Force 64 bit PCI bus
82 Default is autodetect
83 - The next bit can be used to force half-duplex. This is a bad
84 idea since no known implementations implement half-duplex, and,
85 in general, half-duplex for gigabit ethernet is a bad idea.
86 0x00000080 : Force half-duplex
87 Default is full-duplex.
88 - In the original driver, the ninth bit could be used to force
89 full-duplex. Maintain that for compatibility
90 0x00000200 : Force full-duplex
91*/
92#define MAX_UNITS 8 /* More are supported, limit only on options */
93static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
94static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
95/* The Hamachi chipset supports 3 parameters each for Rx and Tx
96 * interruput management. Parameters will be loaded as specified into
97 * the TxIntControl and RxIntControl registers.
98 *
99 * The registers are arranged as follows:
100 * 23 - 16 15 - 8 7 - 0
101 * _________________________________
102 * | min_pkt | max_gap | max_latency |
103 * ---------------------------------
104 * min_pkt : The minimum number of packets processed between
105 * interrupts.
106 * max_gap : The maximum inter-packet gap in units of 8.192 us
107 * max_latency : The absolute time between interrupts in units of 8.192 us
108 *
109 */
110static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
111static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
112
113/* Operational parameters that are set at compile time. */
114
115/* Keep the ring sizes a power of two for compile efficiency.
116 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
117 Making the Tx ring too large decreases the effectiveness of channel
118 bonding and packet priority.
119 There are no ill effects from too-large receive rings, except for
120 excessive memory usage */
121/* Empirically it appears that the Tx ring needs to be a little bigger
122 for these Gbit adapters or you get into an overrun condition really
123 easily. Also, things appear to work a bit better in back-to-back
124 configurations if the Rx ring is 8 times the size of the Tx ring
125*/
126#define TX_RING_SIZE 64
127#define RX_RING_SIZE 512
128#define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
129#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
130
131/*
132 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
133 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
134 */
135
136/* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
137/* #define ADDRLEN 64 */
138
139/*
140 * RX_CHECKSUM turns on card-generated receive checksum generation for
141 * TCP and UDP packets. Otherwise the upper layers do the calculation.
142 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
143 * easy mechanism by which to tell the TCP/UDP stack that it need not
144 * generate checksums for this device. But if somebody can find a way
145 * to get that to work, most of the card work is in here already.
146 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
147 */
148#undef TX_CHECKSUM
149#define RX_CHECKSUM
150
151/* Operational parameters that usually are not changed. */
152/* Time in jiffies before concluding the transmitter is hung. */
153#define TX_TIMEOUT (5*HZ)
154
155#include <linux/module.h>
156#include <linux/kernel.h>
157#include <linux/string.h>
158#include <linux/timer.h>
159#include <linux/time.h>
160#include <linux/errno.h>
161#include <linux/ioport.h>
162#include <linux/slab.h>
163#include <linux/interrupt.h>
164#include <linux/pci.h>
165#include <linux/init.h>
166#include <linux/ethtool.h>
167#include <linux/mii.h>
168#include <linux/netdevice.h>
169#include <linux/etherdevice.h>
170#include <linux/skbuff.h>
171#include <linux/ip.h>
172#include <linux/delay.h>
173#include <linux/bitops.h>
174
175#include <asm/uaccess.h>
176#include <asm/processor.h> /* Processor type for cache alignment. */
177#include <asm/io.h>
178#include <asm/unaligned.h>
179#include <asm/cache.h>
180
181static char version[] __devinitdata =
182KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
183KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
184KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
185
186
187/* IP_MF appears to be only defined in <netinet/ip.h>, however,
188 we need it for hardware checksumming support. FYI... some of
189 the definitions in <netinet/ip.h> conflict/duplicate those in
190 other linux headers causing many compiler warnings.
191*/
192#ifndef IP_MF
193 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
194#endif
195
196/* Define IP_OFFSET to be IPOPT_OFFSET */
197#ifndef IP_OFFSET
198 #ifdef IPOPT_OFFSET
199 #define IP_OFFSET IPOPT_OFFSET
200 #else
201 #define IP_OFFSET 2
202 #endif
203#endif
204
205#define RUN_AT(x) (jiffies + (x))
206
207/* Condensed bus+endian portability operations. */
208#if ADDRLEN == 64
209#define cpu_to_leXX(addr) cpu_to_le64(addr)
210#else
211#define cpu_to_leXX(addr) cpu_to_le32(addr)
212#endif
213
214
215/*
216 Theory of Operation
217
218I. Board Compatibility
219
220This device driver is designed for the Packet Engines "Hamachi"
221Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
22266Mhz PCI card.
223
224II. Board-specific settings
225
226No jumpers exist on the board. The chip supports software correction of
227various motherboard wiring errors, however this driver does not support
228that feature.
229
230III. Driver operation
231
232IIIa. Ring buffers
233
234The Hamachi uses a typical descriptor based bus-master architecture.
235The descriptor list is similar to that used by the Digital Tulip.
236This driver uses two statically allocated fixed-size descriptor lists
237formed into rings by a branch from the final descriptor to the beginning of
238the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
239
240This driver uses a zero-copy receive and transmit scheme similar my other
241network drivers.
242The driver allocates full frame size skbuffs for the Rx ring buffers at
243open() time and passes the skb->data field to the Hamachi as receive data
244buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
245a fresh skbuff is allocated and the frame is copied to the new skbuff.
246When the incoming frame is larger, the skbuff is passed directly up the
247protocol stack and replaced by a newly allocated skbuff.
248
249The RX_COPYBREAK value is chosen to trade-off the memory wasted by
250using a full-sized skbuff for small frames vs. the copying costs of larger
251frames. Gigabit cards are typically used on generously configured machines
252and the underfilled buffers have negligible impact compared to the benefit of
253a single allocation size, so the default value of zero results in never
254copying packets.
255
256IIIb/c. Transmit/Receive Structure
257
258The Rx and Tx descriptor structure are straight-forward, with no historical
259baggage that must be explained. Unlike the awkward DBDMA structure, there
260are no unused fields or option bits that had only one allowable setting.
261
262Two details should be noted about the descriptors: The chip supports both 32
263bit and 64 bit address structures, and the length field is overwritten on
264the receive descriptors. The descriptor length is set in the control word
265for each channel. The development driver uses 32 bit addresses only, however
26664 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
267
268IIId. Synchronization
269
270This driver is very similar to my other network drivers.
271The driver runs as two independent, single-threaded flows of control. One
272is the send-packet routine, which enforces single-threaded use by the
273dev->tbusy flag. The other thread is the interrupt handler, which is single
274threaded by the hardware and other software.
275
276The send packet thread has partial control over the Tx ring and 'dev->tbusy'
277flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
278queue slot is empty, it clears the tbusy flag when finished otherwise it sets
279the 'hmp->tx_full' flag.
280
281The interrupt handler has exclusive control over the Rx ring and records stats
282from the Tx ring. After reaping the stats, it marks the Tx queue entry as
283empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
284clears both the tx_full and tbusy flags.
285
286IV. Notes
287
288Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
289
290IVb. References
291
292Hamachi Engineering Design Specification, 5/15/97
293(Note: This version was marked "Confidential".)
294
295IVc. Errata
296
297None noted.
298
299V. Recent Changes
300
30101/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
302 to help avoid some stall conditions -- this needs further research.
303
30401/15/1999 EPK Creation of the hamachi_tx function. This function cleans
305 the Tx ring and is called from hamachi_start_xmit (this used to be
306 called from hamachi_interrupt but it tends to delay execution of the
307 interrupt handler and thus reduce bandwidth by reducing the latency
308 between hamachi_rx()'s). Notably, some modification has been made so
309 that the cleaning loop checks only to make sure that the DescOwn bit
310 isn't set in the status flag since the card is not required
311 to set the entire flag to zero after processing.
312
31301/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
314 checked before attempting to add a buffer to the ring. If the ring is full
315 an attempt is made to free any dirty buffers and thus find space for
316 the new buffer or the function returns non-zero which should case the
317 scheduler to reschedule the buffer later.
318
31901/15/1999 EPK Some adjustments were made to the chip initialization.
320 End-to-end flow control should now be fully active and the interrupt
321 algorithm vars have been changed. These could probably use further tuning.
322
32301/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
324 set the rx and tx latencies for the Hamachi interrupts. If you're having
325 problems with network stalls, try setting these to higher values.
326 Valid values are 0x00 through 0xff.
327
32801/15/1999 EPK In general, the overall bandwidth has increased and
329 latencies are better (sometimes by a factor of 2). Stalls are rare at
330 this point, however there still appears to be a bug somewhere between the
331 hardware and driver. TCP checksum errors under load also appear to be
332 eliminated at this point.
333
33401/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
335 Rx and Tx rings. This appears to have been affecting whether a particular
336 peer-to-peer connection would hang under high load. I believe the Rx
337 rings was typically getting set correctly, but the Tx ring wasn't getting
338 the DescEndRing bit set during initialization. ??? Does this mean the
339 hamachi card is using the DescEndRing in processing even if a particular
340 slot isn't in use -- hypothetically, the card might be searching the
341 entire Tx ring for slots with the DescOwn bit set and then processing
342 them. If the DescEndRing bit isn't set, then it might just wander off
343 through memory until it hits a chunk of data with that bit set
344 and then looping back.
345
34602/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
347 problem (TxCmd and RxCmd need only to be set when idle or stopped.
348
34902/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
350 (Michel Mueller pointed out the ``permanently busy'' potential
351 problem here).
352
35302/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
354
35502/23/1999 EPK Verified that the interrupt status field bits for Tx were
356 incorrectly defined and corrected (as per Michel Mueller).
357
35802/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
359 were available before reseting the tbusy and tx_full flags
360 (as per Michel Mueller).
361
36203/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
363
36412/31/1999 KDU Cleaned up assorted things and added Don's code to force
36532 bit.
366
36702/20/2000 KDU Some of the control was just plain odd. Cleaned up the
368hamachi_start_xmit() and hamachi_interrupt() code. There is still some
369re-structuring I would like to do.
370
37103/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
372parameters on a dual P3-450 setup yielded the new default interrupt
373mitigation parameters. Tx should interrupt VERY infrequently due to
374Eric's scheme. Rx should be more often...
375
37603/13/2000 KDU Added a patch to make the Rx Checksum code interact
377nicely with non-linux machines.
378
37903/13/2000 KDU Experimented with some of the configuration values:
380
381 -It seems that enabling PCI performance commands for descriptors
382 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
383 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
384 leave them that way until I hear further feedback.
385
386 -Increasing the PCI_LATENCY_TIMER to 130
387 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
388 degrade performance. Leaving default at 64 pending further information.
389
39003/14/2000 KDU Further tuning:
391
392 -adjusted boguscnt in hamachi_rx() to depend on interrupt
393 mitigation parameters chosen.
394
395 -Selected a set of interrupt parameters based on some extensive testing.
396 These may change with more testing.
397
398TO DO:
399
400-Consider borrowing from the acenic driver code to check PCI_COMMAND for
401PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
402that case.
403
404-fix the reset procedure. It doesn't quite work.
405*/
406
407/* A few values that may be tweaked. */
408/* Size of each temporary Rx buffer, calculated as:
409 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
410 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
411 * 2 more because we use skb_reserve.
412 */
413#define PKT_BUF_SZ 1538
414
415/* For now, this is going to be set to the maximum size of an ethernet
416 * packet. Eventually, we may want to make it a variable that is
417 * related to the MTU
418 */
419#define MAX_FRAME_SIZE 1518
420
421/* The rest of these values should never change. */
422
423static void hamachi_timer(unsigned long data);
424
425enum capability_flags {CanHaveMII=1, };
426static struct chip_info {
427 u16 vendor_id, device_id, device_id_mask, pad;
428 const char *name;
429 void (*media_timer)(unsigned long data);
430 int flags;
431} chip_tbl[] = {
432 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
433 {0,},
434};
435
436/* Offsets to the Hamachi registers. Various sizes. */
437enum hamachi_offsets {
438 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
439 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
440 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
441 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
442 TxChecksum=0x074, RxChecksum=0x076,
443 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
444 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
445 EventStatus=0x08C,
446 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
447 /* See enum MII_offsets below. */
448 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
449 AddrMode=0x0D0, StationAddr=0x0D2,
450 /* Gigabit AutoNegotiation. */
451 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
452 ANLinkPartnerAbility=0x0EA,
453 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
454 FIFOcfg=0x0F8,
455};
456
457/* Offsets to the MII-mode registers. */
458enum MII_offsets {
459 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
460 MII_Status=0xAE,
461};
462
463/* Bits in the interrupt status/mask registers. */
464enum intr_status_bits {
465 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
466 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
467 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
468
469/* The Hamachi Rx and Tx buffer descriptors. */
470struct hamachi_desc {
471 u32 status_n_length;
472#if ADDRLEN == 64
473 u32 pad;
474 u64 addr;
475#else
476 u32 addr;
477#endif
478};
479
480/* Bits in hamachi_desc.status_n_length */
481enum desc_status_bits {
482 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
483 DescIntr=0x10000000,
484};
485
486#define PRIV_ALIGN 15 /* Required alignment mask */
487#define MII_CNT 4
488struct hamachi_private {
489 /* Descriptor rings first for alignment. Tx requires a second descriptor
490 for status. */
491 struct hamachi_desc *rx_ring;
492 struct hamachi_desc *tx_ring;
493 struct sk_buff* rx_skbuff[RX_RING_SIZE];
494 struct sk_buff* tx_skbuff[TX_RING_SIZE];
495 dma_addr_t tx_ring_dma;
496 dma_addr_t rx_ring_dma;
497 struct net_device_stats stats;
498 struct timer_list timer; /* Media selection timer. */
499 /* Frequently used and paired value: keep adjacent for cache effect. */
500 spinlock_t lock;
501 int chip_id;
502 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
503 unsigned int cur_tx, dirty_tx;
504 unsigned int rx_buf_sz; /* Based on MTU+slack. */
505 unsigned int tx_full:1; /* The Tx queue is full. */
506 unsigned int duplex_lock:1;
507 unsigned int default_port:4; /* Last dev->if_port value. */
508 /* MII transceiver section. */
509 int mii_cnt; /* MII device addresses. */
510 struct mii_if_info mii_if; /* MII lib hooks/info */
511 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
512 u32 rx_int_var, tx_int_var; /* interrupt control variables */
513 u32 option; /* Hold on to a copy of the options */
514 struct pci_dev *pci_dev;
515 void __iomem *base;
516};
517
518MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
519MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
520MODULE_LICENSE("GPL");
521
522module_param(max_interrupt_work, int, 0);
523module_param(mtu, int, 0);
524module_param(debug, int, 0);
525module_param(min_rx_pkt, int, 0);
526module_param(max_rx_gap, int, 0);
527module_param(max_rx_latency, int, 0);
528module_param(min_tx_pkt, int, 0);
529module_param(max_tx_gap, int, 0);
530module_param(max_tx_latency, int, 0);
531module_param(rx_copybreak, int, 0);
532module_param_array(rx_params, int, NULL, 0);
533module_param_array(tx_params, int, NULL, 0);
534module_param_array(options, int, NULL, 0);
535module_param_array(full_duplex, int, NULL, 0);
536module_param(force32, int, 0);
537MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
538MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
539MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
540MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
541MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
542MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
543MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
544MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
545MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
546MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
547MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
548MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
549MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
550MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
551MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
552
553static int read_eeprom(void __iomem *ioaddr, int location);
554static int mdio_read(struct net_device *dev, int phy_id, int location);
555static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
556static int hamachi_open(struct net_device *dev);
557static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
558static void hamachi_timer(unsigned long data);
559static void hamachi_tx_timeout(struct net_device *dev);
560static void hamachi_init_ring(struct net_device *dev);
561static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
562static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
563static int hamachi_rx(struct net_device *dev);
564static inline int hamachi_tx(struct net_device *dev);
565static void hamachi_error(struct net_device *dev, int intr_status);
566static int hamachi_close(struct net_device *dev);
567static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
568static void set_rx_mode(struct net_device *dev);
569static struct ethtool_ops ethtool_ops;
570static struct ethtool_ops ethtool_ops_no_mii;
571
572static int __devinit hamachi_init_one (struct pci_dev *pdev,
573 const struct pci_device_id *ent)
574{
575 struct hamachi_private *hmp;
576 int option, i, rx_int_var, tx_int_var, boguscnt;
577 int chip_id = ent->driver_data;
578 int irq;
579 void __iomem *ioaddr;
580 unsigned long base;
581 static int card_idx;
582 struct net_device *dev;
583 void *ring_space;
584 dma_addr_t ring_dma;
585 int ret = -ENOMEM;
586
587/* when built into the kernel, we only print version if device is found */
588#ifndef MODULE
589 static int printed_version;
590 if (!printed_version++)
591 printk(version);
592#endif
593
594 if (pci_enable_device(pdev)) {
595 ret = -EIO;
596 goto err_out;
597 }
598
599 base = pci_resource_start(pdev, 0);
600#ifdef __alpha__ /* Really "64 bit addrs" */
601 base |= (pci_resource_start(pdev, 1) << 32);
602#endif
603
604 pci_set_master(pdev);
605
606 i = pci_request_regions(pdev, DRV_NAME);
607 if (i) return i;
608
609 irq = pdev->irq;
610 ioaddr = ioremap(base, 0x400);
611 if (!ioaddr)
612 goto err_out_release;
613
614 dev = alloc_etherdev(sizeof(struct hamachi_private));
615 if (!dev)
616 goto err_out_iounmap;
617
618 SET_MODULE_OWNER(dev);
619 SET_NETDEV_DEV(dev, &pdev->dev);
620
621#ifdef TX_CHECKSUM
622 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
623 dev->hard_header_len += 8; /* for cksum tag */
624#endif
625
626 for (i = 0; i < 6; i++)
627 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
628 : readb(ioaddr + StationAddr + i);
629
630#if ! defined(final_version)
631 if (hamachi_debug > 4)
632 for (i = 0; i < 0x10; i++)
633 printk("%2.2x%s",
634 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
635#endif
636
637 hmp = netdev_priv(dev);
638 spin_lock_init(&hmp->lock);
639
640 hmp->mii_if.dev = dev;
641 hmp->mii_if.mdio_read = mdio_read;
642 hmp->mii_if.mdio_write = mdio_write;
643 hmp->mii_if.phy_id_mask = 0x1f;
644 hmp->mii_if.reg_num_mask = 0x1f;
645
646 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
647 if (!ring_space)
648 goto err_out_cleardev;
649 hmp->tx_ring = (struct hamachi_desc *)ring_space;
650 hmp->tx_ring_dma = ring_dma;
651
652 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
653 if (!ring_space)
654 goto err_out_unmap_tx;
655 hmp->rx_ring = (struct hamachi_desc *)ring_space;
656 hmp->rx_ring_dma = ring_dma;
657
658 /* Check for options being passed in */
659 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
660 if (dev->mem_start)
661 option = dev->mem_start;
662
663 /* If the bus size is misidentified, do the following. */
664 force32 = force32 ? force32 :
665 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
666 if (force32)
667 writeb(force32, ioaddr + VirtualJumpers);
668
669 /* Hmmm, do we really need to reset the chip???. */
670 writeb(0x01, ioaddr + ChipReset);
671
672 /* After a reset, the clock speed measurement of the PCI bus will not
673 * be valid for a moment. Wait for a little while until it is. If
674 * it takes more than 10ms, forget it.
675 */
676 udelay(10);
677 i = readb(ioaddr + PCIClkMeas);
678 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
679 udelay(10);
680 i = readb(ioaddr + PCIClkMeas);
681 }
682
683 hmp->base = ioaddr;
684 dev->base_addr = (unsigned long)ioaddr;
685 dev->irq = irq;
686 pci_set_drvdata(pdev, dev);
687
688 hmp->chip_id = chip_id;
689 hmp->pci_dev = pdev;
690
691 /* The lower four bits are the media type. */
692 if (option > 0) {
693 hmp->option = option;
694 if (option & 0x200)
695 hmp->mii_if.full_duplex = 1;
696 else if (option & 0x080)
697 hmp->mii_if.full_duplex = 0;
698 hmp->default_port = option & 15;
699 if (hmp->default_port)
700 hmp->mii_if.force_media = 1;
701 }
702 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
703 hmp->mii_if.full_duplex = 1;
704
705 /* lock the duplex mode if someone specified a value */
706 if (hmp->mii_if.full_duplex || (option & 0x080))
707 hmp->duplex_lock = 1;
708
709 /* Set interrupt tuning parameters */
710 max_rx_latency = max_rx_latency & 0x00ff;
711 max_rx_gap = max_rx_gap & 0x00ff;
712 min_rx_pkt = min_rx_pkt & 0x00ff;
713 max_tx_latency = max_tx_latency & 0x00ff;
714 max_tx_gap = max_tx_gap & 0x00ff;
715 min_tx_pkt = min_tx_pkt & 0x00ff;
716
717 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
718 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
719 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
720 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
721 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
722 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
723
724
725 /* The Hamachi-specific entries in the device structure. */
726 dev->open = &hamachi_open;
727 dev->hard_start_xmit = &hamachi_start_xmit;
728 dev->stop = &hamachi_close;
729 dev->get_stats = &hamachi_get_stats;
730 dev->set_multicast_list = &set_rx_mode;
731 dev->do_ioctl = &netdev_ioctl;
732 if (chip_tbl[hmp->chip_id].flags & CanHaveMII)
733 SET_ETHTOOL_OPS(dev, &ethtool_ops);
734 else
735 SET_ETHTOOL_OPS(dev, &ethtool_ops_no_mii);
736 dev->tx_timeout = &hamachi_tx_timeout;
737 dev->watchdog_timeo = TX_TIMEOUT;
738 if (mtu)
739 dev->mtu = mtu;
740
741 i = register_netdev(dev);
742 if (i) {
743 ret = i;
744 goto err_out_unmap_rx;
745 }
746
747 printk(KERN_INFO "%s: %s type %x at %p, ",
748 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
749 ioaddr);
750 for (i = 0; i < 5; i++)
751 printk("%2.2x:", dev->dev_addr[i]);
752 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
753 i = readb(ioaddr + PCIClkMeas);
754 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
755 "%2.2x, LPA %4.4x.\n",
756 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
757 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
758 readw(ioaddr + ANLinkPartnerAbility));
759
760 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
761 int phy, phy_idx = 0;
762 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
763 int mii_status = mdio_read(dev, phy, MII_BMSR);
764 if (mii_status != 0xffff &&
765 mii_status != 0x0000) {
766 hmp->phys[phy_idx++] = phy;
767 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
768 printk(KERN_INFO "%s: MII PHY found at address %d, status "
769 "0x%4.4x advertising %4.4x.\n",
770 dev->name, phy, mii_status, hmp->mii_if.advertising);
771 }
772 }
773 hmp->mii_cnt = phy_idx;
774 if (hmp->mii_cnt > 0)
775 hmp->mii_if.phy_id = hmp->phys[0];
776 else
777 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
778 }
779 /* Configure gigabit autonegotiation. */
780 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
781 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
782 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
783
784 card_idx++;
785 return 0;
786
787err_out_unmap_rx:
788 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
789 hmp->rx_ring_dma);
790err_out_unmap_tx:
791 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
792 hmp->tx_ring_dma);
793err_out_cleardev:
794 free_netdev (dev);
795err_out_iounmap:
796 iounmap(ioaddr);
797err_out_release:
798 pci_release_regions(pdev);
799err_out:
800 return ret;
801}
802
803static int __devinit read_eeprom(void __iomem *ioaddr, int location)
804{
805 int bogus_cnt = 1000;
806
807 /* We should check busy first - per docs -KDU */
808 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
809 writew(location, ioaddr + EEAddr);
810 writeb(0x02, ioaddr + EECmdStatus);
811 bogus_cnt = 1000;
812 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
813 if (hamachi_debug > 5)
814 printk(" EEPROM status is %2.2x after %d ticks.\n",
815 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
816 return readb(ioaddr + EEData);
817}
818
819/* MII Managemen Data I/O accesses.
820 These routines assume the MDIO controller is idle, and do not exit until
821 the command is finished. */
822
823static int mdio_read(struct net_device *dev, int phy_id, int location)
824{
825 struct hamachi_private *hmp = netdev_priv(dev);
826 void __iomem *ioaddr = hmp->base;
827 int i;
828
829 /* We should check busy first - per docs -KDU */
830 for (i = 10000; i >= 0; i--)
831 if ((readw(ioaddr + MII_Status) & 1) == 0)
832 break;
833 writew((phy_id<<8) + location, ioaddr + MII_Addr);
834 writew(0x0001, ioaddr + MII_Cmd);
835 for (i = 10000; i >= 0; i--)
836 if ((readw(ioaddr + MII_Status) & 1) == 0)
837 break;
838 return readw(ioaddr + MII_Rd_Data);
839}
840
841static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
842{
843 struct hamachi_private *hmp = netdev_priv(dev);
844 void __iomem *ioaddr = hmp->base;
845 int i;
846
847 /* We should check busy first - per docs -KDU */
848 for (i = 10000; i >= 0; i--)
849 if ((readw(ioaddr + MII_Status) & 1) == 0)
850 break;
851 writew((phy_id<<8) + location, ioaddr + MII_Addr);
852 writew(value, ioaddr + MII_Wr_Data);
853
854 /* Wait for the command to finish. */
855 for (i = 10000; i >= 0; i--)
856 if ((readw(ioaddr + MII_Status) & 1) == 0)
857 break;
858 return;
859}
860
861
862static int hamachi_open(struct net_device *dev)
863{
864 struct hamachi_private *hmp = netdev_priv(dev);
865 void __iomem *ioaddr = hmp->base;
866 int i;
867 u32 rx_int_var, tx_int_var;
868 u16 fifo_info;
869
870 i = request_irq(dev->irq, &hamachi_interrupt, SA_SHIRQ, dev->name, dev);
871 if (i)
872 return i;
873
874 if (hamachi_debug > 1)
875 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
876 dev->name, dev->irq);
877
878 hamachi_init_ring(dev);
879
880#if ADDRLEN == 64
881 /* writellll anyone ? */
882 writel(cpu_to_le64(hmp->rx_ring_dma), ioaddr + RxPtr);
883 writel(cpu_to_le64(hmp->rx_ring_dma) >> 32, ioaddr + RxPtr + 4);
884 writel(cpu_to_le64(hmp->tx_ring_dma), ioaddr + TxPtr);
885 writel(cpu_to_le64(hmp->tx_ring_dma) >> 32, ioaddr + TxPtr + 4);
886#else
887 writel(cpu_to_le32(hmp->rx_ring_dma), ioaddr + RxPtr);
888 writel(cpu_to_le32(hmp->tx_ring_dma), ioaddr + TxPtr);
889#endif
890
891 /* TODO: It would make sense to organize this as words since the card
892 * documentation does. -KDU
893 */
894 for (i = 0; i < 6; i++)
895 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
896
897 /* Initialize other registers: with so many this eventually this will
898 converted to an offset/value list. */
899
900 /* Configure the FIFO */
901 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
902 switch (fifo_info){
903 case 0 :
904 /* No FIFO */
905 writew(0x0000, ioaddr + FIFOcfg);
906 break;
907 case 1 :
908 /* Configure the FIFO for 512K external, 16K used for Tx. */
909 writew(0x0028, ioaddr + FIFOcfg);
910 break;
911 case 2 :
912 /* Configure the FIFO for 1024 external, 32K used for Tx. */
913 writew(0x004C, ioaddr + FIFOcfg);
914 break;
915 case 3 :
916 /* Configure the FIFO for 2048 external, 32K used for Tx. */
917 writew(0x006C, ioaddr + FIFOcfg);
918 break;
919 default :
920 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
921 dev->name);
922 /* Default to no FIFO */
923 writew(0x0000, ioaddr + FIFOcfg);
924 break;
925 }
926
927 if (dev->if_port == 0)
928 dev->if_port = hmp->default_port;
929
930
931 /* Setting the Rx mode will start the Rx process. */
932 /* If someone didn't choose a duplex, default to full-duplex */
933 if (hmp->duplex_lock != 1)
934 hmp->mii_if.full_duplex = 1;
935
936 /* always 1, takes no more time to do it */
937 writew(0x0001, ioaddr + RxChecksum);
938#ifdef TX_CHECKSUM
939 writew(0x0001, ioaddr + TxChecksum);
940#else
941 writew(0x0000, ioaddr + TxChecksum);
942#endif
943 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
944 writew(0x215F, ioaddr + MACCnfg);
945 writew(0x000C, ioaddr + FrameGap0);
946 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
947 writew(0x1018, ioaddr + FrameGap1);
948 /* Why do we enable receives/transmits here? -KDU */
949 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
950 /* Enable automatic generation of flow control frames, period 0xffff. */
951 writel(0x0030FFFF, ioaddr + FlowCtrl);
952 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
953
954 /* Enable legacy links. */
955 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
956 /* Initial Link LED to blinking red. */
957 writeb(0x03, ioaddr + LEDCtrl);
958
959 /* Configure interrupt mitigation. This has a great effect on
960 performance, so systems tuning should start here!. */
961
962 rx_int_var = hmp->rx_int_var;
963 tx_int_var = hmp->tx_int_var;
964
965 if (hamachi_debug > 1) {
966 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
967 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
968 (tx_int_var & 0x00ff0000) >> 16);
969 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
970 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
971 (rx_int_var & 0x00ff0000) >> 16);
972 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
973 }
974
975 writel(tx_int_var, ioaddr + TxIntrCtrl);
976 writel(rx_int_var, ioaddr + RxIntrCtrl);
977
978 set_rx_mode(dev);
979
980 netif_start_queue(dev);
981
982 /* Enable interrupts by setting the interrupt mask. */
983 writel(0x80878787, ioaddr + InterruptEnable);
984 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
985
986 /* Configure and start the DMA channels. */
987 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
988#if ADDRLEN == 64
989 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
990 writew(0x005D, ioaddr + TxDMACtrl);
991#else
992 writew(0x001D, ioaddr + RxDMACtrl);
993 writew(0x001D, ioaddr + TxDMACtrl);
994#endif
995 writew(0x0001, ioaddr + RxCmd);
996
997 if (hamachi_debug > 2) {
998 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
999 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
1000 }
1001 /* Set the timer to check for link beat. */
1002 init_timer(&hmp->timer);
1003 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
1004 hmp->timer.data = (unsigned long)dev;
1005 hmp->timer.function = &hamachi_timer; /* timer handler */
1006 add_timer(&hmp->timer);
1007
1008 return 0;
1009}
1010
1011static inline int hamachi_tx(struct net_device *dev)
1012{
1013 struct hamachi_private *hmp = netdev_priv(dev);
1014
1015 /* Update the dirty pointer until we find an entry that is
1016 still owned by the card */
1017 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1018 int entry = hmp->dirty_tx % TX_RING_SIZE;
1019 struct sk_buff *skb;
1020
1021 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1022 break;
1023 /* Free the original skb. */
1024 skb = hmp->tx_skbuff[entry];
1025 if (skb != 0) {
1026 pci_unmap_single(hmp->pci_dev,
1027 hmp->tx_ring[entry].addr, skb->len,
1028 PCI_DMA_TODEVICE);
1029 dev_kfree_skb(skb);
1030 hmp->tx_skbuff[entry] = NULL;
1031 }
1032 hmp->tx_ring[entry].status_n_length = 0;
1033 if (entry >= TX_RING_SIZE-1)
1034 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1035 cpu_to_le32(DescEndRing);
1036 hmp->stats.tx_packets++;
1037 }
1038
1039 return 0;
1040}
1041
1042static void hamachi_timer(unsigned long data)
1043{
1044 struct net_device *dev = (struct net_device *)data;
1045 struct hamachi_private *hmp = netdev_priv(dev);
1046 void __iomem *ioaddr = hmp->base;
1047 int next_tick = 10*HZ;
1048
1049 if (hamachi_debug > 2) {
1050 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1051 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1052 readw(ioaddr + ANLinkPartnerAbility));
1053 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1054 "%4.4x %4.4x %4.4x.\n", dev->name,
1055 readw(ioaddr + 0x0e0),
1056 readw(ioaddr + 0x0e2),
1057 readw(ioaddr + 0x0e4),
1058 readw(ioaddr + 0x0e6),
1059 readw(ioaddr + 0x0e8),
1060 readw(ioaddr + 0x0eA));
1061 }
1062 /* We could do something here... nah. */
1063 hmp->timer.expires = RUN_AT(next_tick);
1064 add_timer(&hmp->timer);
1065}
1066
1067static void hamachi_tx_timeout(struct net_device *dev)
1068{
1069 int i;
1070 struct hamachi_private *hmp = netdev_priv(dev);
1071 void __iomem *ioaddr = hmp->base;
1072
1073 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1074 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1075
1076 {
1077 int i;
1078 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1079 for (i = 0; i < RX_RING_SIZE; i++)
1080 printk(" %8.8x", (unsigned int)hmp->rx_ring[i].status_n_length);
1081 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1082 for (i = 0; i < TX_RING_SIZE; i++)
1083 printk(" %4.4x", hmp->tx_ring[i].status_n_length);
1084 printk("\n");
1085 }
1086
1087 /* Reinit the hardware and make sure the Rx and Tx processes
1088 are up and running.
1089 */
1090 dev->if_port = 0;
1091 /* The right way to do Reset. -KDU
1092 * -Clear OWN bit in all Rx/Tx descriptors
1093 * -Wait 50 uS for channels to go idle
1094 * -Turn off MAC receiver
1095 * -Issue Reset
1096 */
1097
1098 for (i = 0; i < RX_RING_SIZE; i++)
1099 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1100
1101 /* Presume that all packets in the Tx queue are gone if we have to
1102 * re-init the hardware.
1103 */
1104 for (i = 0; i < TX_RING_SIZE; i++){
1105 struct sk_buff *skb;
1106
1107 if (i >= TX_RING_SIZE - 1)
1108 hmp->tx_ring[i].status_n_length = cpu_to_le32(
1109 DescEndRing |
1110 (hmp->tx_ring[i].status_n_length & 0x0000FFFF));
1111 else
1112 hmp->tx_ring[i].status_n_length &= 0x0000ffff;
1113 skb = hmp->tx_skbuff[i];
1114 if (skb){
1115 pci_unmap_single(hmp->pci_dev, hmp->tx_ring[i].addr,
1116 skb->len, PCI_DMA_TODEVICE);
1117 dev_kfree_skb(skb);
1118 hmp->tx_skbuff[i] = NULL;
1119 }
1120 }
1121
1122 udelay(60); /* Sleep 60 us just for safety sake */
1123 writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1124
1125 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1126
1127 hmp->tx_full = 0;
1128 hmp->cur_rx = hmp->cur_tx = 0;
1129 hmp->dirty_rx = hmp->dirty_tx = 0;
1130 /* Rx packets are also presumed lost; however, we need to make sure a
1131 * ring of buffers is in tact. -KDU
1132 */
1133 for (i = 0; i < RX_RING_SIZE; i++){
1134 struct sk_buff *skb = hmp->rx_skbuff[i];
1135
1136 if (skb){
1137 pci_unmap_single(hmp->pci_dev, hmp->rx_ring[i].addr,
1138 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1139 dev_kfree_skb(skb);
1140 hmp->rx_skbuff[i] = NULL;
1141 }
1142 }
1143 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1144 for (i = 0; i < RX_RING_SIZE; i++) {
1145 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1146 hmp->rx_skbuff[i] = skb;
1147 if (skb == NULL)
1148 break;
1149 skb->dev = dev; /* Mark as being used by this device. */
1150 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1151 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1152 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1153 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1154 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1155 }
1156 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1157 /* Mark the last entry as wrapping the ring. */
1158 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1159
1160 /* Trigger an immediate transmit demand. */
1161 dev->trans_start = jiffies;
1162 hmp->stats.tx_errors++;
1163
1164 /* Restart the chip's Tx/Rx processes . */
1165 writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1166 writew(0x0001, ioaddr + TxCmd); /* START Tx */
1167 writew(0x0001, ioaddr + RxCmd); /* START Rx */
1168
1169 netif_wake_queue(dev);
1170}
1171
1172
1173/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1174static void hamachi_init_ring(struct net_device *dev)
1175{
1176 struct hamachi_private *hmp = netdev_priv(dev);
1177 int i;
1178
1179 hmp->tx_full = 0;
1180 hmp->cur_rx = hmp->cur_tx = 0;
1181 hmp->dirty_rx = hmp->dirty_tx = 0;
1182
1183#if 0
1184 /* This is wrong. I'm not sure what the original plan was, but this
1185 * is wrong. An MTU of 1 gets you a buffer of 1536, while an MTU
1186 * of 1501 gets a buffer of 1533? -KDU
1187 */
1188 hmp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1189#endif
1190 /* My attempt at a reasonable correction */
1191 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1192 * card needs room to do 8 byte alignment, +2 so we can reserve
1193 * the first 2 bytes, and +16 gets room for the status word from the
1194 * card. -KDU
1195 */
1196 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1197 (((dev->mtu+26+7) & ~7) + 2 + 16));
1198
1199 /* Initialize all Rx descriptors. */
1200 for (i = 0; i < RX_RING_SIZE; i++) {
1201 hmp->rx_ring[i].status_n_length = 0;
1202 hmp->rx_skbuff[i] = NULL;
1203 }
1204 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1205 for (i = 0; i < RX_RING_SIZE; i++) {
1206 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1207 hmp->rx_skbuff[i] = skb;
1208 if (skb == NULL)
1209 break;
1210 skb->dev = dev; /* Mark as being used by this device. */
1211 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1212 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1213 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1214 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1215 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1216 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1217 }
1218 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1219 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1220
1221 for (i = 0; i < TX_RING_SIZE; i++) {
1222 hmp->tx_skbuff[i] = NULL;
1223 hmp->tx_ring[i].status_n_length = 0;
1224 }
1225 /* Mark the last entry of the ring */
1226 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1227
1228 return;
1229}
1230
1231
1232#ifdef TX_CHECKSUM
1233#define csum_add(it, val) \
1234do { \
1235 it += (u16) (val); \
1236 if (it & 0xffff0000) { \
1237 it &= 0xffff; \
1238 ++it; \
1239 } \
1240} while (0)
1241 /* printk("add %04x --> %04x\n", val, it); \ */
1242
1243/* uh->len already network format, do not swap */
1244#define pseudo_csum_udp(sum,ih,uh) do { \
1245 sum = 0; \
1246 csum_add(sum, (ih)->saddr >> 16); \
1247 csum_add(sum, (ih)->saddr & 0xffff); \
1248 csum_add(sum, (ih)->daddr >> 16); \
1249 csum_add(sum, (ih)->daddr & 0xffff); \
1250 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1251 csum_add(sum, (uh)->len); \
1252} while (0)
1253
1254/* swap len */
1255#define pseudo_csum_tcp(sum,ih,len) do { \
1256 sum = 0; \
1257 csum_add(sum, (ih)->saddr >> 16); \
1258 csum_add(sum, (ih)->saddr & 0xffff); \
1259 csum_add(sum, (ih)->daddr >> 16); \
1260 csum_add(sum, (ih)->daddr & 0xffff); \
1261 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1262 csum_add(sum, htons(len)); \
1263} while (0)
1264#endif
1265
1266static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1267{
1268 struct hamachi_private *hmp = netdev_priv(dev);
1269 unsigned entry;
1270 u16 status;
1271
1272 /* Ok, now make sure that the queue has space before trying to
1273 add another skbuff. if we return non-zero the scheduler
1274 should interpret this as a queue full and requeue the buffer
1275 for later.
1276 */
1277 if (hmp->tx_full) {
1278 /* We should NEVER reach this point -KDU */
1279 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1280
1281 /* Wake the potentially-idle transmit channel. */
1282 /* If we don't need to read status, DON'T -KDU */
1283 status=readw(hmp->base + TxStatus);
1284 if( !(status & 0x0001) || (status & 0x0002))
1285 writew(0x0001, hmp->base + TxCmd);
1286 return 1;
1287 }
1288
1289 /* Caution: the write order is important here, set the field
1290 with the "ownership" bits last. */
1291
1292 /* Calculate the next Tx descriptor entry. */
1293 entry = hmp->cur_tx % TX_RING_SIZE;
1294
1295 hmp->tx_skbuff[entry] = skb;
1296
1297#ifdef TX_CHECKSUM
1298 {
1299 /* tack on checksum tag */
1300 u32 tagval = 0;
1301 struct ethhdr *eh = (struct ethhdr *)skb->data;
1302 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1303 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1304 if (ih->protocol == IPPROTO_UDP) {
1305 struct udphdr *uh
1306 = (struct udphdr *)((char *)ih + ih->ihl*4);
1307 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1308 u32 pseudo;
1309 pseudo_csum_udp(pseudo, ih, uh);
1310 pseudo = htons(pseudo);
1311 printk("udp cksum was %04x, sending pseudo %04x\n",
1312 uh->check, pseudo);
1313 uh->check = 0; /* zero out uh->check before card calc */
1314 /*
1315 * start at 14 (skip ethhdr), store at offset (uh->check),
1316 * use pseudo value given.
1317 */
1318 tagval = (14 << 24) | (offset << 16) | pseudo;
1319 } else if (ih->protocol == IPPROTO_TCP) {
1320 printk("tcp, no auto cksum\n");
1321 }
1322 }
1323 *(u32 *)skb_push(skb, 8) = tagval;
1324 }
1325#endif
1326
1327 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1328 skb->data, skb->len, PCI_DMA_TODEVICE));
1329
1330 /* Hmmmm, could probably put a DescIntr on these, but the way
1331 the driver is currently coded makes Tx interrupts unnecessary
1332 since the clearing of the Tx ring is handled by the start_xmit
1333 routine. This organization helps mitigate the interrupts a
1334 bit and probably renders the max_tx_latency param useless.
1335
1336 Update: Putting a DescIntr bit on all of the descriptors and
1337 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1338 */
1339 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1340 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1341 DescEndPacket | DescEndRing | DescIntr | skb->len);
1342 else
1343 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1344 DescEndPacket | DescIntr | skb->len);
1345 hmp->cur_tx++;
1346
1347 /* Non-x86 Todo: explicitly flush cache lines here. */
1348
1349 /* Wake the potentially-idle transmit channel. */
1350 /* If we don't need to read status, DON'T -KDU */
1351 status=readw(hmp->base + TxStatus);
1352 if( !(status & 0x0001) || (status & 0x0002))
1353 writew(0x0001, hmp->base + TxCmd);
1354
1355 /* Immediately before returning, let's clear as many entries as we can. */
1356 hamachi_tx(dev);
1357
1358 /* We should kick the bottom half here, since we are not accepting
1359 * interrupts with every packet. i.e. realize that Gigabit ethernet
1360 * can transmit faster than ordinary machines can load packets;
1361 * hence, any packet that got put off because we were in the transmit
1362 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1363 */
1364 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1365 netif_wake_queue(dev); /* Typical path */
1366 else {
1367 hmp->tx_full = 1;
1368 netif_stop_queue(dev);
1369 }
1370 dev->trans_start = jiffies;
1371
1372 if (hamachi_debug > 4) {
1373 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1374 dev->name, hmp->cur_tx, entry);
1375 }
1376 return 0;
1377}
1378
1379/* The interrupt handler does all of the Rx thread work and cleans up
1380 after the Tx thread. */
1381static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *rgs)
1382{
1383 struct net_device *dev = dev_instance;
1384 struct hamachi_private *hmp = netdev_priv(dev);
1385 void __iomem *ioaddr = hmp->base;
1386 long boguscnt = max_interrupt_work;
1387 int handled = 0;
1388
1389#ifndef final_version /* Can never occur. */
1390 if (dev == NULL) {
1391 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1392 return IRQ_NONE;
1393 }
1394#endif
1395
1396 spin_lock(&hmp->lock);
1397
1398 do {
1399 u32 intr_status = readl(ioaddr + InterruptClear);
1400
1401 if (hamachi_debug > 4)
1402 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1403 dev->name, intr_status);
1404
1405 if (intr_status == 0)
1406 break;
1407
1408 handled = 1;
1409
1410 if (intr_status & IntrRxDone)
1411 hamachi_rx(dev);
1412
1413 if (intr_status & IntrTxDone){
1414 /* This code should RARELY need to execute. After all, this is
1415 * a gigabit link, it should consume packets as fast as we put
1416 * them in AND we clear the Tx ring in hamachi_start_xmit().
1417 */
1418 if (hmp->tx_full){
1419 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1420 int entry = hmp->dirty_tx % TX_RING_SIZE;
1421 struct sk_buff *skb;
1422
1423 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1424 break;
1425 skb = hmp->tx_skbuff[entry];
1426 /* Free the original skb. */
1427 if (skb){
1428 pci_unmap_single(hmp->pci_dev,
1429 hmp->tx_ring[entry].addr,
1430 skb->len,
1431 PCI_DMA_TODEVICE);
1432 dev_kfree_skb_irq(skb);
1433 hmp->tx_skbuff[entry] = NULL;
1434 }
1435 hmp->tx_ring[entry].status_n_length = 0;
1436 if (entry >= TX_RING_SIZE-1)
1437 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1438 cpu_to_le32(DescEndRing);
1439 hmp->stats.tx_packets++;
1440 }
1441 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1442 /* The ring is no longer full */
1443 hmp->tx_full = 0;
1444 netif_wake_queue(dev);
1445 }
1446 } else {
1447 netif_wake_queue(dev);
1448 }
1449 }
1450
1451
1452 /* Abnormal error summary/uncommon events handlers. */
1453 if (intr_status &
1454 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1455 LinkChange | NegotiationChange | StatsMax))
1456 hamachi_error(dev, intr_status);
1457
1458 if (--boguscnt < 0) {
1459 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1460 dev->name, intr_status);
1461 break;
1462 }
1463 } while (1);
1464
1465 if (hamachi_debug > 3)
1466 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1467 dev->name, readl(ioaddr + IntrStatus));
1468
1469#ifndef final_version
1470 /* Code that should never be run! Perhaps remove after testing.. */
1471 {
1472 static int stopit = 10;
1473 if (dev->start == 0 && --stopit < 0) {
1474 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1475 dev->name);
1476 free_irq(irq, dev);
1477 }
1478 }
1479#endif
1480
1481 spin_unlock(&hmp->lock);
1482 return IRQ_RETVAL(handled);
1483}
1484
1485/* This routine is logically part of the interrupt handler, but separated
1486 for clarity and better register allocation. */
1487static int hamachi_rx(struct net_device *dev)
1488{
1489 struct hamachi_private *hmp = netdev_priv(dev);
1490 int entry = hmp->cur_rx % RX_RING_SIZE;
1491 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1492
1493 if (hamachi_debug > 4) {
1494 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1495 entry, hmp->rx_ring[entry].status_n_length);
1496 }
1497
1498 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1499 while (1) {
1500 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1501 u32 desc_status = le32_to_cpu(desc->status_n_length);
1502 u16 data_size = desc_status; /* Implicit truncate */
1503 u8 *buf_addr;
1504 s32 frame_status;
1505
1506 if (desc_status & DescOwn)
1507 break;
1508 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1509 desc->addr,
1510 hmp->rx_buf_sz,
1511 PCI_DMA_FROMDEVICE);
1512 buf_addr = (u8 *) hmp->rx_skbuff[entry]->tail;
1513 frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12])));
1514 if (hamachi_debug > 4)
1515 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1516 frame_status);
1517 if (--boguscnt < 0)
1518 break;
1519 if ( ! (desc_status & DescEndPacket)) {
1520 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1521 "multiple buffers, entry %#x length %d status %4.4x!\n",
1522 dev->name, hmp->cur_rx, data_size, desc_status);
1523 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1524 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1525 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1526 dev->name,
1527 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0xffff0000,
1528 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0x0000ffff,
1529 hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length);
1530 hmp->stats.rx_length_errors++;
1531 } /* else Omit for prototype errata??? */
1532 if (frame_status & 0x00380000) {
1533 /* There was an error. */
1534 if (hamachi_debug > 2)
1535 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1536 frame_status);
1537 hmp->stats.rx_errors++;
1538 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1539 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1540 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1541 if (frame_status < 0) hmp->stats.rx_dropped++;
1542 } else {
1543 struct sk_buff *skb;
1544 /* Omit CRC */
1545 u16 pkt_len = (frame_status & 0x07ff) - 4;
1546#ifdef RX_CHECKSUM
1547 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1548#endif
1549
1550
1551#ifndef final_version
1552 if (hamachi_debug > 4)
1553 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1554 " of %d, bogus_cnt %d.\n",
1555 pkt_len, data_size, boguscnt);
1556 if (hamachi_debug > 5)
1557 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1558 dev->name,
1559 *(s32*)&(buf_addr[data_size - 20]),
1560 *(s32*)&(buf_addr[data_size - 16]),
1561 *(s32*)&(buf_addr[data_size - 12]),
1562 *(s32*)&(buf_addr[data_size - 8]),
1563 *(s32*)&(buf_addr[data_size - 4]));
1564#endif
1565 /* Check if the packet is long enough to accept without copying
1566 to a minimally-sized skbuff. */
1567 if (pkt_len < rx_copybreak
1568 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1569#ifdef RX_CHECKSUM
1570 printk(KERN_ERR "%s: rx_copybreak non-zero "
1571 "not good with RX_CHECKSUM\n", dev->name);
1572#endif
1573 skb->dev = dev;
1574 skb_reserve(skb, 2); /* 16 byte align the IP header */
1575 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1576 hmp->rx_ring[entry].addr,
1577 hmp->rx_buf_sz,
1578 PCI_DMA_FROMDEVICE);
1579 /* Call copy + cksum if available. */
1580#if 1 || USE_IP_COPYSUM
1581 eth_copy_and_sum(skb,
1582 hmp->rx_skbuff[entry]->data, pkt_len, 0);
1583 skb_put(skb, pkt_len);
1584#else
1585 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1586 + entry*sizeof(*desc), pkt_len);
1587#endif
1588 pci_dma_sync_single_for_device(hmp->pci_dev,
1589 hmp->rx_ring[entry].addr,
1590 hmp->rx_buf_sz,
1591 PCI_DMA_FROMDEVICE);
1592 } else {
1593 pci_unmap_single(hmp->pci_dev,
1594 hmp->rx_ring[entry].addr,
1595 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1596 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1597 hmp->rx_skbuff[entry] = NULL;
1598 }
1599 skb->protocol = eth_type_trans(skb, dev);
1600
1601
1602#ifdef RX_CHECKSUM
1603 /* TCP or UDP on ipv4, DIX encoding */
1604 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1605 struct iphdr *ih = (struct iphdr *) skb->data;
1606 /* Check that IP packet is at least 46 bytes, otherwise,
1607 * there may be pad bytes included in the hardware checksum.
1608 * This wouldn't happen if everyone padded with 0.
1609 */
1610 if (ntohs(ih->tot_len) >= 46){
1611 /* don't worry about frags */
1612 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1613 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1614 u32 *p = (u32 *) &buf_addr[data_size - 20];
1615 register u32 crc, p_r, p_r1;
1616
1617 if (inv & 4) {
1618 inv &= ~4;
1619 --p;
1620 }
1621 p_r = *p;
1622 p_r1 = *(p-1);
1623 switch (inv) {
1624 case 0:
1625 crc = (p_r & 0xffff) + (p_r >> 16);
1626 break;
1627 case 1:
1628 crc = (p_r >> 16) + (p_r & 0xffff)
1629 + (p_r1 >> 16 & 0xff00);
1630 break;
1631 case 2:
1632 crc = p_r + (p_r1 >> 16);
1633 break;
1634 case 3:
1635 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1636 break;
1637 default: /*NOTREACHED*/ crc = 0;
1638 }
1639 if (crc & 0xffff0000) {
1640 crc &= 0xffff;
1641 ++crc;
1642 }
1643 /* tcp/udp will add in pseudo */
1644 skb->csum = ntohs(pfck & 0xffff);
1645 if (skb->csum > crc)
1646 skb->csum -= crc;
1647 else
1648 skb->csum += (~crc & 0xffff);
1649 /*
1650 * could do the pseudo myself and return
1651 * CHECKSUM_UNNECESSARY
1652 */
1653 skb->ip_summed = CHECKSUM_HW;
1654 }
1655 }
1656 }
1657#endif /* RX_CHECKSUM */
1658
1659 netif_rx(skb);
1660 dev->last_rx = jiffies;
1661 hmp->stats.rx_packets++;
1662 }
1663 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1664 }
1665
1666 /* Refill the Rx ring buffers. */
1667 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1668 struct hamachi_desc *desc;
1669
1670 entry = hmp->dirty_rx % RX_RING_SIZE;
1671 desc = &(hmp->rx_ring[entry]);
1672 if (hmp->rx_skbuff[entry] == NULL) {
1673 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1674
1675 hmp->rx_skbuff[entry] = skb;
1676 if (skb == NULL)
1677 break; /* Better luck next round. */
1678 skb->dev = dev; /* Mark as being used by this device. */
1679 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1680 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1681 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1682 }
1683 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1684 if (entry >= RX_RING_SIZE-1)
1685 desc->status_n_length |= cpu_to_le32(DescOwn |
1686 DescEndPacket | DescEndRing | DescIntr);
1687 else
1688 desc->status_n_length |= cpu_to_le32(DescOwn |
1689 DescEndPacket | DescIntr);
1690 }
1691
1692 /* Restart Rx engine if stopped. */
1693 /* If we don't need to check status, don't. -KDU */
1694 if (readw(hmp->base + RxStatus) & 0x0002)
1695 writew(0x0001, hmp->base + RxCmd);
1696
1697 return 0;
1698}
1699
1700/* This is more properly named "uncommon interrupt events", as it covers more
1701 than just errors. */
1702static void hamachi_error(struct net_device *dev, int intr_status)
1703{
1704 struct hamachi_private *hmp = netdev_priv(dev);
1705 void __iomem *ioaddr = hmp->base;
1706
1707 if (intr_status & (LinkChange|NegotiationChange)) {
1708 if (hamachi_debug > 1)
1709 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1710 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1711 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1712 readw(ioaddr + ANLinkPartnerAbility),
1713 readl(ioaddr + IntrStatus));
1714 if (readw(ioaddr + ANStatus) & 0x20)
1715 writeb(0x01, ioaddr + LEDCtrl);
1716 else
1717 writeb(0x03, ioaddr + LEDCtrl);
1718 }
1719 if (intr_status & StatsMax) {
1720 hamachi_get_stats(dev);
1721 /* Read the overflow bits to clear. */
1722 readl(ioaddr + 0x370);
1723 readl(ioaddr + 0x3F0);
1724 }
1725 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1726 && hamachi_debug)
1727 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1728 dev->name, intr_status);
1729 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1730 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1731 hmp->stats.tx_fifo_errors++;
1732 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1733 hmp->stats.rx_fifo_errors++;
1734}
1735
1736static int hamachi_close(struct net_device *dev)
1737{
1738 struct hamachi_private *hmp = netdev_priv(dev);
1739 void __iomem *ioaddr = hmp->base;
1740 struct sk_buff *skb;
1741 int i;
1742
1743 netif_stop_queue(dev);
1744
1745 if (hamachi_debug > 1) {
1746 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1747 dev->name, readw(ioaddr + TxStatus),
1748 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1749 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1750 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1751 }
1752
1753 /* Disable interrupts by clearing the interrupt mask. */
1754 writel(0x0000, ioaddr + InterruptEnable);
1755
1756 /* Stop the chip's Tx and Rx processes. */
1757 writel(2, ioaddr + RxCmd);
1758 writew(2, ioaddr + TxCmd);
1759
1760#ifdef __i386__
1761 if (hamachi_debug > 2) {
1762 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1763 (int)hmp->tx_ring_dma);
1764 for (i = 0; i < TX_RING_SIZE; i++)
1765 printk(" %c #%d desc. %8.8x %8.8x.\n",
1766 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1767 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1768 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1769 (int)hmp->rx_ring_dma);
1770 for (i = 0; i < RX_RING_SIZE; i++) {
1771 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1772 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1773 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1774 if (hamachi_debug > 6) {
1775 if (*(u8*)hmp->rx_skbuff[i]->tail != 0x69) {
1776 u16 *addr = (u16 *)
1777 hmp->rx_skbuff[i]->tail;
1778 int j;
1779
1780 for (j = 0; j < 0x50; j++)
1781 printk(" %4.4x", addr[j]);
1782 printk("\n");
1783 }
1784 }
1785 }
1786 }
1787#endif /* __i386__ debugging only */
1788
1789 free_irq(dev->irq, dev);
1790
1791 del_timer_sync(&hmp->timer);
1792
1793 /* Free all the skbuffs in the Rx queue. */
1794 for (i = 0; i < RX_RING_SIZE; i++) {
1795 skb = hmp->rx_skbuff[i];
1796 hmp->rx_ring[i].status_n_length = 0;
1797 hmp->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
1798 if (skb) {
1799 pci_unmap_single(hmp->pci_dev,
1800 hmp->rx_ring[i].addr, hmp->rx_buf_sz,
1801 PCI_DMA_FROMDEVICE);
1802 dev_kfree_skb(skb);
1803 hmp->rx_skbuff[i] = NULL;
1804 }
1805 }
1806 for (i = 0; i < TX_RING_SIZE; i++) {
1807 skb = hmp->tx_skbuff[i];
1808 if (skb) {
1809 pci_unmap_single(hmp->pci_dev,
1810 hmp->tx_ring[i].addr, skb->len,
1811 PCI_DMA_TODEVICE);
1812 dev_kfree_skb(skb);
1813 hmp->tx_skbuff[i] = NULL;
1814 }
1815 }
1816
1817 writeb(0x00, ioaddr + LEDCtrl);
1818
1819 return 0;
1820}
1821
1822static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1823{
1824 struct hamachi_private *hmp = netdev_priv(dev);
1825 void __iomem *ioaddr = hmp->base;
1826
1827 /* We should lock this segment of code for SMP eventually, although
1828 the vulnerability window is very small and statistics are
1829 non-critical. */
1830 /* Ok, what goes here? This appears to be stuck at 21 packets
1831 according to ifconfig. It does get incremented in hamachi_tx(),
1832 so I think I'll comment it out here and see if better things
1833 happen.
1834 */
1835 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1836
1837 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1838 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1839 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1840
1841 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1842 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1843 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1844 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1845 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1846
1847 return &hmp->stats;
1848}
1849
1850static void set_rx_mode(struct net_device *dev)
1851{
1852 struct hamachi_private *hmp = netdev_priv(dev);
1853 void __iomem *ioaddr = hmp->base;
1854
1855 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1856 /* Unconditionally log net taps. */
1857 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1858 writew(0x000F, ioaddr + AddrMode);
1859 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1860 /* Too many to match, or accept all multicasts. */
1861 writew(0x000B, ioaddr + AddrMode);
1862 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1863 struct dev_mc_list *mclist;
1864 int i;
1865 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1866 i++, mclist = mclist->next) {
1867 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1868 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1869 ioaddr + 0x104 + i*8);
1870 }
1871 /* Clear remaining entries. */
1872 for (; i < 64; i++)
1873 writel(0, ioaddr + 0x104 + i*8);
1874 writew(0x0003, ioaddr + AddrMode);
1875 } else { /* Normal, unicast/broadcast-only mode. */
1876 writew(0x0001, ioaddr + AddrMode);
1877 }
1878}
1879
1880static int check_if_running(struct net_device *dev)
1881{
1882 if (!netif_running(dev))
1883 return -EINVAL;
1884 return 0;
1885}
1886
1887static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1888{
1889 struct hamachi_private *np = netdev_priv(dev);
1890 strcpy(info->driver, DRV_NAME);
1891 strcpy(info->version, DRV_VERSION);
1892 strcpy(info->bus_info, pci_name(np->pci_dev));
1893}
1894
1895static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1896{
1897 struct hamachi_private *np = netdev_priv(dev);
1898 spin_lock_irq(&np->lock);
1899 mii_ethtool_gset(&np->mii_if, ecmd);
1900 spin_unlock_irq(&np->lock);
1901 return 0;
1902}
1903
1904static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1905{
1906 struct hamachi_private *np = netdev_priv(dev);
1907 int res;
1908 spin_lock_irq(&np->lock);
1909 res = mii_ethtool_sset(&np->mii_if, ecmd);
1910 spin_unlock_irq(&np->lock);
1911 return res;
1912}
1913
1914static int hamachi_nway_reset(struct net_device *dev)
1915{
1916 struct hamachi_private *np = netdev_priv(dev);
1917 return mii_nway_restart(&np->mii_if);
1918}
1919
1920static u32 hamachi_get_link(struct net_device *dev)
1921{
1922 struct hamachi_private *np = netdev_priv(dev);
1923 return mii_link_ok(&np->mii_if);
1924}
1925
1926static struct ethtool_ops ethtool_ops = {
1927 .begin = check_if_running,
1928 .get_drvinfo = hamachi_get_drvinfo,
1929 .get_settings = hamachi_get_settings,
1930 .set_settings = hamachi_set_settings,
1931 .nway_reset = hamachi_nway_reset,
1932 .get_link = hamachi_get_link,
1933};
1934
1935static struct ethtool_ops ethtool_ops_no_mii = {
1936 .begin = check_if_running,
1937 .get_drvinfo = hamachi_get_drvinfo,
1938};
1939
1940static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1941{
1942 struct hamachi_private *np = netdev_priv(dev);
1943 struct mii_ioctl_data *data = if_mii(rq);
1944 int rc;
1945
1946 if (!netif_running(dev))
1947 return -EINVAL;
1948
1949 if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1950 u32 *d = (u32 *)&rq->ifr_ifru;
1951 /* Should add this check here or an ordinary user can do nasty
1952 * things. -KDU
1953 *
1954 * TODO: Shut down the Rx and Tx engines while doing this.
1955 */
1956 if (!capable(CAP_NET_ADMIN))
1957 return -EPERM;
1958 writel(d[0], np->base + TxIntrCtrl);
1959 writel(d[1], np->base + RxIntrCtrl);
1960 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1961 (u32) readl(np->base + TxIntrCtrl),
1962 (u32) readl(np->base + RxIntrCtrl));
1963 rc = 0;
1964 }
1965
1966 else {
1967 spin_lock_irq(&np->lock);
1968 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1969 spin_unlock_irq(&np->lock);
1970 }
1971
1972 return rc;
1973}
1974
1975
1976static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1977{
1978 struct net_device *dev = pci_get_drvdata(pdev);
1979
1980 if (dev) {
1981 struct hamachi_private *hmp = netdev_priv(dev);
1982
1983 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1984 hmp->rx_ring_dma);
1985 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1986 hmp->tx_ring_dma);
1987 unregister_netdev(dev);
1988 iounmap(hmp->base);
1989 free_netdev(dev);
1990 pci_release_regions(pdev);
1991 pci_set_drvdata(pdev, NULL);
1992 }
1993}
1994
1995static struct pci_device_id hamachi_pci_tbl[] = {
1996 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1997 { 0, }
1998};
1999MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
2000
2001static struct pci_driver hamachi_driver = {
2002 .name = DRV_NAME,
2003 .id_table = hamachi_pci_tbl,
2004 .probe = hamachi_init_one,
2005 .remove = __devexit_p(hamachi_remove_one),
2006};
2007
2008static int __init hamachi_init (void)
2009{
2010/* when a module, this is printed whether or not devices are found in probe */
2011#ifdef MODULE
2012 printk(version);
2013#endif
2014 return pci_register_driver(&hamachi_driver);
2015}
2016
2017static void __exit hamachi_exit (void)
2018{
2019 pci_unregister_driver(&hamachi_driver);
2020}
2021
2022
2023module_init(hamachi_init);
2024module_exit(hamachi_exit);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 13:59:14 -0500