1 files changed, 14 insertions, 13 deletions

diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 99a4b990939f..587afe7be689 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -131,8 +131,6 @@ static void free_skb_resources(struct gfar_private *priv);
 static void gfar_set_multi(struct net_device *dev);
 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr);
 static void gfar_configure_serdes(struct net_device *dev);
-extern int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id, int regnum, u16 value);
-extern int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum);
 #ifdef CONFIG_GFAR_NAPI
 static int gfar_poll(struct napi_struct *napi, int budget);
 #endif
@@ -477,24 +475,30 @@ static int init_phy(struct net_device *dev)
         return 0;
 }
 
+/*
+ * Initialize TBI PHY interface for communicating with the
+ * SERDES lynx PHY on the chip.  We communicate with this PHY
+ * through the MDIO bus on each controller, treating it as a
+ * "normal" PHY at the address found in the TBIPA register.  We assume
+ * that the TBIPA register is valid.  Either the MDIO bus code will set
+ * it to a value that doesn't conflict with other PHYs on the bus, or the
+ * value doesn't matter, as there are no other PHYs on the bus.
+ */
 static void gfar_configure_serdes(struct net_device *dev)
 {
         struct gfar_private *priv = netdev_priv(dev);
         struct gfar_mii __iomem *regs =
                         (void __iomem *)&priv->regs->gfar_mii_regs;
+        int tbipa = gfar_read(&priv->regs->tbipa);
 
-        /* Initialise TBI i/f to communicate with serdes (lynx phy) */
+        /* Single clk mode, mii mode off(for serdes communication) */
+        gfar_local_mdio_write(regs, tbipa, MII_TBICON, TBICON_CLK_SELECT);
 
-        /* Single clk mode, mii mode off(for aerdes communication) */
-        gfar_local_mdio_write(regs, TBIPA_VALUE, MII_TBICON, TBICON_CLK_SELECT);
-
-        /* Supported pause and full-duplex, no half-duplex */
-        gfar_local_mdio_write(regs, TBIPA_VALUE, MII_ADVERTISE,
+        gfar_local_mdio_write(regs, tbipa, MII_ADVERTISE,
                         ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
                         ADVERTISE_1000XPSE_ASYM);
 
-        /* ANEG enable, restart ANEG, full duplex mode, speed[1] set */
-        gfar_local_mdio_write(regs, TBIPA_VALUE, MII_BMCR, BMCR_ANENABLE |
+        gfar_local_mdio_write(regs, tbipa, MII_BMCR, BMCR_ANENABLE |
                         BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
 }
 
@@ -541,9 +545,6 @@ static void init_registers(struct net_device *dev)
 
         /* Initialize the Minimum Frame Length Register */
         gfar_write(&priv->regs->minflr, MINFLR_INIT_SETTINGS);
-
-        /* Assign the TBI an address which won't conflict with the PHYs */
-        gfar_write(&priv->regs->tbipa, TBIPA_VALUE);
 }