diff options
Diffstat (limited to 'drivers/net/forcedeth.c')
-rw-r--r-- | drivers/net/forcedeth.c | 189 |
1 files changed, 110 insertions, 79 deletions
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index ae6cf7827e57..9f6b9d446e98 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -173,9 +173,10 @@ | |||
173 | #define DEV_HAS_MSI_X 0x0080 /* device supports MSI-X */ | 173 | #define DEV_HAS_MSI_X 0x0080 /* device supports MSI-X */ |
174 | #define DEV_HAS_POWER_CNTRL 0x0100 /* device supports power savings */ | 174 | #define DEV_HAS_POWER_CNTRL 0x0100 /* device supports power savings */ |
175 | #define DEV_HAS_PAUSEFRAME_TX 0x0200 /* device supports tx pause frames */ | 175 | #define DEV_HAS_PAUSEFRAME_TX 0x0200 /* device supports tx pause frames */ |
176 | #define DEV_HAS_STATISTICS 0x0400 /* device supports hw statistics */ | 176 | #define DEV_HAS_STATISTICS_V1 0x0400 /* device supports hw statistics version 1 */ |
177 | #define DEV_HAS_TEST_EXTENDED 0x0800 /* device supports extended diagnostic test */ | 177 | #define DEV_HAS_STATISTICS_V2 0x0800 /* device supports hw statistics version 2 */ |
178 | #define DEV_HAS_MGMT_UNIT 0x1000 /* device supports management unit */ | 178 | #define DEV_HAS_TEST_EXTENDED 0x1000 /* device supports extended diagnostic test */ |
179 | #define DEV_HAS_MGMT_UNIT 0x2000 /* device supports management unit */ | ||
179 | 180 | ||
180 | enum { | 181 | enum { |
181 | NvRegIrqStatus = 0x000, | 182 | NvRegIrqStatus = 0x000, |
@@ -487,7 +488,8 @@ union ring_type { | |||
487 | 488 | ||
488 | /* Miscelaneous hardware related defines: */ | 489 | /* Miscelaneous hardware related defines: */ |
489 | #define NV_PCI_REGSZ_VER1 0x270 | 490 | #define NV_PCI_REGSZ_VER1 0x270 |
490 | #define NV_PCI_REGSZ_VER2 0x604 | 491 | #define NV_PCI_REGSZ_VER2 0x2d4 |
492 | #define NV_PCI_REGSZ_VER3 0x604 | ||
491 | 493 | ||
492 | /* various timeout delays: all in usec */ | 494 | /* various timeout delays: all in usec */ |
493 | #define NV_TXRX_RESET_DELAY 4 | 495 | #define NV_TXRX_RESET_DELAY 4 |
@@ -605,9 +607,6 @@ static const struct nv_ethtool_str nv_estats_str[] = { | |||
605 | { "tx_carrier_errors" }, | 607 | { "tx_carrier_errors" }, |
606 | { "tx_excess_deferral" }, | 608 | { "tx_excess_deferral" }, |
607 | { "tx_retry_error" }, | 609 | { "tx_retry_error" }, |
608 | { "tx_deferral" }, | ||
609 | { "tx_packets" }, | ||
610 | { "tx_pause" }, | ||
611 | { "rx_frame_error" }, | 610 | { "rx_frame_error" }, |
612 | { "rx_extra_byte" }, | 611 | { "rx_extra_byte" }, |
613 | { "rx_late_collision" }, | 612 | { "rx_late_collision" }, |
@@ -620,11 +619,17 @@ static const struct nv_ethtool_str nv_estats_str[] = { | |||
620 | { "rx_unicast" }, | 619 | { "rx_unicast" }, |
621 | { "rx_multicast" }, | 620 | { "rx_multicast" }, |
622 | { "rx_broadcast" }, | 621 | { "rx_broadcast" }, |
622 | { "rx_packets" }, | ||
623 | { "rx_errors_total" }, | ||
624 | { "tx_errors_total" }, | ||
625 | |||
626 | /* version 2 stats */ | ||
627 | { "tx_deferral" }, | ||
628 | { "tx_packets" }, | ||
623 | { "rx_bytes" }, | 629 | { "rx_bytes" }, |
630 | { "tx_pause" }, | ||
624 | { "rx_pause" }, | 631 | { "rx_pause" }, |
625 | { "rx_drop_frame" }, | 632 | { "rx_drop_frame" } |
626 | { "rx_packets" }, | ||
627 | { "rx_errors_total" } | ||
628 | }; | 633 | }; |
629 | 634 | ||
630 | struct nv_ethtool_stats { | 635 | struct nv_ethtool_stats { |
@@ -637,9 +642,6 @@ struct nv_ethtool_stats { | |||
637 | u64 tx_carrier_errors; | 642 | u64 tx_carrier_errors; |
638 | u64 tx_excess_deferral; | 643 | u64 tx_excess_deferral; |
639 | u64 tx_retry_error; | 644 | u64 tx_retry_error; |
640 | u64 tx_deferral; | ||
641 | u64 tx_packets; | ||
642 | u64 tx_pause; | ||
643 | u64 rx_frame_error; | 645 | u64 rx_frame_error; |
644 | u64 rx_extra_byte; | 646 | u64 rx_extra_byte; |
645 | u64 rx_late_collision; | 647 | u64 rx_late_collision; |
@@ -652,13 +654,22 @@ struct nv_ethtool_stats { | |||
652 | u64 rx_unicast; | 654 | u64 rx_unicast; |
653 | u64 rx_multicast; | 655 | u64 rx_multicast; |
654 | u64 rx_broadcast; | 656 | u64 rx_broadcast; |
657 | u64 rx_packets; | ||
658 | u64 rx_errors_total; | ||
659 | u64 tx_errors_total; | ||
660 | |||
661 | /* version 2 stats */ | ||
662 | u64 tx_deferral; | ||
663 | u64 tx_packets; | ||
655 | u64 rx_bytes; | 664 | u64 rx_bytes; |
665 | u64 tx_pause; | ||
656 | u64 rx_pause; | 666 | u64 rx_pause; |
657 | u64 rx_drop_frame; | 667 | u64 rx_drop_frame; |
658 | u64 rx_packets; | ||
659 | u64 rx_errors_total; | ||
660 | }; | 668 | }; |
661 | 669 | ||
670 | #define NV_DEV_STATISTICS_V2_COUNT (sizeof(struct nv_ethtool_stats)/sizeof(u64)) | ||
671 | #define NV_DEV_STATISTICS_V1_COUNT (NV_DEV_STATISTICS_V2_COUNT - 6) | ||
672 | |||
662 | /* diagnostics */ | 673 | /* diagnostics */ |
663 | #define NV_TEST_COUNT_BASE 3 | 674 | #define NV_TEST_COUNT_BASE 3 |
664 | #define NV_TEST_COUNT_EXTENDED 4 | 675 | #define NV_TEST_COUNT_EXTENDED 4 |
@@ -1275,6 +1286,61 @@ static void nv_mac_reset(struct net_device *dev) | |||
1275 | pci_push(base); | 1286 | pci_push(base); |
1276 | } | 1287 | } |
1277 | 1288 | ||
1289 | static void nv_get_hw_stats(struct net_device *dev) | ||
1290 | { | ||
1291 | struct fe_priv *np = netdev_priv(dev); | ||
1292 | u8 __iomem *base = get_hwbase(dev); | ||
1293 | |||
1294 | np->estats.tx_bytes += readl(base + NvRegTxCnt); | ||
1295 | np->estats.tx_zero_rexmt += readl(base + NvRegTxZeroReXmt); | ||
1296 | np->estats.tx_one_rexmt += readl(base + NvRegTxOneReXmt); | ||
1297 | np->estats.tx_many_rexmt += readl(base + NvRegTxManyReXmt); | ||
1298 | np->estats.tx_late_collision += readl(base + NvRegTxLateCol); | ||
1299 | np->estats.tx_fifo_errors += readl(base + NvRegTxUnderflow); | ||
1300 | np->estats.tx_carrier_errors += readl(base + NvRegTxLossCarrier); | ||
1301 | np->estats.tx_excess_deferral += readl(base + NvRegTxExcessDef); | ||
1302 | np->estats.tx_retry_error += readl(base + NvRegTxRetryErr); | ||
1303 | np->estats.rx_frame_error += readl(base + NvRegRxFrameErr); | ||
1304 | np->estats.rx_extra_byte += readl(base + NvRegRxExtraByte); | ||
1305 | np->estats.rx_late_collision += readl(base + NvRegRxLateCol); | ||
1306 | np->estats.rx_runt += readl(base + NvRegRxRunt); | ||
1307 | np->estats.rx_frame_too_long += readl(base + NvRegRxFrameTooLong); | ||
1308 | np->estats.rx_over_errors += readl(base + NvRegRxOverflow); | ||
1309 | np->estats.rx_crc_errors += readl(base + NvRegRxFCSErr); | ||
1310 | np->estats.rx_frame_align_error += readl(base + NvRegRxFrameAlignErr); | ||
1311 | np->estats.rx_length_error += readl(base + NvRegRxLenErr); | ||
1312 | np->estats.rx_unicast += readl(base + NvRegRxUnicast); | ||
1313 | np->estats.rx_multicast += readl(base + NvRegRxMulticast); | ||
1314 | np->estats.rx_broadcast += readl(base + NvRegRxBroadcast); | ||
1315 | np->estats.rx_packets = | ||
1316 | np->estats.rx_unicast + | ||
1317 | np->estats.rx_multicast + | ||
1318 | np->estats.rx_broadcast; | ||
1319 | np->estats.rx_errors_total = | ||
1320 | np->estats.rx_crc_errors + | ||
1321 | np->estats.rx_over_errors + | ||
1322 | np->estats.rx_frame_error + | ||
1323 | (np->estats.rx_frame_align_error - np->estats.rx_extra_byte) + | ||
1324 | np->estats.rx_late_collision + | ||
1325 | np->estats.rx_runt + | ||
1326 | np->estats.rx_frame_too_long; | ||
1327 | np->estats.tx_errors_total = | ||
1328 | np->estats.tx_late_collision + | ||
1329 | np->estats.tx_fifo_errors + | ||
1330 | np->estats.tx_carrier_errors + | ||
1331 | np->estats.tx_excess_deferral + | ||
1332 | np->estats.tx_retry_error; | ||
1333 | |||
1334 | if (np->driver_data & DEV_HAS_STATISTICS_V2) { | ||
1335 | np->estats.tx_deferral += readl(base + NvRegTxDef); | ||
1336 | np->estats.tx_packets += readl(base + NvRegTxFrame); | ||
1337 | np->estats.rx_bytes += readl(base + NvRegRxCnt); | ||
1338 | np->estats.tx_pause += readl(base + NvRegTxPause); | ||
1339 | np->estats.rx_pause += readl(base + NvRegRxPause); | ||
1340 | np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame); | ||
1341 | } | ||
1342 | } | ||
1343 | |||
1278 | /* | 1344 | /* |
1279 | * nv_get_stats: dev->get_stats function | 1345 | * nv_get_stats: dev->get_stats function |
1280 | * Get latest stats value from the nic. | 1346 | * Get latest stats value from the nic. |
@@ -3502,47 +3568,8 @@ static void nv_do_stats_poll(unsigned long data) | |||
3502 | { | 3568 | { |
3503 | struct net_device *dev = (struct net_device *) data; | 3569 | struct net_device *dev = (struct net_device *) data; |
3504 | struct fe_priv *np = netdev_priv(dev); | 3570 | struct fe_priv *np = netdev_priv(dev); |
3505 | u8 __iomem *base = get_hwbase(dev); | ||
3506 | 3571 | ||
3507 | np->estats.tx_bytes += readl(base + NvRegTxCnt); | 3572 | nv_get_hw_stats(dev); |
3508 | np->estats.tx_zero_rexmt += readl(base + NvRegTxZeroReXmt); | ||
3509 | np->estats.tx_one_rexmt += readl(base + NvRegTxOneReXmt); | ||
3510 | np->estats.tx_many_rexmt += readl(base + NvRegTxManyReXmt); | ||
3511 | np->estats.tx_late_collision += readl(base + NvRegTxLateCol); | ||
3512 | np->estats.tx_fifo_errors += readl(base + NvRegTxUnderflow); | ||
3513 | np->estats.tx_carrier_errors += readl(base + NvRegTxLossCarrier); | ||
3514 | np->estats.tx_excess_deferral += readl(base + NvRegTxExcessDef); | ||
3515 | np->estats.tx_retry_error += readl(base + NvRegTxRetryErr); | ||
3516 | np->estats.tx_deferral += readl(base + NvRegTxDef); | ||
3517 | np->estats.tx_packets += readl(base + NvRegTxFrame); | ||
3518 | np->estats.tx_pause += readl(base + NvRegTxPause); | ||
3519 | np->estats.rx_frame_error += readl(base + NvRegRxFrameErr); | ||
3520 | np->estats.rx_extra_byte += readl(base + NvRegRxExtraByte); | ||
3521 | np->estats.rx_late_collision += readl(base + NvRegRxLateCol); | ||
3522 | np->estats.rx_runt += readl(base + NvRegRxRunt); | ||
3523 | np->estats.rx_frame_too_long += readl(base + NvRegRxFrameTooLong); | ||
3524 | np->estats.rx_over_errors += readl(base + NvRegRxOverflow); | ||
3525 | np->estats.rx_crc_errors += readl(base + NvRegRxFCSErr); | ||
3526 | np->estats.rx_frame_align_error += readl(base + NvRegRxFrameAlignErr); | ||
3527 | np->estats.rx_length_error += readl(base + NvRegRxLenErr); | ||
3528 | np->estats.rx_unicast += readl(base + NvRegRxUnicast); | ||
3529 | np->estats.rx_multicast += readl(base + NvRegRxMulticast); | ||
3530 | np->estats.rx_broadcast += readl(base + NvRegRxBroadcast); | ||
3531 | np->estats.rx_bytes += readl(base + NvRegRxCnt); | ||
3532 | np->estats.rx_pause += readl(base + NvRegRxPause); | ||
3533 | np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame); | ||
3534 | np->estats.rx_packets = | ||
3535 | np->estats.rx_unicast + | ||
3536 | np->estats.rx_multicast + | ||
3537 | np->estats.rx_broadcast; | ||
3538 | np->estats.rx_errors_total = | ||
3539 | np->estats.rx_crc_errors + | ||
3540 | np->estats.rx_over_errors + | ||
3541 | np->estats.rx_frame_error + | ||
3542 | (np->estats.rx_frame_align_error - np->estats.rx_extra_byte) + | ||
3543 | np->estats.rx_late_collision + | ||
3544 | np->estats.rx_runt + | ||
3545 | np->estats.rx_frame_too_long; | ||
3546 | 3573 | ||
3547 | if (!np->in_shutdown) | 3574 | if (!np->in_shutdown) |
3548 | mod_timer(&np->stats_poll, jiffies + STATS_INTERVAL); | 3575 | mod_timer(&np->stats_poll, jiffies + STATS_INTERVAL); |
@@ -4161,8 +4188,10 @@ static int nv_get_stats_count(struct net_device *dev) | |||
4161 | { | 4188 | { |
4162 | struct fe_priv *np = netdev_priv(dev); | 4189 | struct fe_priv *np = netdev_priv(dev); |
4163 | 4190 | ||
4164 | if (np->driver_data & DEV_HAS_STATISTICS) | 4191 | if (np->driver_data & DEV_HAS_STATISTICS_V1) |
4165 | return sizeof(struct nv_ethtool_stats)/sizeof(u64); | 4192 | return NV_DEV_STATISTICS_V1_COUNT; |
4193 | else if (np->driver_data & DEV_HAS_STATISTICS_V2) | ||
4194 | return NV_DEV_STATISTICS_V2_COUNT; | ||
4166 | else | 4195 | else |
4167 | return 0; | 4196 | return 0; |
4168 | } | 4197 | } |
@@ -4749,7 +4778,7 @@ static int nv_open(struct net_device *dev) | |||
4749 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); | 4778 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
4750 | 4779 | ||
4751 | /* start statistics timer */ | 4780 | /* start statistics timer */ |
4752 | if (np->driver_data & DEV_HAS_STATISTICS) | 4781 | if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2)) |
4753 | mod_timer(&np->stats_poll, jiffies + STATS_INTERVAL); | 4782 | mod_timer(&np->stats_poll, jiffies + STATS_INTERVAL); |
4754 | 4783 | ||
4755 | spin_unlock_irq(&np->lock); | 4784 | spin_unlock_irq(&np->lock); |
@@ -4846,7 +4875,9 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
4846 | if (err < 0) | 4875 | if (err < 0) |
4847 | goto out_disable; | 4876 | goto out_disable; |
4848 | 4877 | ||
4849 | if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS)) | 4878 | if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V2)) |
4879 | np->register_size = NV_PCI_REGSZ_VER3; | ||
4880 | else if (id->driver_data & DEV_HAS_STATISTICS_V1) | ||
4850 | np->register_size = NV_PCI_REGSZ_VER2; | 4881 | np->register_size = NV_PCI_REGSZ_VER2; |
4851 | else | 4882 | else |
4852 | np->register_size = NV_PCI_REGSZ_VER1; | 4883 | np->register_size = NV_PCI_REGSZ_VER1; |
@@ -5295,83 +5326,83 @@ static struct pci_device_id pci_tbl[] = { | |||
5295 | }, | 5326 | }, |
5296 | { /* CK804 Ethernet Controller */ | 5327 | { /* CK804 Ethernet Controller */ |
5297 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_8), | 5328 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_8), |
5298 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA, | 5329 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1, |
5299 | }, | 5330 | }, |
5300 | { /* CK804 Ethernet Controller */ | 5331 | { /* CK804 Ethernet Controller */ |
5301 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_9), | 5332 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_9), |
5302 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA, | 5333 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1, |
5303 | }, | 5334 | }, |
5304 | { /* MCP04 Ethernet Controller */ | 5335 | { /* MCP04 Ethernet Controller */ |
5305 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_10), | 5336 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_10), |
5306 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA, | 5337 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1, |
5307 | }, | 5338 | }, |
5308 | { /* MCP04 Ethernet Controller */ | 5339 | { /* MCP04 Ethernet Controller */ |
5309 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_11), | 5340 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_11), |
5310 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA, | 5341 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1, |
5311 | }, | 5342 | }, |
5312 | { /* MCP51 Ethernet Controller */ | 5343 | { /* MCP51 Ethernet Controller */ |
5313 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12), | 5344 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12), |
5314 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL, | 5345 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V1, |
5315 | }, | 5346 | }, |
5316 | { /* MCP51 Ethernet Controller */ | 5347 | { /* MCP51 Ethernet Controller */ |
5317 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13), | 5348 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13), |
5318 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL, | 5349 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V1, |
5319 | }, | 5350 | }, |
5320 | { /* MCP55 Ethernet Controller */ | 5351 | { /* MCP55 Ethernet Controller */ |
5321 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14), | 5352 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14), |
5322 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5353 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5323 | }, | 5354 | }, |
5324 | { /* MCP55 Ethernet Controller */ | 5355 | { /* MCP55 Ethernet Controller */ |
5325 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15), | 5356 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15), |
5326 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5357 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5327 | }, | 5358 | }, |
5328 | { /* MCP61 Ethernet Controller */ | 5359 | { /* MCP61 Ethernet Controller */ |
5329 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_16), | 5360 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_16), |
5330 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5361 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5331 | }, | 5362 | }, |
5332 | { /* MCP61 Ethernet Controller */ | 5363 | { /* MCP61 Ethernet Controller */ |
5333 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_17), | 5364 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_17), |
5334 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5365 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5335 | }, | 5366 | }, |
5336 | { /* MCP61 Ethernet Controller */ | 5367 | { /* MCP61 Ethernet Controller */ |
5337 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_18), | 5368 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_18), |
5338 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5369 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5339 | }, | 5370 | }, |
5340 | { /* MCP61 Ethernet Controller */ | 5371 | { /* MCP61 Ethernet Controller */ |
5341 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_19), | 5372 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_19), |
5342 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5373 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5343 | }, | 5374 | }, |
5344 | { /* MCP65 Ethernet Controller */ | 5375 | { /* MCP65 Ethernet Controller */ |
5345 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_20), | 5376 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_20), |
5346 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5377 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5347 | }, | 5378 | }, |
5348 | { /* MCP65 Ethernet Controller */ | 5379 | { /* MCP65 Ethernet Controller */ |
5349 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_21), | 5380 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_21), |
5350 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5381 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5351 | }, | 5382 | }, |
5352 | { /* MCP65 Ethernet Controller */ | 5383 | { /* MCP65 Ethernet Controller */ |
5353 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_22), | 5384 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_22), |
5354 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5385 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5355 | }, | 5386 | }, |
5356 | { /* MCP65 Ethernet Controller */ | 5387 | { /* MCP65 Ethernet Controller */ |
5357 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_23), | 5388 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_23), |
5358 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5389 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5359 | }, | 5390 | }, |
5360 | { /* MCP67 Ethernet Controller */ | 5391 | { /* MCP67 Ethernet Controller */ |
5361 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_24), | 5392 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_24), |
5362 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5393 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5363 | }, | 5394 | }, |
5364 | { /* MCP67 Ethernet Controller */ | 5395 | { /* MCP67 Ethernet Controller */ |
5365 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_25), | 5396 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_25), |
5366 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5397 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5367 | }, | 5398 | }, |
5368 | { /* MCP67 Ethernet Controller */ | 5399 | { /* MCP67 Ethernet Controller */ |
5369 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_26), | 5400 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_26), |
5370 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5401 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5371 | }, | 5402 | }, |
5372 | { /* MCP67 Ethernet Controller */ | 5403 | { /* MCP67 Ethernet Controller */ |
5373 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_27), | 5404 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_27), |
5374 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5405 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5375 | }, | 5406 | }, |
5376 | {0,}, | 5407 | {0,}, |
5377 | }; | 5408 | }; |