1 files changed, 269 insertions, 21 deletions

diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index c5ed635bce36..439f41338291 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -110,6 +110,8 @@
  *      0.55: 22 Mar 2006: Add flow control (pause frame).
  *      0.56: 22 Mar 2006: Additional ethtool config and moduleparam support.
  *      0.57: 14 May 2006: Mac address set in probe/remove and order corrections.
+ *      0.58: 30 Oct 2006: Added support for sideband management unit.
+ *      0.59: 30 Oct 2006: Added support for recoverable error.
  *
  * Known bugs:
  * We suspect that on some hardware no TX done interrupts are generated.
@@ -126,7 +128,7 @@
 #else
 #define DRIVERNAPI
 #endif
-#define FORCEDETH_VERSION               "0.57"
+#define FORCEDETH_VERSION               "0.59"
 #define DRV_NAME                        "forcedeth"
 
 #include <linux/module.h>
@@ -174,11 +176,12 @@
 #define DEV_HAS_PAUSEFRAME_TX   0x0200  /* device supports tx pause frames */
 #define DEV_HAS_STATISTICS      0x0400  /* device supports hw statistics */
 #define DEV_HAS_TEST_EXTENDED   0x0800  /* device supports extended diagnostic test */
+#define DEV_HAS_MGMT_UNIT       0x1000  /* device supports management unit */
 
 enum {
         NvRegIrqStatus = 0x000,
 #define NVREG_IRQSTAT_MIIEVENT  0x040
-#define NVREG_IRQSTAT_MASK              0x1ff
+#define NVREG_IRQSTAT_MASK              0x81ff
         NvRegIrqMask = 0x004,
 #define NVREG_IRQ_RX_ERROR              0x0001
 #define NVREG_IRQ_RX                    0x0002
@@ -189,15 +192,16 @@ enum {
 #define NVREG_IRQ_LINK                  0x0040
 #define NVREG_IRQ_RX_FORCED             0x0080
 #define NVREG_IRQ_TX_FORCED             0x0100
+#define NVREG_IRQ_RECOVER_ERROR         0x8000
 #define NVREG_IRQMASK_THROUGHPUT        0x00df
 #define NVREG_IRQMASK_CPU               0x0040
 #define NVREG_IRQ_TX_ALL                (NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
 #define NVREG_IRQ_RX_ALL                (NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED)
-#define NVREG_IRQ_OTHER                 (NVREG_IRQ_TIMER|NVREG_IRQ_LINK)
+#define NVREG_IRQ_OTHER                 (NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RECOVER_ERROR)
 
 #define NVREG_IRQ_UNKNOWN       (~(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_TX_ERR| \
                                         NVREG_IRQ_TX_OK|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RX_FORCED| \
-                                        NVREG_IRQ_TX_FORCED))
+                                        NVREG_IRQ_TX_FORCED|NVREG_IRQ_RECOVER_ERROR))
 
         NvRegUnknownSetupReg6 = 0x008,
 #define NVREG_UNKSETUP6_VAL             3
@@ -222,6 +226,15 @@ enum {
 #define NVREG_MAC_RESET_ASSERT  0x0F3
         NvRegTransmitterControl = 0x084,
 #define NVREG_XMITCTL_START     0x01
+#define NVREG_XMITCTL_MGMT_ST   0x40000000
+#define NVREG_XMITCTL_SYNC_MASK         0x000f0000
+#define NVREG_XMITCTL_SYNC_NOT_READY    0x0
+#define NVREG_XMITCTL_SYNC_PHY_INIT     0x00040000
+#define NVREG_XMITCTL_MGMT_SEMA_MASK    0x00000f00
+#define NVREG_XMITCTL_MGMT_SEMA_FREE    0x0
+#define NVREG_XMITCTL_HOST_SEMA_MASK    0x0000f000
+#define NVREG_XMITCTL_HOST_SEMA_ACQ     0x0000f000
+#define NVREG_XMITCTL_HOST_LOADED       0x00004000
         NvRegTransmitterStatus = 0x088,
 #define NVREG_XMITSTAT_BUSY     0x01
 
@@ -304,8 +317,8 @@ enum {
 #define NVREG_MIISTAT_LINKCHANGE        0x0008
 #define NVREG_MIISTAT_MASK              0x000f
 #define NVREG_MIISTAT_MASK2             0x000f
-        NvRegUnknownSetupReg4 = 0x184,
-#define NVREG_UNKSETUP4_VAL     8
+        NvRegMIIMask = 0x184,
+#define NVREG_MII_LINKCHANGE            0x0008
 
         NvRegAdapterControl = 0x188,
 #define NVREG_ADAPTCTL_START    0x02
@@ -707,6 +720,7 @@ struct fe_priv {
         unsigned int phy_model;
         u16 gigabit;
         int intr_test;
+        int recover_error;
 
         /* General data: RO fields */
         dma_addr_t ring_addr;
@@ -719,6 +733,7 @@ struct fe_priv {
         u32 driver_data;
         u32 register_size;
         int rx_csum;
+        u32 mac_in_use;
 
         void __iomem *base;
 
@@ -2443,6 +2458,23 @@ static irqreturn_t nv_nic_irq(int foo, void *data)
                         printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
                                                 dev->name, events);
                 }
+                if (unlikely(events & NVREG_IRQ_RECOVER_ERROR)) {
+                        spin_lock(&np->lock);
+                        /* disable interrupts on the nic */
+                        if (!(np->msi_flags & NV_MSI_X_ENABLED))
+                                writel(0, base + NvRegIrqMask);
+                        else
+                                writel(np->irqmask, base + NvRegIrqMask);
+                        pci_push(base);
+
+                        if (!np->in_shutdown) {
+                                np->nic_poll_irq = np->irqmask;
+                                np->recover_error = 1;
+                                mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
+                        }
+                        spin_unlock(&np->lock);
+                        break;
+                }
 #ifdef CONFIG_FORCEDETH_NAPI
                 if (events & NVREG_IRQ_RX_ALL) {
                         netif_rx_schedule(dev);
@@ -2673,6 +2705,20 @@ static irqreturn_t nv_nic_irq_other(int foo, void *data)
                         spin_unlock_irqrestore(&np->lock, flags);
                         np->link_timeout = jiffies + LINK_TIMEOUT;
                 }
+                if (events & NVREG_IRQ_RECOVER_ERROR) {
+                        spin_lock_irq(&np->lock);
+                        /* disable interrupts on the nic */
+                        writel(NVREG_IRQ_OTHER, base + NvRegIrqMask);
+                        pci_push(base);
+
+                        if (!np->in_shutdown) {
+                                np->nic_poll_irq |= NVREG_IRQ_OTHER;
+                                np->recover_error = 1;
+                                mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
+                        }
+                        spin_unlock_irq(&np->lock);
+                        break;
+                }
                 if (events & (NVREG_IRQ_UNKNOWN)) {
                         printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
                                                 dev->name, events);
@@ -2902,6 +2948,42 @@ static void nv_do_nic_poll(unsigned long data)
         }
         np->nic_poll_irq = 0;
 
+        if (np->recover_error) {
+                np->recover_error = 0;
+                printk(KERN_INFO "forcedeth: MAC in recoverable error state\n");
+                if (netif_running(dev)) {
+                        netif_tx_lock_bh(dev);
+                        spin_lock(&np->lock);
+                        /* stop engines */
+                        nv_stop_rx(dev);
+                        nv_stop_tx(dev);
+                        nv_txrx_reset(dev);
+                        /* drain rx queue */
+                        nv_drain_rx(dev);
+                        nv_drain_tx(dev);
+                        /* reinit driver view of the rx queue */
+                        set_bufsize(dev);
+                        if (nv_init_ring(dev)) {
+                                if (!np->in_shutdown)
+                                        mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
+                        }
+                        /* reinit nic view of the rx queue */
+                        writel(np->rx_buf_sz, base + NvRegOffloadConfig);
+                        setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
+                        writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
+                                base + NvRegRingSizes);
+                        pci_push(base);
+                        writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
+                        pci_push(base);
+
+                        /* restart rx engine */
+                        nv_start_rx(dev);
+                        nv_start_tx(dev);
+                        spin_unlock(&np->lock);
+                        netif_tx_unlock_bh(dev);
+                }
+        }
+
         /* FIXME: Do we need synchronize_irq(dev->irq) here? */
 
         writel(mask, base + NvRegIrqMask);
@@ -4030,6 +4112,54 @@ static void nv_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
         /* nothing to do */
 };
 
+/* The mgmt unit and driver use a semaphore to access the phy during init */
+static int nv_mgmt_acquire_sema(struct net_device *dev)
+{
+        u8 __iomem *base = get_hwbase(dev);
+        int i;
+        u32 tx_ctrl, mgmt_sema;
+
+        for (i = 0; i < 10; i++) {
+                mgmt_sema = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_SEMA_MASK;
+                if (mgmt_sema == NVREG_XMITCTL_MGMT_SEMA_FREE)
+                        break;
+                msleep(500);
+        }
+
+        if (mgmt_sema != NVREG_XMITCTL_MGMT_SEMA_FREE)
+                return 0;
+
+        for (i = 0; i < 2; i++) {
+                tx_ctrl = readl(base + NvRegTransmitterControl);
+                tx_ctrl |= NVREG_XMITCTL_HOST_SEMA_ACQ;
+                writel(tx_ctrl, base + NvRegTransmitterControl);
+
+                /* verify that semaphore was acquired */
+                tx_ctrl = readl(base + NvRegTransmitterControl);
+                if (((tx_ctrl & NVREG_XMITCTL_HOST_SEMA_MASK) == NVREG_XMITCTL_HOST_SEMA_ACQ) &&
+                    ((tx_ctrl & NVREG_XMITCTL_MGMT_SEMA_MASK) == NVREG_XMITCTL_MGMT_SEMA_FREE))
+                        return 1;
+                else
+                        udelay(50);
+        }
+
+        return 0;
+}
+
+/* Indicate to mgmt unit whether driver is loaded or not */
+static void nv_mgmt_driver_loaded(struct net_device *dev, int loaded)
+{
+        u8 __iomem *base = get_hwbase(dev);
+        u32 tx_ctrl;
+
+        tx_ctrl = readl(base + NvRegTransmitterControl);
+        if (loaded)
+                tx_ctrl |= NVREG_XMITCTL_HOST_LOADED;
+        else
+                tx_ctrl &= ~NVREG_XMITCTL_HOST_LOADED;
+        writel(tx_ctrl, base + NvRegTransmitterControl);
+}
+
 static int nv_open(struct net_device *dev)
 {
         struct fe_priv *np = netdev_priv(dev);
@@ -4085,7 +4215,7 @@ static int nv_open(struct net_device *dev)
                         NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX,
                         KERN_INFO "open: SetupReg5, Bit 31 remained off\n");
 
-        writel(0, base + NvRegUnknownSetupReg4);
+        writel(0, base + NvRegMIIMask);
         writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
         writel(NVREG_MIISTAT_MASK2, base + NvRegMIIStatus);
 
@@ -4111,7 +4241,7 @@ static int nv_open(struct net_device *dev)
         writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING,
                         base + NvRegAdapterControl);
         writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed);
-        writel(NVREG_UNKSETUP4_VAL, base + NvRegUnknownSetupReg4);
+        writel(NVREG_MII_LINKCHANGE, base + NvRegMIIMask);
         if (np->wolenabled)
                 writel(NVREG_WAKEUPFLAGS_ENABLE , base + NvRegWakeUpFlags);
 
@@ -4230,6 +4360,8 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
         u8 __iomem *base;
         int err, i;
         u32 powerstate, txreg;
+        u32 phystate_orig = 0, phystate;
+        int phyinitialized = 0;
 
         dev = alloc_etherdev(sizeof(struct fe_priv));
         err = -ENOMEM;
@@ -4514,6 +4646,48 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
                 np->need_linktimer = 0;
         }
 
+        /* clear phy state and temporarily halt phy interrupts */
+        writel(0, base + NvRegMIIMask);
+        phystate = readl(base + NvRegAdapterControl);
+        if (phystate & NVREG_ADAPTCTL_RUNNING) {
+                phystate_orig = 1;
+                phystate &= ~NVREG_ADAPTCTL_RUNNING;
+                writel(phystate, base + NvRegAdapterControl);
+        }
+        writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
+
+        if (id->driver_data & DEV_HAS_MGMT_UNIT) {
+                writel(0x1, base + 0x204); pci_push(base);
+                msleep(500);
+                /* management unit running on the mac? */
+                np->mac_in_use = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST;
+                if (np->mac_in_use) {
+                        u32 mgmt_sync;
+                        /* management unit setup the phy already? */
+                        mgmt_sync = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK;
+                        if (mgmt_sync == NVREG_XMITCTL_SYNC_NOT_READY) {
+                                if (!nv_mgmt_acquire_sema(dev)) {
+                                        for (i = 0; i < 5000; i++) {
+                                                msleep(1);
+                                                mgmt_sync = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK;
+                                                if (mgmt_sync == NVREG_XMITCTL_SYNC_NOT_READY)
+                                                        continue;
+                                                if (mgmt_sync == NVREG_XMITCTL_SYNC_PHY_INIT)
+                                                        phyinitialized = 1;
+                                                break;
+                                        }
+                                } else {
+                                        /* we need to init the phy */
+                                }
+                        } else if (mgmt_sync == NVREG_XMITCTL_SYNC_PHY_INIT) {
+                                /* phy is inited by SMU */
+                                phyinitialized = 1;
+                        } else {
+                                /* we need to init the phy */
+                        }
+                }
+        }
+
         /* find a suitable phy */
         for (i = 1; i <= 32; i++) {
                 int id1, id2;
@@ -4545,8 +4719,14 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
                 goto out_error;
         }
 
-        /* reset it */
-        phy_init(dev);
+        if (!phyinitialized) {
+                /* reset it */
+                phy_init(dev);
+        }
+
+        if (id->driver_data & DEV_HAS_MGMT_UNIT) {
+                nv_mgmt_driver_loaded(dev, 1);
+        }
 
         /* set default link speed settings */
         np->linkspeed = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
@@ -4565,6 +4745,10 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
         return 0;
 
 out_error:
+        if (phystate_orig)
+                writel(phystate|NVREG_ADAPTCTL_RUNNING, base + NvRegAdapterControl);
+        if (np->mac_in_use)
+                nv_mgmt_driver_loaded(dev, 0);
         pci_set_drvdata(pci_dev, NULL);
 out_freering:
         free_rings(dev);
@@ -4594,6 +4778,9 @@ static void __devexit nv_remove(struct pci_dev *pci_dev)
         writel(np->orig_mac[0], base + NvRegMacAddrA);
         writel(np->orig_mac[1], base + NvRegMacAddrB);
 
+        if (np->mac_in_use)
+                nv_mgmt_driver_loaded(dev, 0);
+
         /* free all structures */
         free_rings(dev);
         iounmap(get_hwbase(dev));
@@ -4603,6 +4790,50 @@ static void __devexit nv_remove(struct pci_dev *pci_dev)
         pci_set_drvdata(pci_dev, NULL);
 }
 
+#ifdef CONFIG_PM
+static int nv_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+        struct net_device *dev = pci_get_drvdata(pdev);
+        struct fe_priv *np = netdev_priv(dev);
+
+        if (!netif_running(dev))
+                goto out;
+
+        netif_device_detach(dev);
+
+        // Gross.
+        nv_close(dev);
+
+        pci_save_state(pdev);
+        pci_enable_wake(pdev, pci_choose_state(pdev, state), np->wolenabled);
+        pci_set_power_state(pdev, pci_choose_state(pdev, state));
+out:
+        return 0;
+}
+
+static int nv_resume(struct pci_dev *pdev)
+{
+        struct net_device *dev = pci_get_drvdata(pdev);
+        int rc = 0;
+
+        if (!netif_running(dev))
+                goto out;
+
+        netif_device_attach(dev);
+
+        pci_set_power_state(pdev, PCI_D0);
+        pci_restore_state(pdev);
+        pci_enable_wake(pdev, PCI_D0, 0);
+
+        rc = nv_open(dev);
+out:
+        return rc;
+}
+#else
+#define nv_suspend NULL
+#define nv_resume NULL
+#endif /* CONFIG_PM */
+
 static struct pci_device_id pci_tbl[] = {
         {       /* nForce Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_1),
@@ -4658,43 +4889,59 @@ static struct pci_device_id pci_tbl[] = {
         },
         {       /* MCP55 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
         },
         {       /* MCP55 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
         },
         {       /* MCP61 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_16),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
         },
         {       /* MCP61 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_17),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
         },
         {       /* MCP61 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_18),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
         },
         {       /* MCP61 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_19),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
         },
         {       /* MCP65 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_20),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
         },
         {       /* MCP65 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_21),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
         },
         {       /* MCP65 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_22),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
         },
         {       /* MCP65 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_23),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
+        },
+        {       /* MCP67 Ethernet Controller */
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_24),
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
+        },
+        {       /* MCP67 Ethernet Controller */
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_25),
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
+        },
+        {       /* MCP67 Ethernet Controller */
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_26),
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
+        },
+        {       /* MCP67 Ethernet Controller */
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_27),
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
         },
         {0,},
 };
@@ -4704,9 +4951,10 @@ static struct pci_driver driver = {
         .id_table = pci_tbl,
         .probe = nv_probe,
         .remove = __devexit_p(nv_remove),
+        .suspend = nv_suspend,
+        .resume = nv_resume,
 };
 
-
 static int __init init_nic(void)
 {
         printk(KERN_INFO "forcedeth.c: Reverse Engineered nForce ethernet driver. Version %s.\n", FORCEDETH_VERSION);