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-rw-r--r--drivers/net/fec_8xx/Kconfig14
-rw-r--r--drivers/net/fec_8xx/Makefile12
-rw-r--r--drivers/net/fec_8xx/fec_8xx-netta.c153
-rw-r--r--drivers/net/fec_8xx/fec_8xx.h218
-rw-r--r--drivers/net/fec_8xx/fec_main.c1275
-rw-r--r--drivers/net/fec_8xx/fec_mii.c380
6 files changed, 2052 insertions, 0 deletions
diff --git a/drivers/net/fec_8xx/Kconfig b/drivers/net/fec_8xx/Kconfig
new file mode 100644
index 000000000000..db36ac3ea453
--- /dev/null
+++ b/drivers/net/fec_8xx/Kconfig
@@ -0,0 +1,14 @@
1config FEC_8XX
2 tristate "Motorola 8xx FEC driver"
3 depends on NET_ETHERNET && 8xx && (NETTA || NETPHONE)
4 select MII
5
6config FEC_8XX_GENERIC_PHY
7 bool "Support any generic PHY"
8 depends on FEC_8XX
9 default y
10
11config FEC_8XX_DM9161_PHY
12 bool "Support DM9161 PHY"
13 depends on FEC_8XX
14 default n
diff --git a/drivers/net/fec_8xx/Makefile b/drivers/net/fec_8xx/Makefile
new file mode 100644
index 000000000000..70c54f8c48e5
--- /dev/null
+++ b/drivers/net/fec_8xx/Makefile
@@ -0,0 +1,12 @@
1#
2# Makefile for the Motorola 8xx FEC ethernet controller
3#
4
5obj-$(CONFIG_FEC_8XX) += fec_8xx.o
6
7fec_8xx-objs := fec_main.o fec_mii.o
8
9# the platform instantatiation objects
10ifeq ($(CONFIG_NETTA),y)
11fec_8xx-objs += fec_8xx-netta.o
12endif
diff --git a/drivers/net/fec_8xx/fec_8xx-netta.c b/drivers/net/fec_8xx/fec_8xx-netta.c
new file mode 100644
index 000000000000..29c275e1d566
--- /dev/null
+++ b/drivers/net/fec_8xx/fec_8xx-netta.c
@@ -0,0 +1,153 @@
1/*
2 * FEC instantatiation file for NETTA
3 */
4
5#include <linux/config.h>
6#include <linux/kernel.h>
7#include <linux/types.h>
8#include <linux/sched.h>
9#include <linux/string.h>
10#include <linux/ptrace.h>
11#include <linux/errno.h>
12#include <linux/ioport.h>
13#include <linux/slab.h>
14#include <linux/interrupt.h>
15#include <linux/pci.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/netdevice.h>
19#include <linux/etherdevice.h>
20#include <linux/skbuff.h>
21#include <linux/spinlock.h>
22#include <linux/mii.h>
23#include <linux/ethtool.h>
24#include <linux/bitops.h>
25
26#include <asm/8xx_immap.h>
27#include <asm/pgtable.h>
28#include <asm/mpc8xx.h>
29#include <asm/irq.h>
30#include <asm/uaccess.h>
31#include <asm/commproc.h>
32
33#include "fec_8xx.h"
34
35/*************************************************/
36
37static struct fec_platform_info fec1_info = {
38 .fec_no = 0,
39 .use_mdio = 1,
40 .phy_addr = 8,
41 .fec_irq = SIU_LEVEL1,
42 .phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC6,
43 .rx_ring = 128,
44 .tx_ring = 16,
45 .rx_copybreak = 240,
46 .use_napi = 1,
47 .napi_weight = 17,
48};
49
50static struct fec_platform_info fec2_info = {
51 .fec_no = 1,
52 .use_mdio = 1,
53 .phy_addr = 2,
54 .fec_irq = SIU_LEVEL3,
55 .phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC7,
56 .rx_ring = 128,
57 .tx_ring = 16,
58 .rx_copybreak = 240,
59 .use_napi = 1,
60 .napi_weight = 17,
61};
62
63static struct net_device *fec1_dev;
64static struct net_device *fec2_dev;
65
66/* XXX custom u-boot & Linux startup needed */
67extern const char *__fw_getenv(const char *var);
68
69/* access ports */
70#define setbits32(_addr, _v) __fec_out32(&(_addr), __fec_in32(&(_addr)) | (_v))
71#define clrbits32(_addr, _v) __fec_out32(&(_addr), __fec_in32(&(_addr)) & ~(_v))
72
73#define setbits16(_addr, _v) __fec_out16(&(_addr), __fec_in16(&(_addr)) | (_v))
74#define clrbits16(_addr, _v) __fec_out16(&(_addr), __fec_in16(&(_addr)) & ~(_v))
75
76int fec_8xx_platform_init(void)
77{
78 immap_t *immap = (immap_t *)IMAP_ADDR;
79 bd_t *bd = (bd_t *) __res;
80 const char *s;
81 char *e;
82 int i;
83
84 /* use MDC for MII */
85 setbits16(immap->im_ioport.iop_pdpar, 0x0080);
86 clrbits16(immap->im_ioport.iop_pddir, 0x0080);
87
88 /* configure FEC1 pins */
89 setbits16(immap->im_ioport.iop_papar, 0xe810);
90 setbits16(immap->im_ioport.iop_padir, 0x0810);
91 clrbits16(immap->im_ioport.iop_padir, 0xe000);
92
93 setbits32(immap->im_cpm.cp_pbpar, 0x00000001);
94 clrbits32(immap->im_cpm.cp_pbdir, 0x00000001);
95
96 setbits32(immap->im_cpm.cp_cptr, 0x00000100);
97 clrbits32(immap->im_cpm.cp_cptr, 0x00000050);
98
99 clrbits16(immap->im_ioport.iop_pcpar, 0x0200);
100 clrbits16(immap->im_ioport.iop_pcdir, 0x0200);
101 clrbits16(immap->im_ioport.iop_pcso, 0x0200);
102 setbits16(immap->im_ioport.iop_pcint, 0x0200);
103
104 /* configure FEC2 pins */
105 setbits32(immap->im_cpm.cp_pepar, 0x00039620);
106 setbits32(immap->im_cpm.cp_pedir, 0x00039620);
107 setbits32(immap->im_cpm.cp_peso, 0x00031000);
108 clrbits32(immap->im_cpm.cp_peso, 0x00008620);
109
110 setbits32(immap->im_cpm.cp_cptr, 0x00000080);
111 clrbits32(immap->im_cpm.cp_cptr, 0x00000028);
112
113 clrbits16(immap->im_ioport.iop_pcpar, 0x0200);
114 clrbits16(immap->im_ioport.iop_pcdir, 0x0200);
115 clrbits16(immap->im_ioport.iop_pcso, 0x0200);
116 setbits16(immap->im_ioport.iop_pcint, 0x0200);
117
118 /* fill up */
119 fec1_info.sys_clk = bd->bi_intfreq;
120 fec2_info.sys_clk = bd->bi_intfreq;
121
122 s = __fw_getenv("ethaddr");
123 if (s != NULL) {
124 for (i = 0; i < 6; i++) {
125 fec1_info.macaddr[i] = simple_strtoul(s, &e, 16);
126 if (*e)
127 s = e + 1;
128 }
129 }
130
131 s = __fw_getenv("eth1addr");
132 if (s != NULL) {
133 for (i = 0; i < 6; i++) {
134 fec2_info.macaddr[i] = simple_strtoul(s, &e, 16);
135 if (*e)
136 s = e + 1;
137 }
138 }
139
140 fec_8xx_init_one(&fec1_info, &fec1_dev);
141 fec_8xx_init_one(&fec2_info, &fec2_dev);
142
143 return fec1_dev != NULL && fec2_dev != NULL ? 0 : -1;
144}
145
146void fec_8xx_platform_cleanup(void)
147{
148 if (fec2_dev != NULL)
149 fec_8xx_cleanup_one(fec2_dev);
150
151 if (fec1_dev != NULL)
152 fec_8xx_cleanup_one(fec1_dev);
153}
diff --git a/drivers/net/fec_8xx/fec_8xx.h b/drivers/net/fec_8xx/fec_8xx.h
new file mode 100644
index 000000000000..5af60b0f9208
--- /dev/null
+++ b/drivers/net/fec_8xx/fec_8xx.h
@@ -0,0 +1,218 @@
1#ifndef FEC_8XX_H
2#define FEC_8XX_H
3
4#include <linux/mii.h>
5#include <linux/netdevice.h>
6
7#include <linux/types.h>
8
9/* HW info */
10
11/* CRC polynomium used by the FEC for the multicast group filtering */
12#define FEC_CRC_POLY 0x04C11DB7
13
14#define MII_ADVERTISE_HALF (ADVERTISE_100HALF | \
15 ADVERTISE_10HALF | ADVERTISE_CSMA)
16#define MII_ADVERTISE_ALL (ADVERTISE_100FULL | \
17 ADVERTISE_10FULL | MII_ADVERTISE_HALF)
18
19/* Interrupt events/masks.
20*/
21#define FEC_ENET_HBERR 0x80000000U /* Heartbeat error */
22#define FEC_ENET_BABR 0x40000000U /* Babbling receiver */
23#define FEC_ENET_BABT 0x20000000U /* Babbling transmitter */
24#define FEC_ENET_GRA 0x10000000U /* Graceful stop complete */
25#define FEC_ENET_TXF 0x08000000U /* Full frame transmitted */
26#define FEC_ENET_TXB 0x04000000U /* A buffer was transmitted */
27#define FEC_ENET_RXF 0x02000000U /* Full frame received */
28#define FEC_ENET_RXB 0x01000000U /* A buffer was received */
29#define FEC_ENET_MII 0x00800000U /* MII interrupt */
30#define FEC_ENET_EBERR 0x00400000U /* SDMA bus error */
31
32#define FEC_ECNTRL_PINMUX 0x00000004
33#define FEC_ECNTRL_ETHER_EN 0x00000002
34#define FEC_ECNTRL_RESET 0x00000001
35
36#define FEC_RCNTRL_BC_REJ 0x00000010
37#define FEC_RCNTRL_PROM 0x00000008
38#define FEC_RCNTRL_MII_MODE 0x00000004
39#define FEC_RCNTRL_DRT 0x00000002
40#define FEC_RCNTRL_LOOP 0x00000001
41
42#define FEC_TCNTRL_FDEN 0x00000004
43#define FEC_TCNTRL_HBC 0x00000002
44#define FEC_TCNTRL_GTS 0x00000001
45
46/* values for MII phy_status */
47
48#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
49#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */
50#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */
51#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */
52#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */
53#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */
54#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */
55
56#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */
57#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */
58#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */
59#define PHY_STAT_SPMASK 0xf000 /* mask for speed */
60#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */
61#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */
62#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */
63#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */
64
65typedef struct phy_info {
66 unsigned int id;
67 const char *name;
68 void (*startup) (struct net_device * dev);
69 void (*shutdown) (struct net_device * dev);
70 void (*ack_int) (struct net_device * dev);
71} phy_info_t;
72
73/* The FEC stores dest/src/type, data, and checksum for receive packets.
74 */
75#define MAX_MTU 1508 /* Allow fullsized pppoe packets over VLAN */
76#define MIN_MTU 46 /* this is data size */
77#define CRC_LEN 4
78
79#define PKT_MAXBUF_SIZE (MAX_MTU+ETH_HLEN+CRC_LEN)
80#define PKT_MINBUF_SIZE (MIN_MTU+ETH_HLEN+CRC_LEN)
81
82/* Must be a multiple of 4 */
83#define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE+3) & ~3)
84/* This is needed so that invalidate_xxx wont invalidate too much */
85#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE)
86
87/* platform interface */
88
89struct fec_platform_info {
90 int fec_no; /* FEC index */
91 int use_mdio; /* use external MII */
92 int phy_addr; /* the phy address */
93 int fec_irq, phy_irq; /* the irq for the controller */
94 int rx_ring, tx_ring; /* number of buffers on rx */
95 int sys_clk; /* system clock */
96 __u8 macaddr[6]; /* mac address */
97 int rx_copybreak; /* limit we copy small frames */
98 int use_napi; /* use NAPI */
99 int napi_weight; /* NAPI weight */
100};
101
102/* forward declaration */
103struct fec;
104
105struct fec_enet_private {
106 spinlock_t lock; /* during all ops except TX pckt processing */
107 spinlock_t tx_lock; /* during fec_start_xmit and fec_tx */
108 int fecno;
109 struct fec *fecp;
110 const struct fec_platform_info *fpi;
111 int rx_ring, tx_ring;
112 dma_addr_t ring_mem_addr;
113 void *ring_base;
114 struct sk_buff **rx_skbuff;
115 struct sk_buff **tx_skbuff;
116 cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
117 cbd_t *tx_bd_base;
118 cbd_t *dirty_tx; /* ring entries to be free()ed. */
119 cbd_t *cur_rx;
120 cbd_t *cur_tx;
121 int tx_free;
122 struct net_device_stats stats;
123 struct timer_list phy_timer_list;
124 const struct phy_info *phy;
125 unsigned int fec_phy_speed;
126 __u32 msg_enable;
127 struct mii_if_info mii_if;
128};
129
130/***************************************************************************/
131
132void fec_restart(struct net_device *dev, int duplex, int speed);
133void fec_stop(struct net_device *dev);
134
135/***************************************************************************/
136
137int fec_mii_read(struct net_device *dev, int phy_id, int location);
138void fec_mii_write(struct net_device *dev, int phy_id, int location, int value);
139
140int fec_mii_phy_id_detect(struct net_device *dev);
141void fec_mii_startup(struct net_device *dev);
142void fec_mii_shutdown(struct net_device *dev);
143void fec_mii_ack_int(struct net_device *dev);
144
145void fec_mii_link_status_change_check(struct net_device *dev, int init_media);
146
147/***************************************************************************/
148
149#define FEC1_NO 0x00
150#define FEC2_NO 0x01
151#define FEC3_NO 0x02
152
153int fec_8xx_init_one(const struct fec_platform_info *fpi,
154 struct net_device **devp);
155int fec_8xx_cleanup_one(struct net_device *dev);
156
157/***************************************************************************/
158
159#define DRV_MODULE_NAME "fec_8xx"
160#define PFX DRV_MODULE_NAME ": "
161#define DRV_MODULE_VERSION "0.1"
162#define DRV_MODULE_RELDATE "May 6, 2004"
163
164/***************************************************************************/
165
166int fec_8xx_platform_init(void);
167void fec_8xx_platform_cleanup(void);
168
169/***************************************************************************/
170
171/* FEC access macros */
172#if defined(CONFIG_8xx)
173/* for a 8xx __raw_xxx's are sufficient */
174#define __fec_out32(addr, x) __raw_writel(x, addr)
175#define __fec_out16(addr, x) __raw_writew(x, addr)
176#define __fec_in32(addr) __raw_readl(addr)
177#define __fec_in16(addr) __raw_readw(addr)
178#else
179/* for others play it safe */
180#define __fec_out32(addr, x) out_be32(addr, x)
181#define __fec_out16(addr, x) out_be16(addr, x)
182#define __fec_in32(addr) in_be32(addr)
183#define __fec_in16(addr) in_be16(addr)
184#endif
185
186/* write */
187#define FW(_fecp, _reg, _v) __fec_out32(&(_fecp)->fec_ ## _reg, (_v))
188
189/* read */
190#define FR(_fecp, _reg) __fec_in32(&(_fecp)->fec_ ## _reg)
191
192/* set bits */
193#define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
194
195/* clear bits */
196#define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
197
198/* buffer descriptor access macros */
199
200/* write */
201#define CBDW_SC(_cbd, _sc) __fec_out16(&(_cbd)->cbd_sc, (_sc))
202#define CBDW_DATLEN(_cbd, _datlen) __fec_out16(&(_cbd)->cbd_datlen, (_datlen))
203#define CBDW_BUFADDR(_cbd, _bufaddr) __fec_out32(&(_cbd)->cbd_bufaddr, (_bufaddr))
204
205/* read */
206#define CBDR_SC(_cbd) __fec_in16(&(_cbd)->cbd_sc)
207#define CBDR_DATLEN(_cbd) __fec_in16(&(_cbd)->cbd_datlen)
208#define CBDR_BUFADDR(_cbd) __fec_in32(&(_cbd)->cbd_bufaddr)
209
210/* set bits */
211#define CBDS_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) | (_sc))
212
213/* clear bits */
214#define CBDC_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc))
215
216/***************************************************************************/
217
218#endif
diff --git a/drivers/net/fec_8xx/fec_main.c b/drivers/net/fec_8xx/fec_main.c
new file mode 100644
index 000000000000..b4f3a9f8a535
--- /dev/null
+++ b/drivers/net/fec_8xx/fec_main.c
@@ -0,0 +1,1275 @@
1/*
2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
8 * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
9 *
10 * Released under the GPL
11 */
12
13#include <linux/config.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/sched.h>
18#include <linux/string.h>
19#include <linux/ptrace.h>
20#include <linux/errno.h>
21#include <linux/ioport.h>
22#include <linux/slab.h>
23#include <linux/interrupt.h>
24#include <linux/pci.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mii.h>
32#include <linux/ethtool.h>
33#include <linux/bitops.h>
34
35#include <asm/8xx_immap.h>
36#include <asm/pgtable.h>
37#include <asm/mpc8xx.h>
38#include <asm/irq.h>
39#include <asm/uaccess.h>
40#include <asm/commproc.h>
41#include <asm/dma-mapping.h>
42
43#include "fec_8xx.h"
44
45/*************************************************/
46
47#define FEC_MAX_MULTICAST_ADDRS 64
48
49/*************************************************/
50
51static char version[] __devinitdata =
52 DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")" "\n";
53
54MODULE_AUTHOR("Pantelis Antoniou <panto@intracom.gr>");
55MODULE_DESCRIPTION("Motorola 8xx FEC ethernet driver");
56MODULE_LICENSE("GPL");
57
58MODULE_PARM(fec_8xx_debug, "i");
59MODULE_PARM_DESC(fec_8xx_debug,
60 "FEC 8xx bitmapped debugging message enable value");
61
62int fec_8xx_debug = -1; /* -1 == use FEC_8XX_DEF_MSG_ENABLE as value */
63
64/*************************************************/
65
66/*
67 * Delay to wait for FEC reset command to complete (in us)
68 */
69#define FEC_RESET_DELAY 50
70
71/*****************************************************************************************/
72
73static void fec_whack_reset(fec_t * fecp)
74{
75 int i;
76
77 /*
78 * Whack a reset. We should wait for this.
79 */
80 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
81 for (i = 0;
82 (FR(fecp, ecntrl) & FEC_ECNTRL_RESET) != 0 && i < FEC_RESET_DELAY;
83 i++)
84 udelay(1);
85
86 if (i == FEC_RESET_DELAY)
87 printk(KERN_WARNING "FEC Reset timeout!\n");
88
89}
90
91/****************************************************************************/
92
93/*
94 * Transmitter timeout.
95 */
96#define TX_TIMEOUT (2*HZ)
97
98/****************************************************************************/
99
100/*
101 * Returns the CRC needed when filling in the hash table for
102 * multicast group filtering
103 * pAddr must point to a MAC address (6 bytes)
104 */
105static __u32 fec_mulicast_calc_crc(char *pAddr)
106{
107 u8 byte;
108 int byte_count;
109 int bit_count;
110 __u32 crc = 0xffffffff;
111 u8 msb;
112
113 for (byte_count = 0; byte_count < 6; byte_count++) {
114 byte = pAddr[byte_count];
115 for (bit_count = 0; bit_count < 8; bit_count++) {
116 msb = crc >> 31;
117 crc <<= 1;
118 if (msb ^ (byte & 0x1)) {
119 crc ^= FEC_CRC_POLY;
120 }
121 byte >>= 1;
122 }
123 }
124 return (crc);
125}
126
127/*
128 * Set or clear the multicast filter for this adaptor.
129 * Skeleton taken from sunlance driver.
130 * The CPM Ethernet implementation allows Multicast as well as individual
131 * MAC address filtering. Some of the drivers check to make sure it is
132 * a group multicast address, and discard those that are not. I guess I
133 * will do the same for now, but just remove the test if you want
134 * individual filtering as well (do the upper net layers want or support
135 * this kind of feature?).
136 */
137static void fec_set_multicast_list(struct net_device *dev)
138{
139 struct fec_enet_private *fep = netdev_priv(dev);
140 fec_t *fecp = fep->fecp;
141 struct dev_mc_list *pmc;
142 __u32 crc;
143 int temp;
144 __u32 csrVal;
145 int hash_index;
146 __u32 hthi, htlo;
147 unsigned long flags;
148
149
150 if ((dev->flags & IFF_PROMISC) != 0) {
151
152 spin_lock_irqsave(&fep->lock, flags);
153 FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
154 spin_unlock_irqrestore(&fep->lock, flags);
155
156 /*
157 * Log any net taps.
158 */
159 printk(KERN_WARNING DRV_MODULE_NAME
160 ": %s: Promiscuous mode enabled.\n", dev->name);
161 return;
162
163 }
164
165 if ((dev->flags & IFF_ALLMULTI) != 0 ||
166 dev->mc_count > FEC_MAX_MULTICAST_ADDRS) {
167 /*
168 * Catch all multicast addresses, set the filter to all 1's.
169 */
170 hthi = 0xffffffffU;
171 htlo = 0xffffffffU;
172 } else {
173 hthi = 0;
174 htlo = 0;
175
176 /*
177 * Now populate the hash table
178 */
179 for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) {
180 crc = fec_mulicast_calc_crc(pmc->dmi_addr);
181 temp = (crc & 0x3f) >> 1;
182 hash_index = ((temp & 0x01) << 4) |
183 ((temp & 0x02) << 2) |
184 ((temp & 0x04)) |
185 ((temp & 0x08) >> 2) |
186 ((temp & 0x10) >> 4);
187 csrVal = (1 << hash_index);
188 if (crc & 1)
189 hthi |= csrVal;
190 else
191 htlo |= csrVal;
192 }
193 }
194
195 spin_lock_irqsave(&fep->lock, flags);
196 FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
197 FW(fecp, hash_table_high, hthi);
198 FW(fecp, hash_table_low, htlo);
199 spin_unlock_irqrestore(&fep->lock, flags);
200}
201
202static int fec_set_mac_address(struct net_device *dev, void *addr)
203{
204 struct sockaddr *mac = addr;
205 struct fec_enet_private *fep = netdev_priv(dev);
206 struct fec *fecp = fep->fecp;
207 int i;
208 __u32 addrhi, addrlo;
209 unsigned long flags;
210
211 /* Get pointer to SCC area in parameter RAM. */
212 for (i = 0; i < 6; i++)
213 dev->dev_addr[i] = mac->sa_data[i];
214
215 /*
216 * Set station address.
217 */
218 addrhi = ((__u32) dev->dev_addr[0] << 24) |
219 ((__u32) dev->dev_addr[1] << 16) |
220 ((__u32) dev->dev_addr[2] << 8) |
221 (__u32) dev->dev_addr[3];
222 addrlo = ((__u32) dev->dev_addr[4] << 24) |
223 ((__u32) dev->dev_addr[5] << 16);
224
225 spin_lock_irqsave(&fep->lock, flags);
226 FW(fecp, addr_low, addrhi);
227 FW(fecp, addr_high, addrlo);
228 spin_unlock_irqrestore(&fep->lock, flags);
229
230 return 0;
231}
232
233/*
234 * This function is called to start or restart the FEC during a link
235 * change. This only happens when switching between half and full
236 * duplex.
237 */
238void fec_restart(struct net_device *dev, int duplex, int speed)
239{
240#ifdef CONFIG_DUET
241 immap_t *immap = (immap_t *) IMAP_ADDR;
242 __u32 cptr;
243#endif
244 struct fec_enet_private *fep = netdev_priv(dev);
245 struct fec *fecp = fep->fecp;
246 const struct fec_platform_info *fpi = fep->fpi;
247 cbd_t *bdp;
248 struct sk_buff *skb;
249 int i;
250 __u32 addrhi, addrlo;
251
252 fec_whack_reset(fep->fecp);
253
254 /*
255 * Set station address.
256 */
257 addrhi = ((__u32) dev->dev_addr[0] << 24) |
258 ((__u32) dev->dev_addr[1] << 16) |
259 ((__u32) dev->dev_addr[2] << 8) |
260 (__u32) dev->dev_addr[3];
261 addrlo = ((__u32) dev->dev_addr[4] << 24) |
262 ((__u32) dev->dev_addr[5] << 16);
263 FW(fecp, addr_low, addrhi);
264 FW(fecp, addr_high, addrlo);
265
266 /*
267 * Reset all multicast.
268 */
269 FW(fecp, hash_table_high, 0);
270 FW(fecp, hash_table_low, 0);
271
272 /*
273 * Set maximum receive buffer size.
274 */
275 FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
276 FW(fecp, r_hash, PKT_MAXBUF_SIZE);
277
278 /*
279 * Set receive and transmit descriptor base.
280 */
281 FW(fecp, r_des_start, iopa((__u32) (fep->rx_bd_base)));
282 FW(fecp, x_des_start, iopa((__u32) (fep->tx_bd_base)));
283
284 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
285 fep->tx_free = fep->tx_ring;
286 fep->cur_rx = fep->rx_bd_base;
287
288 /*
289 * Reset SKB receive buffers
290 */
291 for (i = 0; i < fep->rx_ring; i++) {
292 if ((skb = fep->rx_skbuff[i]) == NULL)
293 continue;
294 fep->rx_skbuff[i] = NULL;
295 dev_kfree_skb(skb);
296 }
297
298 /*
299 * Initialize the receive buffer descriptors.
300 */
301 for (i = 0, bdp = fep->rx_bd_base; i < fep->rx_ring; i++, bdp++) {
302 skb = dev_alloc_skb(ENET_RX_FRSIZE);
303 if (skb == NULL) {
304 printk(KERN_WARNING DRV_MODULE_NAME
305 ": %s Memory squeeze, unable to allocate skb\n",
306 dev->name);
307 fep->stats.rx_dropped++;
308 break;
309 }
310 fep->rx_skbuff[i] = skb;
311 skb->dev = dev;
312 CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
313 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
314 DMA_FROM_DEVICE));
315 CBDW_DATLEN(bdp, 0); /* zero */
316 CBDW_SC(bdp, BD_ENET_RX_EMPTY |
317 ((i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP));
318 }
319 /*
320 * if we failed, fillup remainder
321 */
322 for (; i < fep->rx_ring; i++, bdp++) {
323 fep->rx_skbuff[i] = NULL;
324 CBDW_SC(bdp, (i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP);
325 }
326
327 /*
328 * Reset SKB transmit buffers.
329 */
330 for (i = 0; i < fep->tx_ring; i++) {
331 if ((skb = fep->tx_skbuff[i]) == NULL)
332 continue;
333 fep->tx_skbuff[i] = NULL;
334 dev_kfree_skb(skb);
335 }
336
337 /*
338 * ...and the same for transmit.
339 */
340 for (i = 0, bdp = fep->tx_bd_base; i < fep->tx_ring; i++, bdp++) {
341 fep->tx_skbuff[i] = NULL;
342 CBDW_BUFADDR(bdp, virt_to_bus(NULL));
343 CBDW_DATLEN(bdp, 0);
344 CBDW_SC(bdp, (i < fep->tx_ring - 1) ? 0 : BD_SC_WRAP);
345 }
346
347 /*
348 * Enable big endian and don't care about SDMA FC.
349 */
350 FW(fecp, fun_code, 0x78000000);
351
352 /*
353 * Set MII speed.
354 */
355 FW(fecp, mii_speed, fep->fec_phy_speed);
356
357 /*
358 * Clear any outstanding interrupt.
359 */
360 FW(fecp, ievent, 0xffc0);
361 FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
362
363 /*
364 * adjust to speed (only for DUET & RMII)
365 */
366#ifdef CONFIG_DUET
367 cptr = in_be32(&immap->im_cpm.cp_cptr);
368 switch (fpi->fec_no) {
369 case 0:
370 /*
371 * check if in RMII mode
372 */
373 if ((cptr & 0x100) == 0)
374 break;
375
376 if (speed == 10)
377 cptr |= 0x0000010;
378 else if (speed == 100)
379 cptr &= ~0x0000010;
380 break;
381 case 1:
382 /*
383 * check if in RMII mode
384 */
385 if ((cptr & 0x80) == 0)
386 break;
387
388 if (speed == 10)
389 cptr |= 0x0000008;
390 else if (speed == 100)
391 cptr &= ~0x0000008;
392 break;
393 default:
394 break;
395 }
396 out_be32(&immap->im_cpm.cp_cptr, cptr);
397#endif
398
399 FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
400 /*
401 * adjust to duplex mode
402 */
403 if (duplex) {
404 FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
405 FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
406 } else {
407 FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
408 FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
409 }
410
411 /*
412 * Enable interrupts we wish to service.
413 */
414 FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
415 FEC_ENET_RXF | FEC_ENET_RXB);
416
417 /*
418 * And last, enable the transmit and receive processing.
419 */
420 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
421 FW(fecp, r_des_active, 0x01000000);
422}
423
424void fec_stop(struct net_device *dev)
425{
426 struct fec_enet_private *fep = netdev_priv(dev);
427 fec_t *fecp = fep->fecp;
428 struct sk_buff *skb;
429 int i;
430
431 if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
432 return; /* already down */
433
434 FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
435 for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
436 i < FEC_RESET_DELAY; i++)
437 udelay(1);
438
439 if (i == FEC_RESET_DELAY)
440 printk(KERN_WARNING DRV_MODULE_NAME
441 ": %s FEC timeout on graceful transmit stop\n",
442 dev->name);
443 /*
444 * Disable FEC. Let only MII interrupts.
445 */
446 FW(fecp, imask, 0);
447 FW(fecp, ecntrl, ~FEC_ECNTRL_ETHER_EN);
448
449 /*
450 * Reset SKB transmit buffers.
451 */
452 for (i = 0; i < fep->tx_ring; i++) {
453 if ((skb = fep->tx_skbuff[i]) == NULL)
454 continue;
455 fep->tx_skbuff[i] = NULL;
456 dev_kfree_skb(skb);
457 }
458
459 /*
460 * Reset SKB receive buffers
461 */
462 for (i = 0; i < fep->rx_ring; i++) {
463 if ((skb = fep->rx_skbuff[i]) == NULL)
464 continue;
465 fep->rx_skbuff[i] = NULL;
466 dev_kfree_skb(skb);
467 }
468}
469
470/* common receive function */
471static int fec_enet_rx_common(struct net_device *dev, int *budget)
472{
473 struct fec_enet_private *fep = netdev_priv(dev);
474 fec_t *fecp = fep->fecp;
475 const struct fec_platform_info *fpi = fep->fpi;
476 cbd_t *bdp;
477 struct sk_buff *skb, *skbn, *skbt;
478 int received = 0;
479 __u16 pkt_len, sc;
480 int curidx;
481 int rx_work_limit;
482
483 if (fpi->use_napi) {
484 rx_work_limit = min(dev->quota, *budget);
485
486 if (!netif_running(dev))
487 return 0;
488 }
489
490 /*
491 * First, grab all of the stats for the incoming packet.
492 * These get messed up if we get called due to a busy condition.
493 */
494 bdp = fep->cur_rx;
495
496 /* clear RX status bits for napi*/
497 if (fpi->use_napi)
498 FW(fecp, ievent, FEC_ENET_RXF | FEC_ENET_RXB);
499
500 while (((sc = CBDR_SC(bdp)) & BD_ENET_RX_EMPTY) == 0) {
501
502 curidx = bdp - fep->rx_bd_base;
503
504 /*
505 * Since we have allocated space to hold a complete frame,
506 * the last indicator should be set.
507 */
508 if ((sc & BD_ENET_RX_LAST) == 0)
509 printk(KERN_WARNING DRV_MODULE_NAME
510 ": %s rcv is not +last\n",
511 dev->name);
512
513 /*
514 * Check for errors.
515 */
516 if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_CL |
517 BD_ENET_RX_NO | BD_ENET_RX_CR | BD_ENET_RX_OV)) {
518 fep->stats.rx_errors++;
519 /* Frame too long or too short. */
520 if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
521 fep->stats.rx_length_errors++;
522 /* Frame alignment */
523 if (sc & (BD_ENET_RX_NO | BD_ENET_RX_CL))
524 fep->stats.rx_frame_errors++;
525 /* CRC Error */
526 if (sc & BD_ENET_RX_CR)
527 fep->stats.rx_crc_errors++;
528 /* FIFO overrun */
529 if (sc & BD_ENET_RX_OV)
530 fep->stats.rx_crc_errors++;
531
532 skbn = fep->rx_skbuff[curidx];
533 BUG_ON(skbn == NULL);
534
535 } else {
536
537 /* napi, got packet but no quota */
538 if (fpi->use_napi && --rx_work_limit < 0)
539 break;
540
541 skb = fep->rx_skbuff[curidx];
542 BUG_ON(skb == NULL);
543
544 /*
545 * Process the incoming frame.
546 */
547 fep->stats.rx_packets++;
548 pkt_len = CBDR_DATLEN(bdp) - 4; /* remove CRC */
549 fep->stats.rx_bytes += pkt_len + 4;
550
551 if (pkt_len <= fpi->rx_copybreak) {
552 /* +2 to make IP header L1 cache aligned */
553 skbn = dev_alloc_skb(pkt_len + 2);
554 if (skbn != NULL) {
555 skb_reserve(skbn, 2); /* align IP header */
556 memcpy(skbn->data, skb->data, pkt_len);
557 /* swap */
558 skbt = skb;
559 skb = skbn;
560 skbn = skbt;
561 }
562 } else
563 skbn = dev_alloc_skb(ENET_RX_FRSIZE);
564
565 if (skbn != NULL) {
566 skb->dev = dev;
567 skb_put(skb, pkt_len); /* Make room */
568 skb->protocol = eth_type_trans(skb, dev);
569 received++;
570 if (!fpi->use_napi)
571 netif_rx(skb);
572 else
573 netif_receive_skb(skb);
574 } else {
575 printk(KERN_WARNING DRV_MODULE_NAME
576 ": %s Memory squeeze, dropping packet.\n",
577 dev->name);
578 fep->stats.rx_dropped++;
579 skbn = skb;
580 }
581 }
582
583 fep->rx_skbuff[curidx] = skbn;
584 CBDW_BUFADDR(bdp, dma_map_single(NULL, skbn->data,
585 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
586 DMA_FROM_DEVICE));
587 CBDW_DATLEN(bdp, 0);
588 CBDW_SC(bdp, (sc & ~BD_ENET_RX_STATS) | BD_ENET_RX_EMPTY);
589
590 /*
591 * Update BD pointer to next entry.
592 */
593 if ((sc & BD_ENET_RX_WRAP) == 0)
594 bdp++;
595 else
596 bdp = fep->rx_bd_base;
597
598 /*
599 * Doing this here will keep the FEC running while we process
600 * incoming frames. On a heavily loaded network, we should be
601 * able to keep up at the expense of system resources.
602 */
603 FW(fecp, r_des_active, 0x01000000);
604 }
605
606 fep->cur_rx = bdp;
607
608 if (fpi->use_napi) {
609 dev->quota -= received;
610 *budget -= received;
611
612 if (rx_work_limit < 0)
613 return 1; /* not done */
614
615 /* done */
616 netif_rx_complete(dev);
617
618 /* enable RX interrupt bits */
619 FS(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
620 }
621
622 return 0;
623}
624
625static void fec_enet_tx(struct net_device *dev)
626{
627 struct fec_enet_private *fep = netdev_priv(dev);
628 cbd_t *bdp;
629 struct sk_buff *skb;
630 int dirtyidx, do_wake;
631 __u16 sc;
632
633 spin_lock(&fep->lock);
634 bdp = fep->dirty_tx;
635
636 do_wake = 0;
637 while (((sc = CBDR_SC(bdp)) & BD_ENET_TX_READY) == 0) {
638
639 dirtyidx = bdp - fep->tx_bd_base;
640
641 if (fep->tx_free == fep->tx_ring)
642 break;
643
644 skb = fep->tx_skbuff[dirtyidx];
645
646 /*
647 * Check for errors.
648 */
649 if (sc & (BD_ENET_TX_HB | BD_ENET_TX_LC |
650 BD_ENET_TX_RL | BD_ENET_TX_UN | BD_ENET_TX_CSL)) {
651 fep->stats.tx_errors++;
652 if (sc & BD_ENET_TX_HB) /* No heartbeat */
653 fep->stats.tx_heartbeat_errors++;
654 if (sc & BD_ENET_TX_LC) /* Late collision */
655 fep->stats.tx_window_errors++;
656 if (sc & BD_ENET_TX_RL) /* Retrans limit */
657 fep->stats.tx_aborted_errors++;
658 if (sc & BD_ENET_TX_UN) /* Underrun */
659 fep->stats.tx_fifo_errors++;
660 if (sc & BD_ENET_TX_CSL) /* Carrier lost */
661 fep->stats.tx_carrier_errors++;
662 } else
663 fep->stats.tx_packets++;
664
665 if (sc & BD_ENET_TX_READY)
666 printk(KERN_WARNING DRV_MODULE_NAME
667 ": %s HEY! Enet xmit interrupt and TX_READY.\n",
668 dev->name);
669
670 /*
671 * Deferred means some collisions occurred during transmit,
672 * but we eventually sent the packet OK.
673 */
674 if (sc & BD_ENET_TX_DEF)
675 fep->stats.collisions++;
676
677 /*
678 * Free the sk buffer associated with this last transmit.
679 */
680 dev_kfree_skb_irq(skb);
681 fep->tx_skbuff[dirtyidx] = NULL;
682
683 /*
684 * Update pointer to next buffer descriptor to be transmitted.
685 */
686 if ((sc & BD_ENET_TX_WRAP) == 0)
687 bdp++;
688 else
689 bdp = fep->tx_bd_base;
690
691 /*
692 * Since we have freed up a buffer, the ring is no longer
693 * full.
694 */
695 if (!fep->tx_free++)
696 do_wake = 1;
697 }
698
699 fep->dirty_tx = bdp;
700
701 spin_unlock(&fep->lock);
702
703 if (do_wake && netif_queue_stopped(dev))
704 netif_wake_queue(dev);
705}
706
707/*
708 * The interrupt handler.
709 * This is called from the MPC core interrupt.
710 */
711static irqreturn_t
712fec_enet_interrupt(int irq, void *dev_id, struct pt_regs *regs)
713{
714 struct net_device *dev = dev_id;
715 struct fec_enet_private *fep;
716 const struct fec_platform_info *fpi;
717 fec_t *fecp;
718 __u32 int_events;
719 __u32 int_events_napi;
720
721 if (unlikely(dev == NULL))
722 return IRQ_NONE;
723
724 fep = netdev_priv(dev);
725 fecp = fep->fecp;
726 fpi = fep->fpi;
727
728 /*
729 * Get the interrupt events that caused us to be here.
730 */
731 while ((int_events = FR(fecp, ievent) & FR(fecp, imask)) != 0) {
732
733 if (!fpi->use_napi)
734 FW(fecp, ievent, int_events);
735 else {
736 int_events_napi = int_events & ~(FEC_ENET_RXF | FEC_ENET_RXB);
737 FW(fecp, ievent, int_events_napi);
738 }
739
740 if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR |
741 FEC_ENET_BABT | FEC_ENET_EBERR)) != 0)
742 printk(KERN_WARNING DRV_MODULE_NAME
743 ": %s FEC ERROR(s) 0x%x\n",
744 dev->name, int_events);
745
746 if ((int_events & FEC_ENET_RXF) != 0) {
747 if (!fpi->use_napi)
748 fec_enet_rx_common(dev, NULL);
749 else {
750 if (netif_rx_schedule_prep(dev)) {
751 /* disable rx interrupts */
752 FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
753 __netif_rx_schedule(dev);
754 } else {
755 printk(KERN_ERR DRV_MODULE_NAME
756 ": %s driver bug! interrupt while in poll!\n",
757 dev->name);
758 FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
759 }
760 }
761 }
762
763 if ((int_events & FEC_ENET_TXF) != 0)
764 fec_enet_tx(dev);
765 }
766
767 return IRQ_HANDLED;
768}
769
770/* This interrupt occurs when the PHY detects a link change. */
771static irqreturn_t
772fec_mii_link_interrupt(int irq, void *dev_id, struct pt_regs *regs)
773{
774 struct net_device *dev = dev_id;
775 struct fec_enet_private *fep;
776 const struct fec_platform_info *fpi;
777
778 if (unlikely(dev == NULL))
779 return IRQ_NONE;
780
781 fep = netdev_priv(dev);
782 fpi = fep->fpi;
783
784 if (!fpi->use_mdio)
785 return IRQ_NONE;
786
787 /*
788 * Acknowledge the interrupt if possible. If we have not
789 * found the PHY yet we can't process or acknowledge the
790 * interrupt now. Instead we ignore this interrupt for now,
791 * which we can do since it is edge triggered. It will be
792 * acknowledged later by fec_enet_open().
793 */
794 if (!fep->phy)
795 return IRQ_NONE;
796
797 fec_mii_ack_int(dev);
798 fec_mii_link_status_change_check(dev, 0);
799
800 return IRQ_HANDLED;
801}
802
803
804/**********************************************************************************/
805
806static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
807{
808 struct fec_enet_private *fep = netdev_priv(dev);
809 fec_t *fecp = fep->fecp;
810 cbd_t *bdp;
811 int curidx;
812 unsigned long flags;
813
814 spin_lock_irqsave(&fep->tx_lock, flags);
815
816 /*
817 * Fill in a Tx ring entry
818 */
819 bdp = fep->cur_tx;
820
821 if (!fep->tx_free || (CBDR_SC(bdp) & BD_ENET_TX_READY)) {
822 netif_stop_queue(dev);
823 spin_unlock_irqrestore(&fep->tx_lock, flags);
824
825 /*
826 * Ooops. All transmit buffers are full. Bail out.
827 * This should not happen, since the tx queue should be stopped.
828 */
829 printk(KERN_WARNING DRV_MODULE_NAME
830 ": %s tx queue full!.\n", dev->name);
831 return 1;
832 }
833
834 curidx = bdp - fep->tx_bd_base;
835 /*
836 * Clear all of the status flags.
837 */
838 CBDC_SC(bdp, BD_ENET_TX_STATS);
839
840 /*
841 * Save skb pointer.
842 */
843 fep->tx_skbuff[curidx] = skb;
844
845 fep->stats.tx_bytes += skb->len;
846
847 /*
848 * Push the data cache so the CPM does not get stale memory data.
849 */
850 CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
851 skb->len, DMA_TO_DEVICE));
852 CBDW_DATLEN(bdp, skb->len);
853
854 dev->trans_start = jiffies;
855
856 /*
857 * If this was the last BD in the ring, start at the beginning again.
858 */
859 if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)
860 fep->cur_tx++;
861 else
862 fep->cur_tx = fep->tx_bd_base;
863
864 if (!--fep->tx_free)
865 netif_stop_queue(dev);
866
867 /*
868 * Trigger transmission start
869 */
870 CBDS_SC(bdp, BD_ENET_TX_READY | BD_ENET_TX_INTR |
871 BD_ENET_TX_LAST | BD_ENET_TX_TC);
872 FW(fecp, x_des_active, 0x01000000);
873
874 spin_unlock_irqrestore(&fep->tx_lock, flags);
875
876 return 0;
877}
878
879static void fec_timeout(struct net_device *dev)
880{
881 struct fec_enet_private *fep = netdev_priv(dev);
882
883 fep->stats.tx_errors++;
884
885 if (fep->tx_free)
886 netif_wake_queue(dev);
887
888 /* check link status again */
889 fec_mii_link_status_change_check(dev, 0);
890}
891
892static int fec_enet_open(struct net_device *dev)
893{
894 struct fec_enet_private *fep = netdev_priv(dev);
895 const struct fec_platform_info *fpi = fep->fpi;
896 unsigned long flags;
897
898 /* Install our interrupt handler. */
899 if (request_irq(fpi->fec_irq, fec_enet_interrupt, 0, "fec", dev) != 0) {
900 printk(KERN_ERR DRV_MODULE_NAME
901 ": %s Could not allocate FEC IRQ!", dev->name);
902 return -EINVAL;
903 }
904
905 /* Install our phy interrupt handler */
906 if (fpi->phy_irq != -1 &&
907 request_irq(fpi->phy_irq, fec_mii_link_interrupt, 0, "fec-phy",
908 dev) != 0) {
909 printk(KERN_ERR DRV_MODULE_NAME
910 ": %s Could not allocate PHY IRQ!", dev->name);
911 free_irq(fpi->fec_irq, dev);
912 return -EINVAL;
913 }
914
915 if (fpi->use_mdio) {
916 fec_mii_startup(dev);
917 netif_carrier_off(dev);
918 fec_mii_link_status_change_check(dev, 1);
919 } else {
920 spin_lock_irqsave(&fep->lock, flags);
921 fec_restart(dev, 1, 100); /* XXX this sucks */
922 spin_unlock_irqrestore(&fep->lock, flags);
923
924 netif_carrier_on(dev);
925 netif_start_queue(dev);
926 }
927 return 0;
928}
929
930static int fec_enet_close(struct net_device *dev)
931{
932 struct fec_enet_private *fep = netdev_priv(dev);
933 const struct fec_platform_info *fpi = fep->fpi;
934 unsigned long flags;
935
936 netif_stop_queue(dev);
937 netif_carrier_off(dev);
938
939 if (fpi->use_mdio)
940 fec_mii_shutdown(dev);
941
942 spin_lock_irqsave(&fep->lock, flags);
943 fec_stop(dev);
944 spin_unlock_irqrestore(&fep->lock, flags);
945
946 /* release any irqs */
947 if (fpi->phy_irq != -1)
948 free_irq(fpi->phy_irq, dev);
949 free_irq(fpi->fec_irq, dev);
950
951 return 0;
952}
953
954static struct net_device_stats *fec_enet_get_stats(struct net_device *dev)
955{
956 struct fec_enet_private *fep = netdev_priv(dev);
957 return &fep->stats;
958}
959
960static int fec_enet_poll(struct net_device *dev, int *budget)
961{
962 return fec_enet_rx_common(dev, budget);
963}
964
965/*************************************************************************/
966
967static void fec_get_drvinfo(struct net_device *dev,
968 struct ethtool_drvinfo *info)
969{
970 strcpy(info->driver, DRV_MODULE_NAME);
971 strcpy(info->version, DRV_MODULE_VERSION);
972}
973
974static int fec_get_regs_len(struct net_device *dev)
975{
976 return sizeof(fec_t);
977}
978
979static void fec_get_regs(struct net_device *dev, struct ethtool_regs *regs,
980 void *p)
981{
982 struct fec_enet_private *fep = netdev_priv(dev);
983 unsigned long flags;
984
985 if (regs->len < sizeof(fec_t))
986 return;
987
988 regs->version = 0;
989 spin_lock_irqsave(&fep->lock, flags);
990 memcpy_fromio(p, fep->fecp, sizeof(fec_t));
991 spin_unlock_irqrestore(&fep->lock, flags);
992}
993
994static int fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
995{
996 struct fec_enet_private *fep = netdev_priv(dev);
997 unsigned long flags;
998 int rc;
999
1000 spin_lock_irqsave(&fep->lock, flags);
1001 rc = mii_ethtool_gset(&fep->mii_if, cmd);
1002 spin_unlock_irqrestore(&fep->lock, flags);
1003
1004 return rc;
1005}
1006
1007static int fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1008{
1009 struct fec_enet_private *fep = netdev_priv(dev);
1010 unsigned long flags;
1011 int rc;
1012
1013 spin_lock_irqsave(&fep->lock, flags);
1014 rc = mii_ethtool_sset(&fep->mii_if, cmd);
1015 spin_unlock_irqrestore(&fep->lock, flags);
1016
1017 return rc;
1018}
1019
1020static int fec_nway_reset(struct net_device *dev)
1021{
1022 struct fec_enet_private *fep = netdev_priv(dev);
1023 return mii_nway_restart(&fep->mii_if);
1024}
1025
1026static __u32 fec_get_msglevel(struct net_device *dev)
1027{
1028 struct fec_enet_private *fep = netdev_priv(dev);
1029 return fep->msg_enable;
1030}
1031
1032static void fec_set_msglevel(struct net_device *dev, __u32 value)
1033{
1034 struct fec_enet_private *fep = netdev_priv(dev);
1035 fep->msg_enable = value;
1036}
1037
1038static struct ethtool_ops fec_ethtool_ops = {
1039 .get_drvinfo = fec_get_drvinfo,
1040 .get_regs_len = fec_get_regs_len,
1041 .get_settings = fec_get_settings,
1042 .set_settings = fec_set_settings,
1043 .nway_reset = fec_nway_reset,
1044 .get_link = ethtool_op_get_link,
1045 .get_msglevel = fec_get_msglevel,
1046 .set_msglevel = fec_set_msglevel,
1047 .get_tx_csum = ethtool_op_get_tx_csum,
1048 .set_tx_csum = ethtool_op_set_tx_csum, /* local! */
1049 .get_sg = ethtool_op_get_sg,
1050 .set_sg = ethtool_op_set_sg,
1051 .get_regs = fec_get_regs,
1052};
1053
1054static int fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1055{
1056 struct fec_enet_private *fep = netdev_priv(dev);
1057 struct mii_ioctl_data *mii = (struct mii_ioctl_data *)&rq->ifr_data;
1058 unsigned long flags;
1059 int rc;
1060
1061 if (!netif_running(dev))
1062 return -EINVAL;
1063
1064 spin_lock_irqsave(&fep->lock, flags);
1065 rc = generic_mii_ioctl(&fep->mii_if, mii, cmd, NULL);
1066 spin_unlock_irqrestore(&fep->lock, flags);
1067 return rc;
1068}
1069
1070int fec_8xx_init_one(const struct fec_platform_info *fpi,
1071 struct net_device **devp)
1072{
1073 immap_t *immap = (immap_t *) IMAP_ADDR;
1074 static int fec_8xx_version_printed = 0;
1075 struct net_device *dev = NULL;
1076 struct fec_enet_private *fep = NULL;
1077 fec_t *fecp = NULL;
1078 int i;
1079 int err = 0;
1080 int registered = 0;
1081 __u32 siel;
1082
1083 *devp = NULL;
1084
1085 switch (fpi->fec_no) {
1086 case 0:
1087 fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
1088 break;
1089#ifdef CONFIG_DUET
1090 case 1:
1091 fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec2;
1092 break;
1093#endif
1094 default:
1095 return -EINVAL;
1096 }
1097
1098 if (fec_8xx_version_printed++ == 0)
1099 printk(KERN_INFO "%s", version);
1100
1101 i = sizeof(*fep) + (sizeof(struct sk_buff **) *
1102 (fpi->rx_ring + fpi->tx_ring));
1103
1104 dev = alloc_etherdev(i);
1105 if (!dev) {
1106 err = -ENOMEM;
1107 goto err;
1108 }
1109 SET_MODULE_OWNER(dev);
1110
1111 fep = netdev_priv(dev);
1112
1113 /* partial reset of FEC */
1114 fec_whack_reset(fecp);
1115
1116 /* point rx_skbuff, tx_skbuff */
1117 fep->rx_skbuff = (struct sk_buff **)&fep[1];
1118 fep->tx_skbuff = fep->rx_skbuff + fpi->rx_ring;
1119
1120 fep->fecp = fecp;
1121 fep->fpi = fpi;
1122
1123 /* init locks */
1124 spin_lock_init(&fep->lock);
1125 spin_lock_init(&fep->tx_lock);
1126
1127 /*
1128 * Set the Ethernet address.
1129 */
1130 for (i = 0; i < 6; i++)
1131 dev->dev_addr[i] = fpi->macaddr[i];
1132
1133 fep->ring_base = dma_alloc_coherent(NULL,
1134 (fpi->tx_ring + fpi->rx_ring) *
1135 sizeof(cbd_t), &fep->ring_mem_addr,
1136 GFP_KERNEL);
1137 if (fep->ring_base == NULL) {
1138 printk(KERN_ERR DRV_MODULE_NAME
1139 ": %s dma alloc failed.\n", dev->name);
1140 err = -ENOMEM;
1141 goto err;
1142 }
1143
1144 /*
1145 * Set receive and transmit descriptor base.
1146 */
1147 fep->rx_bd_base = fep->ring_base;
1148 fep->tx_bd_base = fep->rx_bd_base + fpi->rx_ring;
1149
1150 /* initialize ring size variables */
1151 fep->tx_ring = fpi->tx_ring;
1152 fep->rx_ring = fpi->rx_ring;
1153
1154 /* SIU interrupt */
1155 if (fpi->phy_irq != -1 &&
1156 (fpi->phy_irq >= SIU_IRQ0 && fpi->phy_irq < SIU_LEVEL7)) {
1157
1158 siel = in_be32(&immap->im_siu_conf.sc_siel);
1159 if ((fpi->phy_irq & 1) == 0)
1160 siel |= (0x80000000 >> fpi->phy_irq);
1161 else
1162 siel &= ~(0x80000000 >> (fpi->phy_irq & ~1));
1163 out_be32(&immap->im_siu_conf.sc_siel, siel);
1164 }
1165
1166 /*
1167 * The FEC Ethernet specific entries in the device structure.
1168 */
1169 dev->open = fec_enet_open;
1170 dev->hard_start_xmit = fec_enet_start_xmit;
1171 dev->tx_timeout = fec_timeout;
1172 dev->watchdog_timeo = TX_TIMEOUT;
1173 dev->stop = fec_enet_close;
1174 dev->get_stats = fec_enet_get_stats;
1175 dev->set_multicast_list = fec_set_multicast_list;
1176 dev->set_mac_address = fec_set_mac_address;
1177 if (fpi->use_napi) {
1178 dev->poll = fec_enet_poll;
1179 dev->weight = fpi->napi_weight;
1180 }
1181 dev->ethtool_ops = &fec_ethtool_ops;
1182 dev->do_ioctl = fec_ioctl;
1183
1184 fep->fec_phy_speed =
1185 ((((fpi->sys_clk + 4999999) / 2500000) / 2) & 0x3F) << 1;
1186
1187 init_timer(&fep->phy_timer_list);
1188
1189 /* partial reset of FEC so that only MII works */
1190 FW(fecp, mii_speed, fep->fec_phy_speed);
1191 FW(fecp, ievent, 0xffc0);
1192 FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
1193 FW(fecp, imask, 0);
1194 FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
1195 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
1196
1197 netif_carrier_off(dev);
1198
1199 err = register_netdev(dev);
1200 if (err != 0)
1201 goto err;
1202 registered = 1;
1203
1204 if (fpi->use_mdio) {
1205 fep->mii_if.dev = dev;
1206 fep->mii_if.mdio_read = fec_mii_read;
1207 fep->mii_if.mdio_write = fec_mii_write;
1208 fep->mii_if.phy_id_mask = 0x1f;
1209 fep->mii_if.reg_num_mask = 0x1f;
1210 fep->mii_if.phy_id = fec_mii_phy_id_detect(dev);
1211 }
1212
1213 *devp = dev;
1214
1215 return 0;
1216
1217 err:
1218 if (dev != NULL) {
1219 if (fecp != NULL)
1220 fec_whack_reset(fecp);
1221
1222 if (registered)
1223 unregister_netdev(dev);
1224
1225 if (fep != NULL) {
1226 if (fep->ring_base)
1227 dma_free_coherent(NULL,
1228 (fpi->tx_ring +
1229 fpi->rx_ring) *
1230 sizeof(cbd_t), fep->ring_base,
1231 fep->ring_mem_addr);
1232 }
1233 free_netdev(dev);
1234 }
1235 return err;
1236}
1237
1238int fec_8xx_cleanup_one(struct net_device *dev)
1239{
1240 struct fec_enet_private *fep = netdev_priv(dev);
1241 fec_t *fecp = fep->fecp;
1242 const struct fec_platform_info *fpi = fep->fpi;
1243
1244 fec_whack_reset(fecp);
1245
1246 unregister_netdev(dev);
1247
1248 dma_free_coherent(NULL, (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
1249 fep->ring_base, fep->ring_mem_addr);
1250
1251 free_netdev(dev);
1252
1253 return 0;
1254}
1255
1256/**************************************************************************************/
1257/**************************************************************************************/
1258/**************************************************************************************/
1259
1260static int __init fec_8xx_init(void)
1261{
1262 return fec_8xx_platform_init();
1263}
1264
1265static void __exit fec_8xx_cleanup(void)
1266{
1267 fec_8xx_platform_cleanup();
1268}
1269
1270/**************************************************************************************/
1271/**************************************************************************************/
1272/**************************************************************************************/
1273
1274module_init(fec_8xx_init);
1275module_exit(fec_8xx_cleanup);
diff --git a/drivers/net/fec_8xx/fec_mii.c b/drivers/net/fec_8xx/fec_mii.c
new file mode 100644
index 000000000000..803eb095cf8e
--- /dev/null
+++ b/drivers/net/fec_8xx/fec_mii.c
@@ -0,0 +1,380 @@
1/*
2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
8 * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
9 *
10 * Released under the GPL
11 */
12
13#include <linux/config.h>
14#include <linux/module.h>
15#include <linux/types.h>
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/string.h>
19#include <linux/ptrace.h>
20#include <linux/errno.h>
21#include <linux/ioport.h>
22#include <linux/slab.h>
23#include <linux/interrupt.h>
24#include <linux/pci.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mii.h>
32#include <linux/ethtool.h>
33#include <linux/bitops.h>
34
35#include <asm/8xx_immap.h>
36#include <asm/pgtable.h>
37#include <asm/mpc8xx.h>
38#include <asm/irq.h>
39#include <asm/uaccess.h>
40#include <asm/commproc.h>
41
42/*************************************************/
43
44#include "fec_8xx.h"
45
46/*************************************************/
47
48/* Make MII read/write commands for the FEC.
49*/
50#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
51#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
52#define mk_mii_end 0
53
54/*************************************************/
55
56/* XXX both FECs use the MII interface of FEC1 */
57static DEFINE_SPINLOCK(fec_mii_lock);
58
59#define FEC_MII_LOOPS 10000
60
61int fec_mii_read(struct net_device *dev, int phy_id, int location)
62{
63 struct fec_enet_private *fep = netdev_priv(dev);
64 fec_t *fecp;
65 int i, ret = -1;
66 unsigned long flags;
67
68 /* XXX MII interface is only connected to FEC1 */
69 fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
70
71 spin_lock_irqsave(&fec_mii_lock, flags);
72
73 if ((FR(fecp, r_cntrl) & FEC_RCNTRL_MII_MODE) == 0) {
74 FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
75 FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
76 FW(fecp, ievent, FEC_ENET_MII);
77 }
78
79 /* Add PHY address to register command. */
80 FW(fecp, mii_speed, fep->fec_phy_speed);
81 FW(fecp, mii_data, (phy_id << 23) | mk_mii_read(location));
82
83 for (i = 0; i < FEC_MII_LOOPS; i++)
84 if ((FR(fecp, ievent) & FEC_ENET_MII) != 0)
85 break;
86
87 if (i < FEC_MII_LOOPS) {
88 FW(fecp, ievent, FEC_ENET_MII);
89 ret = FR(fecp, mii_data) & 0xffff;
90 }
91
92 spin_unlock_irqrestore(&fec_mii_lock, flags);
93
94 return ret;
95}
96
97void fec_mii_write(struct net_device *dev, int phy_id, int location, int value)
98{
99 struct fec_enet_private *fep = netdev_priv(dev);
100 fec_t *fecp;
101 unsigned long flags;
102 int i;
103
104 /* XXX MII interface is only connected to FEC1 */
105 fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
106
107 spin_lock_irqsave(&fec_mii_lock, flags);
108
109 if ((FR(fecp, r_cntrl) & FEC_RCNTRL_MII_MODE) == 0) {
110 FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
111 FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
112 FW(fecp, ievent, FEC_ENET_MII);
113 }
114
115 /* Add PHY address to register command. */
116 FW(fecp, mii_speed, fep->fec_phy_speed); /* always adapt mii speed */
117 FW(fecp, mii_data, (phy_id << 23) | mk_mii_write(location, value));
118
119 for (i = 0; i < FEC_MII_LOOPS; i++)
120 if ((FR(fecp, ievent) & FEC_ENET_MII) != 0)
121 break;
122
123 if (i < FEC_MII_LOOPS)
124 FW(fecp, ievent, FEC_ENET_MII);
125
126 spin_unlock_irqrestore(&fec_mii_lock, flags);
127}
128
129/*************************************************/
130
131#ifdef CONFIG_FEC_8XX_GENERIC_PHY
132
133/*
134 * Generic PHY support.
135 * Should work for all PHYs, but link change is detected by polling
136 */
137
138static void generic_timer_callback(unsigned long data)
139{
140 struct net_device *dev = (struct net_device *)data;
141 struct fec_enet_private *fep = netdev_priv(dev);
142
143 fep->phy_timer_list.expires = jiffies + HZ / 2;
144
145 add_timer(&fep->phy_timer_list);
146
147 fec_mii_link_status_change_check(dev, 0);
148}
149
150static void generic_startup(struct net_device *dev)
151{
152 struct fec_enet_private *fep = netdev_priv(dev);
153
154 fep->phy_timer_list.expires = jiffies + HZ / 2; /* every 500ms */
155 fep->phy_timer_list.data = (unsigned long)dev;
156 fep->phy_timer_list.function = generic_timer_callback;
157 add_timer(&fep->phy_timer_list);
158}
159
160static void generic_shutdown(struct net_device *dev)
161{
162 struct fec_enet_private *fep = netdev_priv(dev);
163
164 del_timer_sync(&fep->phy_timer_list);
165}
166
167#endif
168
169#ifdef CONFIG_FEC_8XX_DM9161_PHY
170
171/* ------------------------------------------------------------------------- */
172/* The Davicom DM9161 is used on the NETTA board */
173
174/* register definitions */
175
176#define MII_DM9161_ACR 16 /* Aux. Config Register */
177#define MII_DM9161_ACSR 17 /* Aux. Config/Status Register */
178#define MII_DM9161_10TCSR 18 /* 10BaseT Config/Status Reg. */
179#define MII_DM9161_INTR 21 /* Interrupt Register */
180#define MII_DM9161_RECR 22 /* Receive Error Counter Reg. */
181#define MII_DM9161_DISCR 23 /* Disconnect Counter Register */
182
183static void dm9161_startup(struct net_device *dev)
184{
185 struct fec_enet_private *fep = netdev_priv(dev);
186
187 fec_mii_write(dev, fep->mii_if.phy_id, MII_DM9161_INTR, 0x0000);
188}
189
190static void dm9161_ack_int(struct net_device *dev)
191{
192 struct fec_enet_private *fep = netdev_priv(dev);
193
194 fec_mii_read(dev, fep->mii_if.phy_id, MII_DM9161_INTR);
195}
196
197static void dm9161_shutdown(struct net_device *dev)
198{
199 struct fec_enet_private *fep = netdev_priv(dev);
200
201 fec_mii_write(dev, fep->mii_if.phy_id, MII_DM9161_INTR, 0x0f00);
202}
203
204#endif
205
206/**********************************************************************************/
207
208static const struct phy_info phy_info[] = {
209#ifdef CONFIG_FEC_8XX_DM9161_PHY
210 {
211 .id = 0x00181b88,
212 .name = "DM9161",
213 .startup = dm9161_startup,
214 .ack_int = dm9161_ack_int,
215 .shutdown = dm9161_shutdown,
216 },
217#endif
218#ifdef CONFIG_FEC_8XX_GENERIC_PHY
219 {
220 .id = 0,
221 .name = "GENERIC",
222 .startup = generic_startup,
223 .shutdown = generic_shutdown,
224 },
225#endif
226};
227
228/**********************************************************************************/
229
230int fec_mii_phy_id_detect(struct net_device *dev)
231{
232 struct fec_enet_private *fep = netdev_priv(dev);
233 const struct fec_platform_info *fpi = fep->fpi;
234 int i, r, start, end, phytype, physubtype;
235 const struct phy_info *phy;
236 int phy_hwid, phy_id;
237
238 /* if no MDIO */
239 if (fpi->use_mdio == 0)
240 return -1;
241
242 phy_hwid = -1;
243 fep->phy = NULL;
244
245 /* auto-detect? */
246 if (fpi->phy_addr == -1) {
247 start = 0;
248 end = 32;
249 } else { /* direct */
250 start = fpi->phy_addr;
251 end = start + 1;
252 }
253
254 for (phy_id = start; phy_id < end; phy_id++) {
255 r = fec_mii_read(dev, phy_id, MII_PHYSID1);
256 if (r == -1 || (phytype = (r & 0xffff)) == 0xffff)
257 continue;
258 r = fec_mii_read(dev, phy_id, MII_PHYSID2);
259 if (r == -1 || (physubtype = (r & 0xffff)) == 0xffff)
260 continue;
261 phy_hwid = (phytype << 16) | physubtype;
262 if (phy_hwid != -1)
263 break;
264 }
265
266 if (phy_hwid == -1) {
267 printk(KERN_ERR DRV_MODULE_NAME
268 ": %s No PHY detected!\n", dev->name);
269 return -1;
270 }
271
272 for (i = 0, phy = phy_info; i < sizeof(phy_info) / sizeof(phy_info[0]);
273 i++, phy++)
274 if (phy->id == (phy_hwid >> 4) || phy->id == 0)
275 break;
276
277 if (i >= sizeof(phy_info) / sizeof(phy_info[0])) {
278 printk(KERN_ERR DRV_MODULE_NAME
279 ": %s PHY id 0x%08x is not supported!\n",
280 dev->name, phy_hwid);
281 return -1;
282 }
283
284 fep->phy = phy;
285
286 printk(KERN_INFO DRV_MODULE_NAME
287 ": %s Phy @ 0x%x, type %s (0x%08x)\n",
288 dev->name, phy_id, fep->phy->name, phy_hwid);
289
290 return phy_id;
291}
292
293void fec_mii_startup(struct net_device *dev)
294{
295 struct fec_enet_private *fep = netdev_priv(dev);
296 const struct fec_platform_info *fpi = fep->fpi;
297
298 if (!fpi->use_mdio || fep->phy == NULL)
299 return;
300
301 if (fep->phy->startup == NULL)
302 return;
303
304 (*fep->phy->startup) (dev);
305}
306
307void fec_mii_shutdown(struct net_device *dev)
308{
309 struct fec_enet_private *fep = netdev_priv(dev);
310 const struct fec_platform_info *fpi = fep->fpi;
311
312 if (!fpi->use_mdio || fep->phy == NULL)
313 return;
314
315 if (fep->phy->shutdown == NULL)
316 return;
317
318 (*fep->phy->shutdown) (dev);
319}
320
321void fec_mii_ack_int(struct net_device *dev)
322{
323 struct fec_enet_private *fep = netdev_priv(dev);
324 const struct fec_platform_info *fpi = fep->fpi;
325
326 if (!fpi->use_mdio || fep->phy == NULL)
327 return;
328
329 if (fep->phy->ack_int == NULL)
330 return;
331
332 (*fep->phy->ack_int) (dev);
333}
334
335/* helper function */
336static int mii_negotiated(struct mii_if_info *mii)
337{
338 int advert, lpa, val;
339
340 if (!mii_link_ok(mii))
341 return 0;
342
343 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
344 if ((val & BMSR_ANEGCOMPLETE) == 0)
345 return 0;
346
347 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
348 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
349
350 return mii_nway_result(advert & lpa);
351}
352
353void fec_mii_link_status_change_check(struct net_device *dev, int init_media)
354{
355 struct fec_enet_private *fep = netdev_priv(dev);
356 unsigned int media;
357 unsigned long flags;
358
359 if (mii_check_media(&fep->mii_if, netif_msg_link(fep), init_media) == 0)
360 return;
361
362 media = mii_negotiated(&fep->mii_if);
363
364 if (netif_carrier_ok(dev)) {
365 spin_lock_irqsave(&fep->lock, flags);
366 fec_restart(dev, !!(media & ADVERTISE_FULL),
367 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)) ?
368 100 : 10);
369 spin_unlock_irqrestore(&fep->lock, flags);
370
371 netif_start_queue(dev);
372 } else {
373 netif_stop_queue(dev);
374
375 spin_lock_irqsave(&fep->lock, flags);
376 fec_stop(dev);
377 spin_unlock_irqrestore(&fep->lock, flags);
378
379 }
380}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-16 03:32:34 -0500