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Diffstat (limited to 'drivers/net/fec.c')
-rw-r--r--drivers/net/fec.c92
1 files changed, 0 insertions, 92 deletions
diff --git a/drivers/net/fec.c b/drivers/net/fec.c
index 7e33c129d51c..b754f600e44f 100644
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -72,8 +72,6 @@ static unsigned int fec_hw[] = {
72 (MCF_MBAR+0x30000), 72 (MCF_MBAR+0x30000),
73#elif defined(CONFIG_M532x) 73#elif defined(CONFIG_M532x)
74 (MCF_MBAR+0xfc030000), 74 (MCF_MBAR+0xfc030000),
75#else
76 &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec),
77#endif 75#endif
78}; 76};
79 77
@@ -1760,96 +1758,6 @@ static void __inline__ fec_uncache(unsigned long addr)
1760{ 1758{
1761} 1759}
1762 1760
1763/* ------------------------------------------------------------------------- */
1764
1765
1766#else
1767
1768/*
1769 * Code specific to the MPC860T setup.
1770 */
1771static void __inline__ fec_request_intrs(struct net_device *dev)
1772{
1773 volatile immap_t *immap;
1774
1775 immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */
1776
1777 if (request_8xxirq(FEC_INTERRUPT, fec_enet_interrupt, 0, "fec", dev) != 0)
1778 panic("Could not allocate FEC IRQ!");
1779}
1780
1781static void __inline__ fec_get_mac(struct net_device *dev)
1782{
1783 bd_t *bd;
1784
1785 bd = (bd_t *)__res;
1786 memcpy(dev->dev_addr, bd->bi_enetaddr, ETH_ALEN);
1787}
1788
1789static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep)
1790{
1791 extern uint _get_IMMR(void);
1792 volatile immap_t *immap;
1793 volatile fec_t *fecp;
1794
1795 fecp = fep->hwp;
1796 immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */
1797
1798 /* Configure all of port D for MII.
1799 */
1800 immap->im_ioport.iop_pdpar = 0x1fff;
1801
1802 /* Bits moved from Rev. D onward.
1803 */
1804 if ((_get_IMMR() & 0xffff) < 0x0501)
1805 immap->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */
1806 else
1807 immap->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */
1808
1809 /* Set MII speed to 2.5 MHz
1810 */
1811 fecp->fec_mii_speed = fep->phy_speed =
1812 ((bd->bi_busfreq * 1000000) / 2500000) & 0x7e;
1813}
1814
1815static void __inline__ fec_enable_phy_intr(void)
1816{
1817 volatile fec_t *fecp;
1818
1819 fecp = fep->hwp;
1820
1821 /* Enable MII command finished interrupt
1822 */
1823 fecp->fec_ivec = (FEC_INTERRUPT/2) << 29;
1824}
1825
1826static void __inline__ fec_disable_phy_intr(void)
1827{
1828}
1829
1830static void __inline__ fec_phy_ack_intr(void)
1831{
1832}
1833
1834static void __inline__ fec_localhw_setup(void)
1835{
1836 volatile fec_t *fecp;
1837
1838 fecp = fep->hwp;
1839 fecp->fec_r_hash = PKT_MAXBUF_SIZE;
1840 /* Enable big endian and don't care about SDMA FC.
1841 */
1842 fecp->fec_fun_code = 0x78000000;
1843}
1844
1845static void __inline__ fec_uncache(unsigned long addr)
1846{
1847 pte_t *pte;
1848 pte = va_to_pte(mem_addr);
1849 pte_val(*pte) |= _PAGE_NO_CACHE;
1850 flush_tlb_page(init_mm.mmap, mem_addr);
1851}
1852
1853#endif 1761#endif
1854 1762
1855/* ------------------------------------------------------------------------- */ 1763/* ------------------------------------------------------------------------- */