diff options
Diffstat (limited to 'drivers/net/ethernet')
52 files changed, 718 insertions, 467 deletions
diff --git a/drivers/net/ethernet/altera/Kconfig b/drivers/net/ethernet/altera/Kconfig index 80c1ab74a4b8..fdddba51473e 100644 --- a/drivers/net/ethernet/altera/Kconfig +++ b/drivers/net/ethernet/altera/Kconfig | |||
@@ -1,5 +1,6 @@ | |||
1 | config ALTERA_TSE | 1 | config ALTERA_TSE |
2 | tristate "Altera Triple-Speed Ethernet MAC support" | 2 | tristate "Altera Triple-Speed Ethernet MAC support" |
3 | depends on HAS_DMA | ||
3 | select PHYLIB | 4 | select PHYLIB |
4 | ---help--- | 5 | ---help--- |
5 | This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. | 6 | This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. |
diff --git a/drivers/net/ethernet/altera/altera_msgdma.c b/drivers/net/ethernet/altera/altera_msgdma.c index 3df18669ea30..4d1f2fdd5c32 100644 --- a/drivers/net/ethernet/altera/altera_msgdma.c +++ b/drivers/net/ethernet/altera/altera_msgdma.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include "altera_utils.h" | 18 | #include "altera_utils.h" |
19 | #include "altera_tse.h" | 19 | #include "altera_tse.h" |
20 | #include "altera_msgdmahw.h" | 20 | #include "altera_msgdmahw.h" |
21 | #include "altera_msgdma.h" | ||
21 | 22 | ||
22 | /* No initialization work to do for MSGDMA */ | 23 | /* No initialization work to do for MSGDMA */ |
23 | int msgdma_initialize(struct altera_tse_private *priv) | 24 | int msgdma_initialize(struct altera_tse_private *priv) |
@@ -29,6 +30,10 @@ void msgdma_uninitialize(struct altera_tse_private *priv) | |||
29 | { | 30 | { |
30 | } | 31 | } |
31 | 32 | ||
33 | void msgdma_start_rxdma(struct altera_tse_private *priv) | ||
34 | { | ||
35 | } | ||
36 | |||
32 | void msgdma_reset(struct altera_tse_private *priv) | 37 | void msgdma_reset(struct altera_tse_private *priv) |
33 | { | 38 | { |
34 | int counter; | 39 | int counter; |
@@ -154,7 +159,7 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv) | |||
154 | 159 | ||
155 | /* Put buffer to the mSGDMA RX FIFO | 160 | /* Put buffer to the mSGDMA RX FIFO |
156 | */ | 161 | */ |
157 | int msgdma_add_rx_desc(struct altera_tse_private *priv, | 162 | void msgdma_add_rx_desc(struct altera_tse_private *priv, |
158 | struct tse_buffer *rxbuffer) | 163 | struct tse_buffer *rxbuffer) |
159 | { | 164 | { |
160 | struct msgdma_extended_desc *desc = priv->rx_dma_desc; | 165 | struct msgdma_extended_desc *desc = priv->rx_dma_desc; |
@@ -175,7 +180,6 @@ int msgdma_add_rx_desc(struct altera_tse_private *priv, | |||
175 | iowrite32(0, &desc->burst_seq_num); | 180 | iowrite32(0, &desc->burst_seq_num); |
176 | iowrite32(0x00010001, &desc->stride); | 181 | iowrite32(0x00010001, &desc->stride); |
177 | iowrite32(control, &desc->control); | 182 | iowrite32(control, &desc->control); |
178 | return 1; | ||
179 | } | 183 | } |
180 | 184 | ||
181 | /* status is returned on upper 16 bits, | 185 | /* status is returned on upper 16 bits, |
diff --git a/drivers/net/ethernet/altera/altera_msgdma.h b/drivers/net/ethernet/altera/altera_msgdma.h index 7f0f5bf2bba2..42cf61c81057 100644 --- a/drivers/net/ethernet/altera/altera_msgdma.h +++ b/drivers/net/ethernet/altera/altera_msgdma.h | |||
@@ -25,10 +25,11 @@ void msgdma_disable_txirq(struct altera_tse_private *); | |||
25 | void msgdma_clear_rxirq(struct altera_tse_private *); | 25 | void msgdma_clear_rxirq(struct altera_tse_private *); |
26 | void msgdma_clear_txirq(struct altera_tse_private *); | 26 | void msgdma_clear_txirq(struct altera_tse_private *); |
27 | u32 msgdma_tx_completions(struct altera_tse_private *); | 27 | u32 msgdma_tx_completions(struct altera_tse_private *); |
28 | int msgdma_add_rx_desc(struct altera_tse_private *, struct tse_buffer *); | 28 | void msgdma_add_rx_desc(struct altera_tse_private *, struct tse_buffer *); |
29 | int msgdma_tx_buffer(struct altera_tse_private *, struct tse_buffer *); | 29 | int msgdma_tx_buffer(struct altera_tse_private *, struct tse_buffer *); |
30 | u32 msgdma_rx_status(struct altera_tse_private *); | 30 | u32 msgdma_rx_status(struct altera_tse_private *); |
31 | int msgdma_initialize(struct altera_tse_private *); | 31 | int msgdma_initialize(struct altera_tse_private *); |
32 | void msgdma_uninitialize(struct altera_tse_private *); | 32 | void msgdma_uninitialize(struct altera_tse_private *); |
33 | void msgdma_start_rxdma(struct altera_tse_private *); | ||
33 | 34 | ||
34 | #endif /* __ALTERA_MSGDMA_H__ */ | 35 | #endif /* __ALTERA_MSGDMA_H__ */ |
diff --git a/drivers/net/ethernet/altera/altera_sgdma.c b/drivers/net/ethernet/altera/altera_sgdma.c index 0ee96639ae44..9ce8630692b6 100644 --- a/drivers/net/ethernet/altera/altera_sgdma.c +++ b/drivers/net/ethernet/altera/altera_sgdma.c | |||
@@ -20,15 +20,15 @@ | |||
20 | #include "altera_sgdmahw.h" | 20 | #include "altera_sgdmahw.h" |
21 | #include "altera_sgdma.h" | 21 | #include "altera_sgdma.h" |
22 | 22 | ||
23 | static void sgdma_descrip(struct sgdma_descrip *desc, | 23 | static void sgdma_setup_descrip(struct sgdma_descrip *desc, |
24 | struct sgdma_descrip *ndesc, | 24 | struct sgdma_descrip *ndesc, |
25 | dma_addr_t ndesc_phys, | 25 | dma_addr_t ndesc_phys, |
26 | dma_addr_t raddr, | 26 | dma_addr_t raddr, |
27 | dma_addr_t waddr, | 27 | dma_addr_t waddr, |
28 | u16 length, | 28 | u16 length, |
29 | int generate_eop, | 29 | int generate_eop, |
30 | int rfixed, | 30 | int rfixed, |
31 | int wfixed); | 31 | int wfixed); |
32 | 32 | ||
33 | static int sgdma_async_write(struct altera_tse_private *priv, | 33 | static int sgdma_async_write(struct altera_tse_private *priv, |
34 | struct sgdma_descrip *desc); | 34 | struct sgdma_descrip *desc); |
@@ -64,11 +64,15 @@ queue_rx_peekhead(struct altera_tse_private *priv); | |||
64 | 64 | ||
65 | int sgdma_initialize(struct altera_tse_private *priv) | 65 | int sgdma_initialize(struct altera_tse_private *priv) |
66 | { | 66 | { |
67 | priv->txctrlreg = SGDMA_CTRLREG_ILASTD; | 67 | priv->txctrlreg = SGDMA_CTRLREG_ILASTD | |
68 | SGDMA_CTRLREG_INTEN; | ||
68 | 69 | ||
69 | priv->rxctrlreg = SGDMA_CTRLREG_IDESCRIP | | 70 | priv->rxctrlreg = SGDMA_CTRLREG_IDESCRIP | |
71 | SGDMA_CTRLREG_INTEN | | ||
70 | SGDMA_CTRLREG_ILASTD; | 72 | SGDMA_CTRLREG_ILASTD; |
71 | 73 | ||
74 | priv->sgdmadesclen = sizeof(struct sgdma_descrip); | ||
75 | |||
72 | INIT_LIST_HEAD(&priv->txlisthd); | 76 | INIT_LIST_HEAD(&priv->txlisthd); |
73 | INIT_LIST_HEAD(&priv->rxlisthd); | 77 | INIT_LIST_HEAD(&priv->rxlisthd); |
74 | 78 | ||
@@ -93,6 +97,16 @@ int sgdma_initialize(struct altera_tse_private *priv) | |||
93 | return -EINVAL; | 97 | return -EINVAL; |
94 | } | 98 | } |
95 | 99 | ||
100 | /* Initialize descriptor memory to all 0's, sync memory to cache */ | ||
101 | memset(priv->tx_dma_desc, 0, priv->txdescmem); | ||
102 | memset(priv->rx_dma_desc, 0, priv->rxdescmem); | ||
103 | |||
104 | dma_sync_single_for_device(priv->device, priv->txdescphys, | ||
105 | priv->txdescmem, DMA_TO_DEVICE); | ||
106 | |||
107 | dma_sync_single_for_device(priv->device, priv->rxdescphys, | ||
108 | priv->rxdescmem, DMA_TO_DEVICE); | ||
109 | |||
96 | return 0; | 110 | return 0; |
97 | } | 111 | } |
98 | 112 | ||
@@ -130,26 +144,23 @@ void sgdma_reset(struct altera_tse_private *priv) | |||
130 | iowrite32(0, &prxsgdma->control); | 144 | iowrite32(0, &prxsgdma->control); |
131 | } | 145 | } |
132 | 146 | ||
147 | /* For SGDMA, interrupts remain enabled after initially enabling, | ||
148 | * so no need to provide implementations for abstract enable | ||
149 | * and disable | ||
150 | */ | ||
151 | |||
133 | void sgdma_enable_rxirq(struct altera_tse_private *priv) | 152 | void sgdma_enable_rxirq(struct altera_tse_private *priv) |
134 | { | 153 | { |
135 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | ||
136 | priv->rxctrlreg |= SGDMA_CTRLREG_INTEN; | ||
137 | tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN); | ||
138 | } | 154 | } |
139 | 155 | ||
140 | void sgdma_enable_txirq(struct altera_tse_private *priv) | 156 | void sgdma_enable_txirq(struct altera_tse_private *priv) |
141 | { | 157 | { |
142 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | ||
143 | priv->txctrlreg |= SGDMA_CTRLREG_INTEN; | ||
144 | tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN); | ||
145 | } | 158 | } |
146 | 159 | ||
147 | /* for SGDMA, RX interrupts remain enabled after enabling */ | ||
148 | void sgdma_disable_rxirq(struct altera_tse_private *priv) | 160 | void sgdma_disable_rxirq(struct altera_tse_private *priv) |
149 | { | 161 | { |
150 | } | 162 | } |
151 | 163 | ||
152 | /* for SGDMA, TX interrupts remain enabled after enabling */ | ||
153 | void sgdma_disable_txirq(struct altera_tse_private *priv) | 164 | void sgdma_disable_txirq(struct altera_tse_private *priv) |
154 | { | 165 | { |
155 | } | 166 | } |
@@ -184,15 +195,15 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) | |||
184 | if (sgdma_txbusy(priv)) | 195 | if (sgdma_txbusy(priv)) |
185 | return 0; | 196 | return 0; |
186 | 197 | ||
187 | sgdma_descrip(cdesc, /* current descriptor */ | 198 | sgdma_setup_descrip(cdesc, /* current descriptor */ |
188 | ndesc, /* next descriptor */ | 199 | ndesc, /* next descriptor */ |
189 | sgdma_txphysaddr(priv, ndesc), | 200 | sgdma_txphysaddr(priv, ndesc), |
190 | buffer->dma_addr, /* address of packet to xmit */ | 201 | buffer->dma_addr, /* address of packet to xmit */ |
191 | 0, /* write addr 0 for tx dma */ | 202 | 0, /* write addr 0 for tx dma */ |
192 | buffer->len, /* length of packet */ | 203 | buffer->len, /* length of packet */ |
193 | SGDMA_CONTROL_EOP, /* Generate EOP */ | 204 | SGDMA_CONTROL_EOP, /* Generate EOP */ |
194 | 0, /* read fixed */ | 205 | 0, /* read fixed */ |
195 | SGDMA_CONTROL_WR_FIXED); /* Generate SOP */ | 206 | SGDMA_CONTROL_WR_FIXED); /* Generate SOP */ |
196 | 207 | ||
197 | pktstx = sgdma_async_write(priv, cdesc); | 208 | pktstx = sgdma_async_write(priv, cdesc); |
198 | 209 | ||
@@ -219,11 +230,15 @@ u32 sgdma_tx_completions(struct altera_tse_private *priv) | |||
219 | return ready; | 230 | return ready; |
220 | } | 231 | } |
221 | 232 | ||
222 | int sgdma_add_rx_desc(struct altera_tse_private *priv, | 233 | void sgdma_start_rxdma(struct altera_tse_private *priv) |
223 | struct tse_buffer *rxbuffer) | 234 | { |
235 | sgdma_async_read(priv); | ||
236 | } | ||
237 | |||
238 | void sgdma_add_rx_desc(struct altera_tse_private *priv, | ||
239 | struct tse_buffer *rxbuffer) | ||
224 | { | 240 | { |
225 | queue_rx(priv, rxbuffer); | 241 | queue_rx(priv, rxbuffer); |
226 | return sgdma_async_read(priv); | ||
227 | } | 242 | } |
228 | 243 | ||
229 | /* status is returned on upper 16 bits, | 244 | /* status is returned on upper 16 bits, |
@@ -240,28 +255,52 @@ u32 sgdma_rx_status(struct altera_tse_private *priv) | |||
240 | unsigned int pktstatus = 0; | 255 | unsigned int pktstatus = 0; |
241 | struct tse_buffer *rxbuffer = NULL; | 256 | struct tse_buffer *rxbuffer = NULL; |
242 | 257 | ||
243 | dma_sync_single_for_cpu(priv->device, | 258 | u32 sts = ioread32(&csr->status); |
244 | priv->rxdescphys, | ||
245 | priv->rxdescmem, | ||
246 | DMA_BIDIRECTIONAL); | ||
247 | 259 | ||
248 | desc = &base[0]; | 260 | desc = &base[0]; |
249 | if ((ioread32(&csr->status) & SGDMA_STSREG_EOP) || | 261 | if (sts & SGDMA_STSREG_EOP) { |
250 | (desc->status & SGDMA_STATUS_EOP)) { | 262 | dma_sync_single_for_cpu(priv->device, |
263 | priv->rxdescphys, | ||
264 | priv->sgdmadesclen, | ||
265 | DMA_FROM_DEVICE); | ||
266 | |||
251 | pktlength = desc->bytes_xferred; | 267 | pktlength = desc->bytes_xferred; |
252 | pktstatus = desc->status & 0x3f; | 268 | pktstatus = desc->status & 0x3f; |
253 | rxstatus = pktstatus; | 269 | rxstatus = pktstatus; |
254 | rxstatus = rxstatus << 16; | 270 | rxstatus = rxstatus << 16; |
255 | rxstatus |= (pktlength & 0xffff); | 271 | rxstatus |= (pktlength & 0xffff); |
256 | 272 | ||
257 | desc->status = 0; | 273 | if (rxstatus) { |
274 | desc->status = 0; | ||
258 | 275 | ||
259 | rxbuffer = dequeue_rx(priv); | 276 | rxbuffer = dequeue_rx(priv); |
260 | if (rxbuffer == NULL) | 277 | if (rxbuffer == NULL) |
261 | netdev_err(priv->dev, | 278 | netdev_info(priv->dev, |
262 | "sgdma rx and rx queue empty!\n"); | 279 | "sgdma rx and rx queue empty!\n"); |
280 | |||
281 | /* Clear control */ | ||
282 | iowrite32(0, &csr->control); | ||
283 | /* clear status */ | ||
284 | iowrite32(0xf, &csr->status); | ||
263 | 285 | ||
264 | /* kick the rx sgdma after reaping this descriptor */ | 286 | /* kick the rx sgdma after reaping this descriptor */ |
287 | pktsrx = sgdma_async_read(priv); | ||
288 | |||
289 | } else { | ||
290 | /* If the SGDMA indicated an end of packet on recv, | ||
291 | * then it's expected that the rxstatus from the | ||
292 | * descriptor is non-zero - meaning a valid packet | ||
293 | * with a nonzero length, or an error has been | ||
294 | * indicated. if not, then all we can do is signal | ||
295 | * an error and return no packet received. Most likely | ||
296 | * there is a system design error, or an error in the | ||
297 | * underlying kernel (cache or cache management problem) | ||
298 | */ | ||
299 | netdev_err(priv->dev, | ||
300 | "SGDMA RX Error Info: %x, %x, %x\n", | ||
301 | sts, desc->status, rxstatus); | ||
302 | } | ||
303 | } else if (sts == 0) { | ||
265 | pktsrx = sgdma_async_read(priv); | 304 | pktsrx = sgdma_async_read(priv); |
266 | } | 305 | } |
267 | 306 | ||
@@ -270,15 +309,15 @@ u32 sgdma_rx_status(struct altera_tse_private *priv) | |||
270 | 309 | ||
271 | 310 | ||
272 | /* Private functions */ | 311 | /* Private functions */ |
273 | static void sgdma_descrip(struct sgdma_descrip *desc, | 312 | static void sgdma_setup_descrip(struct sgdma_descrip *desc, |
274 | struct sgdma_descrip *ndesc, | 313 | struct sgdma_descrip *ndesc, |
275 | dma_addr_t ndesc_phys, | 314 | dma_addr_t ndesc_phys, |
276 | dma_addr_t raddr, | 315 | dma_addr_t raddr, |
277 | dma_addr_t waddr, | 316 | dma_addr_t waddr, |
278 | u16 length, | 317 | u16 length, |
279 | int generate_eop, | 318 | int generate_eop, |
280 | int rfixed, | 319 | int rfixed, |
281 | int wfixed) | 320 | int wfixed) |
282 | { | 321 | { |
283 | /* Clear the next descriptor as not owned by hardware */ | 322 | /* Clear the next descriptor as not owned by hardware */ |
284 | u32 ctrl = ndesc->control; | 323 | u32 ctrl = ndesc->control; |
@@ -319,35 +358,29 @@ static int sgdma_async_read(struct altera_tse_private *priv) | |||
319 | struct sgdma_descrip *cdesc = &descbase[0]; | 358 | struct sgdma_descrip *cdesc = &descbase[0]; |
320 | struct sgdma_descrip *ndesc = &descbase[1]; | 359 | struct sgdma_descrip *ndesc = &descbase[1]; |
321 | 360 | ||
322 | unsigned int sts = ioread32(&csr->status); | ||
323 | struct tse_buffer *rxbuffer = NULL; | 361 | struct tse_buffer *rxbuffer = NULL; |
324 | 362 | ||
325 | if (!sgdma_rxbusy(priv)) { | 363 | if (!sgdma_rxbusy(priv)) { |
326 | rxbuffer = queue_rx_peekhead(priv); | 364 | rxbuffer = queue_rx_peekhead(priv); |
327 | if (rxbuffer == NULL) | 365 | if (rxbuffer == NULL) { |
366 | netdev_err(priv->dev, "no rx buffers available\n"); | ||
328 | return 0; | 367 | return 0; |
329 | 368 | } | |
330 | sgdma_descrip(cdesc, /* current descriptor */ | 369 | |
331 | ndesc, /* next descriptor */ | 370 | sgdma_setup_descrip(cdesc, /* current descriptor */ |
332 | sgdma_rxphysaddr(priv, ndesc), | 371 | ndesc, /* next descriptor */ |
333 | 0, /* read addr 0 for rx dma */ | 372 | sgdma_rxphysaddr(priv, ndesc), |
334 | rxbuffer->dma_addr, /* write addr for rx dma */ | 373 | 0, /* read addr 0 for rx dma */ |
335 | 0, /* read 'til EOP */ | 374 | rxbuffer->dma_addr, /* write addr for rx dma */ |
336 | 0, /* EOP: NA for rx dma */ | 375 | 0, /* read 'til EOP */ |
337 | 0, /* read fixed: NA for rx dma */ | 376 | 0, /* EOP: NA for rx dma */ |
338 | 0); /* SOP: NA for rx DMA */ | 377 | 0, /* read fixed: NA for rx dma */ |
339 | 378 | 0); /* SOP: NA for rx DMA */ | |
340 | /* clear control and status */ | ||
341 | iowrite32(0, &csr->control); | ||
342 | |||
343 | /* If status available, clear those bits */ | ||
344 | if (sts & 0xf) | ||
345 | iowrite32(0xf, &csr->status); | ||
346 | 379 | ||
347 | dma_sync_single_for_device(priv->device, | 380 | dma_sync_single_for_device(priv->device, |
348 | priv->rxdescphys, | 381 | priv->rxdescphys, |
349 | priv->rxdescmem, | 382 | priv->sgdmadesclen, |
350 | DMA_BIDIRECTIONAL); | 383 | DMA_TO_DEVICE); |
351 | 384 | ||
352 | iowrite32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)), | 385 | iowrite32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)), |
353 | &csr->next_descrip); | 386 | &csr->next_descrip); |
@@ -374,7 +407,7 @@ static int sgdma_async_write(struct altera_tse_private *priv, | |||
374 | iowrite32(0x1f, &csr->status); | 407 | iowrite32(0x1f, &csr->status); |
375 | 408 | ||
376 | dma_sync_single_for_device(priv->device, priv->txdescphys, | 409 | dma_sync_single_for_device(priv->device, priv->txdescphys, |
377 | priv->txdescmem, DMA_TO_DEVICE); | 410 | priv->sgdmadesclen, DMA_TO_DEVICE); |
378 | 411 | ||
379 | iowrite32(lower_32_bits(sgdma_txphysaddr(priv, desc)), | 412 | iowrite32(lower_32_bits(sgdma_txphysaddr(priv, desc)), |
380 | &csr->next_descrip); | 413 | &csr->next_descrip); |
diff --git a/drivers/net/ethernet/altera/altera_sgdma.h b/drivers/net/ethernet/altera/altera_sgdma.h index 07d471729dc4..584977e29ef9 100644 --- a/drivers/net/ethernet/altera/altera_sgdma.h +++ b/drivers/net/ethernet/altera/altera_sgdma.h | |||
@@ -26,10 +26,11 @@ void sgdma_clear_rxirq(struct altera_tse_private *); | |||
26 | void sgdma_clear_txirq(struct altera_tse_private *); | 26 | void sgdma_clear_txirq(struct altera_tse_private *); |
27 | int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *); | 27 | int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *); |
28 | u32 sgdma_tx_completions(struct altera_tse_private *); | 28 | u32 sgdma_tx_completions(struct altera_tse_private *); |
29 | int sgdma_add_rx_desc(struct altera_tse_private *priv, struct tse_buffer *); | 29 | void sgdma_add_rx_desc(struct altera_tse_private *priv, struct tse_buffer *); |
30 | void sgdma_status(struct altera_tse_private *); | 30 | void sgdma_status(struct altera_tse_private *); |
31 | u32 sgdma_rx_status(struct altera_tse_private *); | 31 | u32 sgdma_rx_status(struct altera_tse_private *); |
32 | int sgdma_initialize(struct altera_tse_private *); | 32 | int sgdma_initialize(struct altera_tse_private *); |
33 | void sgdma_uninitialize(struct altera_tse_private *); | 33 | void sgdma_uninitialize(struct altera_tse_private *); |
34 | void sgdma_start_rxdma(struct altera_tse_private *); | ||
34 | 35 | ||
35 | #endif /* __ALTERA_SGDMA_H__ */ | 36 | #endif /* __ALTERA_SGDMA_H__ */ |
diff --git a/drivers/net/ethernet/altera/altera_tse.h b/drivers/net/ethernet/altera/altera_tse.h index 8feeed05de0e..465c4aabebbd 100644 --- a/drivers/net/ethernet/altera/altera_tse.h +++ b/drivers/net/ethernet/altera/altera_tse.h | |||
@@ -58,6 +58,8 @@ | |||
58 | /* MAC function configuration default settings */ | 58 | /* MAC function configuration default settings */ |
59 | #define ALTERA_TSE_TX_IPG_LENGTH 12 | 59 | #define ALTERA_TSE_TX_IPG_LENGTH 12 |
60 | 60 | ||
61 | #define ALTERA_TSE_PAUSE_QUANTA 0xffff | ||
62 | |||
61 | #define GET_BIT_VALUE(v, bit) (((v) >> (bit)) & 0x1) | 63 | #define GET_BIT_VALUE(v, bit) (((v) >> (bit)) & 0x1) |
62 | 64 | ||
63 | /* MAC Command_Config Register Bit Definitions | 65 | /* MAC Command_Config Register Bit Definitions |
@@ -390,10 +392,11 @@ struct altera_dmaops { | |||
390 | void (*clear_rxirq)(struct altera_tse_private *); | 392 | void (*clear_rxirq)(struct altera_tse_private *); |
391 | int (*tx_buffer)(struct altera_tse_private *, struct tse_buffer *); | 393 | int (*tx_buffer)(struct altera_tse_private *, struct tse_buffer *); |
392 | u32 (*tx_completions)(struct altera_tse_private *); | 394 | u32 (*tx_completions)(struct altera_tse_private *); |
393 | int (*add_rx_desc)(struct altera_tse_private *, struct tse_buffer *); | 395 | void (*add_rx_desc)(struct altera_tse_private *, struct tse_buffer *); |
394 | u32 (*get_rx_status)(struct altera_tse_private *); | 396 | u32 (*get_rx_status)(struct altera_tse_private *); |
395 | int (*init_dma)(struct altera_tse_private *); | 397 | int (*init_dma)(struct altera_tse_private *); |
396 | void (*uninit_dma)(struct altera_tse_private *); | 398 | void (*uninit_dma)(struct altera_tse_private *); |
399 | void (*start_rxdma)(struct altera_tse_private *); | ||
397 | }; | 400 | }; |
398 | 401 | ||
399 | /* This structure is private to each device. | 402 | /* This structure is private to each device. |
@@ -453,6 +456,7 @@ struct altera_tse_private { | |||
453 | u32 rxctrlreg; | 456 | u32 rxctrlreg; |
454 | dma_addr_t rxdescphys; | 457 | dma_addr_t rxdescphys; |
455 | dma_addr_t txdescphys; | 458 | dma_addr_t txdescphys; |
459 | size_t sgdmadesclen; | ||
456 | 460 | ||
457 | struct list_head txlisthd; | 461 | struct list_head txlisthd; |
458 | struct list_head rxlisthd; | 462 | struct list_head rxlisthd; |
diff --git a/drivers/net/ethernet/altera/altera_tse_ethtool.c b/drivers/net/ethernet/altera/altera_tse_ethtool.c index 319ca74f5e74..76133caffa78 100644 --- a/drivers/net/ethernet/altera/altera_tse_ethtool.c +++ b/drivers/net/ethernet/altera/altera_tse_ethtool.c | |||
@@ -77,7 +77,7 @@ static void tse_get_drvinfo(struct net_device *dev, | |||
77 | struct altera_tse_private *priv = netdev_priv(dev); | 77 | struct altera_tse_private *priv = netdev_priv(dev); |
78 | u32 rev = ioread32(&priv->mac_dev->megacore_revision); | 78 | u32 rev = ioread32(&priv->mac_dev->megacore_revision); |
79 | 79 | ||
80 | strcpy(info->driver, "Altera TSE MAC IP Driver"); | 80 | strcpy(info->driver, "altera_tse"); |
81 | strcpy(info->version, "v8.0"); | 81 | strcpy(info->version, "v8.0"); |
82 | snprintf(info->fw_version, ETHTOOL_FWVERS_LEN, "v%d.%d", | 82 | snprintf(info->fw_version, ETHTOOL_FWVERS_LEN, "v%d.%d", |
83 | rev & 0xFFFF, (rev & 0xFFFF0000) >> 16); | 83 | rev & 0xFFFF, (rev & 0xFFFF0000) >> 16); |
@@ -185,6 +185,12 @@ static void tse_get_regs(struct net_device *dev, struct ethtool_regs *regs, | |||
185 | * how to do any special formatting of this data. | 185 | * how to do any special formatting of this data. |
186 | * This version number will need to change if and | 186 | * This version number will need to change if and |
187 | * when this register table is changed. | 187 | * when this register table is changed. |
188 | * | ||
189 | * version[31:0] = 1: Dump the first 128 TSE Registers | ||
190 | * Upper bits are all 0 by default | ||
191 | * | ||
192 | * Upper 16-bits will indicate feature presence for | ||
193 | * Ethtool register decoding in future version. | ||
188 | */ | 194 | */ |
189 | 195 | ||
190 | regs->version = 1; | 196 | regs->version = 1; |
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c index c70a29e0b9f7..e44a4aeb9701 100644 --- a/drivers/net/ethernet/altera/altera_tse_main.c +++ b/drivers/net/ethernet/altera/altera_tse_main.c | |||
@@ -224,6 +224,7 @@ static int tse_init_rx_buffer(struct altera_tse_private *priv, | |||
224 | dev_kfree_skb_any(rxbuffer->skb); | 224 | dev_kfree_skb_any(rxbuffer->skb); |
225 | return -EINVAL; | 225 | return -EINVAL; |
226 | } | 226 | } |
227 | rxbuffer->dma_addr &= (dma_addr_t)~3; | ||
227 | rxbuffer->len = len; | 228 | rxbuffer->len = len; |
228 | return 0; | 229 | return 0; |
229 | } | 230 | } |
@@ -425,9 +426,10 @@ static int tse_rx(struct altera_tse_private *priv, int limit) | |||
425 | priv->dev->stats.rx_bytes += pktlength; | 426 | priv->dev->stats.rx_bytes += pktlength; |
426 | 427 | ||
427 | entry = next_entry; | 428 | entry = next_entry; |
429 | |||
430 | tse_rx_refill(priv); | ||
428 | } | 431 | } |
429 | 432 | ||
430 | tse_rx_refill(priv); | ||
431 | return count; | 433 | return count; |
432 | } | 434 | } |
433 | 435 | ||
@@ -520,7 +522,6 @@ static irqreturn_t altera_isr(int irq, void *dev_id) | |||
520 | struct altera_tse_private *priv; | 522 | struct altera_tse_private *priv; |
521 | unsigned long int flags; | 523 | unsigned long int flags; |
522 | 524 | ||
523 | |||
524 | if (unlikely(!dev)) { | 525 | if (unlikely(!dev)) { |
525 | pr_err("%s: invalid dev pointer\n", __func__); | 526 | pr_err("%s: invalid dev pointer\n", __func__); |
526 | return IRQ_NONE; | 527 | return IRQ_NONE; |
@@ -868,13 +869,13 @@ static int init_mac(struct altera_tse_private *priv) | |||
868 | /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit | 869 | /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit |
869 | * start address | 870 | * start address |
870 | */ | 871 | */ |
871 | tse_clear_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); | 872 | tse_set_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); |
872 | tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | | 873 | tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | |
873 | ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); | 874 | ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); |
874 | 875 | ||
875 | /* Set the MAC options */ | 876 | /* Set the MAC options */ |
876 | cmd = ioread32(&mac->command_config); | 877 | cmd = ioread32(&mac->command_config); |
877 | cmd |= MAC_CMDCFG_PAD_EN; /* Padding Removal on Receive */ | 878 | cmd &= ~MAC_CMDCFG_PAD_EN; /* No padding Removal on Receive */ |
878 | cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ | 879 | cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ |
879 | cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames | 880 | cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames |
880 | * with CRC errors | 881 | * with CRC errors |
@@ -882,8 +883,16 @@ static int init_mac(struct altera_tse_private *priv) | |||
882 | cmd |= MAC_CMDCFG_CNTL_FRM_ENA; | 883 | cmd |= MAC_CMDCFG_CNTL_FRM_ENA; |
883 | cmd &= ~MAC_CMDCFG_TX_ENA; | 884 | cmd &= ~MAC_CMDCFG_TX_ENA; |
884 | cmd &= ~MAC_CMDCFG_RX_ENA; | 885 | cmd &= ~MAC_CMDCFG_RX_ENA; |
886 | |||
887 | /* Default speed and duplex setting, full/100 */ | ||
888 | cmd &= ~MAC_CMDCFG_HD_ENA; | ||
889 | cmd &= ~MAC_CMDCFG_ETH_SPEED; | ||
890 | cmd &= ~MAC_CMDCFG_ENA_10; | ||
891 | |||
885 | iowrite32(cmd, &mac->command_config); | 892 | iowrite32(cmd, &mac->command_config); |
886 | 893 | ||
894 | iowrite32(ALTERA_TSE_PAUSE_QUANTA, &mac->pause_quanta); | ||
895 | |||
887 | if (netif_msg_hw(priv)) | 896 | if (netif_msg_hw(priv)) |
888 | dev_dbg(priv->device, | 897 | dev_dbg(priv->device, |
889 | "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd); | 898 | "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd); |
@@ -1085,17 +1094,19 @@ static int tse_open(struct net_device *dev) | |||
1085 | 1094 | ||
1086 | spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags); | 1095 | spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags); |
1087 | 1096 | ||
1088 | /* Start MAC Rx/Tx */ | ||
1089 | spin_lock(&priv->mac_cfg_lock); | ||
1090 | tse_set_mac(priv, true); | ||
1091 | spin_unlock(&priv->mac_cfg_lock); | ||
1092 | |||
1093 | if (priv->phydev) | 1097 | if (priv->phydev) |
1094 | phy_start(priv->phydev); | 1098 | phy_start(priv->phydev); |
1095 | 1099 | ||
1096 | napi_enable(&priv->napi); | 1100 | napi_enable(&priv->napi); |
1097 | netif_start_queue(dev); | 1101 | netif_start_queue(dev); |
1098 | 1102 | ||
1103 | priv->dmaops->start_rxdma(priv); | ||
1104 | |||
1105 | /* Start MAC Rx/Tx */ | ||
1106 | spin_lock(&priv->mac_cfg_lock); | ||
1107 | tse_set_mac(priv, true); | ||
1108 | spin_unlock(&priv->mac_cfg_lock); | ||
1109 | |||
1099 | return 0; | 1110 | return 0; |
1100 | 1111 | ||
1101 | tx_request_irq_error: | 1112 | tx_request_irq_error: |
@@ -1167,7 +1178,6 @@ static struct net_device_ops altera_tse_netdev_ops = { | |||
1167 | .ndo_validate_addr = eth_validate_addr, | 1178 | .ndo_validate_addr = eth_validate_addr, |
1168 | }; | 1179 | }; |
1169 | 1180 | ||
1170 | |||
1171 | static int request_and_map(struct platform_device *pdev, const char *name, | 1181 | static int request_and_map(struct platform_device *pdev, const char *name, |
1172 | struct resource **res, void __iomem **ptr) | 1182 | struct resource **res, void __iomem **ptr) |
1173 | { | 1183 | { |
@@ -1235,7 +1245,7 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1235 | /* Get the mapped address to the SGDMA descriptor memory */ | 1245 | /* Get the mapped address to the SGDMA descriptor memory */ |
1236 | ret = request_and_map(pdev, "s1", &dma_res, &descmap); | 1246 | ret = request_and_map(pdev, "s1", &dma_res, &descmap); |
1237 | if (ret) | 1247 | if (ret) |
1238 | goto out_free; | 1248 | goto err_free_netdev; |
1239 | 1249 | ||
1240 | /* Start of that memory is for transmit descriptors */ | 1250 | /* Start of that memory is for transmit descriptors */ |
1241 | priv->tx_dma_desc = descmap; | 1251 | priv->tx_dma_desc = descmap; |
@@ -1254,24 +1264,24 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1254 | if (upper_32_bits(priv->rxdescmem_busaddr)) { | 1264 | if (upper_32_bits(priv->rxdescmem_busaddr)) { |
1255 | dev_dbg(priv->device, | 1265 | dev_dbg(priv->device, |
1256 | "SGDMA bus addresses greater than 32-bits\n"); | 1266 | "SGDMA bus addresses greater than 32-bits\n"); |
1257 | goto out_free; | 1267 | goto err_free_netdev; |
1258 | } | 1268 | } |
1259 | if (upper_32_bits(priv->txdescmem_busaddr)) { | 1269 | if (upper_32_bits(priv->txdescmem_busaddr)) { |
1260 | dev_dbg(priv->device, | 1270 | dev_dbg(priv->device, |
1261 | "SGDMA bus addresses greater than 32-bits\n"); | 1271 | "SGDMA bus addresses greater than 32-bits\n"); |
1262 | goto out_free; | 1272 | goto err_free_netdev; |
1263 | } | 1273 | } |
1264 | } else if (priv->dmaops && | 1274 | } else if (priv->dmaops && |
1265 | priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) { | 1275 | priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) { |
1266 | ret = request_and_map(pdev, "rx_resp", &dma_res, | 1276 | ret = request_and_map(pdev, "rx_resp", &dma_res, |
1267 | &priv->rx_dma_resp); | 1277 | &priv->rx_dma_resp); |
1268 | if (ret) | 1278 | if (ret) |
1269 | goto out_free; | 1279 | goto err_free_netdev; |
1270 | 1280 | ||
1271 | ret = request_and_map(pdev, "tx_desc", &dma_res, | 1281 | ret = request_and_map(pdev, "tx_desc", &dma_res, |
1272 | &priv->tx_dma_desc); | 1282 | &priv->tx_dma_desc); |
1273 | if (ret) | 1283 | if (ret) |
1274 | goto out_free; | 1284 | goto err_free_netdev; |
1275 | 1285 | ||
1276 | priv->txdescmem = resource_size(dma_res); | 1286 | priv->txdescmem = resource_size(dma_res); |
1277 | priv->txdescmem_busaddr = dma_res->start; | 1287 | priv->txdescmem_busaddr = dma_res->start; |
@@ -1279,13 +1289,13 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1279 | ret = request_and_map(pdev, "rx_desc", &dma_res, | 1289 | ret = request_and_map(pdev, "rx_desc", &dma_res, |
1280 | &priv->rx_dma_desc); | 1290 | &priv->rx_dma_desc); |
1281 | if (ret) | 1291 | if (ret) |
1282 | goto out_free; | 1292 | goto err_free_netdev; |
1283 | 1293 | ||
1284 | priv->rxdescmem = resource_size(dma_res); | 1294 | priv->rxdescmem = resource_size(dma_res); |
1285 | priv->rxdescmem_busaddr = dma_res->start; | 1295 | priv->rxdescmem_busaddr = dma_res->start; |
1286 | 1296 | ||
1287 | } else { | 1297 | } else { |
1288 | goto out_free; | 1298 | goto err_free_netdev; |
1289 | } | 1299 | } |
1290 | 1300 | ||
1291 | if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask))) | 1301 | if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask))) |
@@ -1294,26 +1304,26 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1294 | else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32))) | 1304 | else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32))) |
1295 | dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32)); | 1305 | dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32)); |
1296 | else | 1306 | else |
1297 | goto out_free; | 1307 | goto err_free_netdev; |
1298 | 1308 | ||
1299 | /* MAC address space */ | 1309 | /* MAC address space */ |
1300 | ret = request_and_map(pdev, "control_port", &control_port, | 1310 | ret = request_and_map(pdev, "control_port", &control_port, |
1301 | (void __iomem **)&priv->mac_dev); | 1311 | (void __iomem **)&priv->mac_dev); |
1302 | if (ret) | 1312 | if (ret) |
1303 | goto out_free; | 1313 | goto err_free_netdev; |
1304 | 1314 | ||
1305 | /* xSGDMA Rx Dispatcher address space */ | 1315 | /* xSGDMA Rx Dispatcher address space */ |
1306 | ret = request_and_map(pdev, "rx_csr", &dma_res, | 1316 | ret = request_and_map(pdev, "rx_csr", &dma_res, |
1307 | &priv->rx_dma_csr); | 1317 | &priv->rx_dma_csr); |
1308 | if (ret) | 1318 | if (ret) |
1309 | goto out_free; | 1319 | goto err_free_netdev; |
1310 | 1320 | ||
1311 | 1321 | ||
1312 | /* xSGDMA Tx Dispatcher address space */ | 1322 | /* xSGDMA Tx Dispatcher address space */ |
1313 | ret = request_and_map(pdev, "tx_csr", &dma_res, | 1323 | ret = request_and_map(pdev, "tx_csr", &dma_res, |
1314 | &priv->tx_dma_csr); | 1324 | &priv->tx_dma_csr); |
1315 | if (ret) | 1325 | if (ret) |
1316 | goto out_free; | 1326 | goto err_free_netdev; |
1317 | 1327 | ||
1318 | 1328 | ||
1319 | /* Rx IRQ */ | 1329 | /* Rx IRQ */ |
@@ -1321,7 +1331,7 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1321 | if (priv->rx_irq == -ENXIO) { | 1331 | if (priv->rx_irq == -ENXIO) { |
1322 | dev_err(&pdev->dev, "cannot obtain Rx IRQ\n"); | 1332 | dev_err(&pdev->dev, "cannot obtain Rx IRQ\n"); |
1323 | ret = -ENXIO; | 1333 | ret = -ENXIO; |
1324 | goto out_free; | 1334 | goto err_free_netdev; |
1325 | } | 1335 | } |
1326 | 1336 | ||
1327 | /* Tx IRQ */ | 1337 | /* Tx IRQ */ |
@@ -1329,7 +1339,7 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1329 | if (priv->tx_irq == -ENXIO) { | 1339 | if (priv->tx_irq == -ENXIO) { |
1330 | dev_err(&pdev->dev, "cannot obtain Tx IRQ\n"); | 1340 | dev_err(&pdev->dev, "cannot obtain Tx IRQ\n"); |
1331 | ret = -ENXIO; | 1341 | ret = -ENXIO; |
1332 | goto out_free; | 1342 | goto err_free_netdev; |
1333 | } | 1343 | } |
1334 | 1344 | ||
1335 | /* get FIFO depths from device tree */ | 1345 | /* get FIFO depths from device tree */ |
@@ -1337,14 +1347,14 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1337 | &priv->rx_fifo_depth)) { | 1347 | &priv->rx_fifo_depth)) { |
1338 | dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n"); | 1348 | dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n"); |
1339 | ret = -ENXIO; | 1349 | ret = -ENXIO; |
1340 | goto out_free; | 1350 | goto err_free_netdev; |
1341 | } | 1351 | } |
1342 | 1352 | ||
1343 | if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth", | 1353 | if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth", |
1344 | &priv->rx_fifo_depth)) { | 1354 | &priv->rx_fifo_depth)) { |
1345 | dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n"); | 1355 | dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n"); |
1346 | ret = -ENXIO; | 1356 | ret = -ENXIO; |
1347 | goto out_free; | 1357 | goto err_free_netdev; |
1348 | } | 1358 | } |
1349 | 1359 | ||
1350 | /* get hash filter settings for this instance */ | 1360 | /* get hash filter settings for this instance */ |
@@ -1393,7 +1403,7 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1393 | ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) { | 1403 | ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) { |
1394 | dev_err(&pdev->dev, "invalid phy-addr specified %d\n", | 1404 | dev_err(&pdev->dev, "invalid phy-addr specified %d\n", |
1395 | priv->phy_addr); | 1405 | priv->phy_addr); |
1396 | goto out_free; | 1406 | goto err_free_netdev; |
1397 | } | 1407 | } |
1398 | 1408 | ||
1399 | /* Create/attach to MDIO bus */ | 1409 | /* Create/attach to MDIO bus */ |
@@ -1401,7 +1411,7 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1401 | atomic_add_return(1, &instance_count)); | 1411 | atomic_add_return(1, &instance_count)); |
1402 | 1412 | ||
1403 | if (ret) | 1413 | if (ret) |
1404 | goto out_free; | 1414 | goto err_free_netdev; |
1405 | 1415 | ||
1406 | /* initialize netdev */ | 1416 | /* initialize netdev */ |
1407 | ether_setup(ndev); | 1417 | ether_setup(ndev); |
@@ -1438,7 +1448,7 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1438 | ret = register_netdev(ndev); | 1448 | ret = register_netdev(ndev); |
1439 | if (ret) { | 1449 | if (ret) { |
1440 | dev_err(&pdev->dev, "failed to register TSE net device\n"); | 1450 | dev_err(&pdev->dev, "failed to register TSE net device\n"); |
1441 | goto out_free_mdio; | 1451 | goto err_register_netdev; |
1442 | } | 1452 | } |
1443 | 1453 | ||
1444 | platform_set_drvdata(pdev, ndev); | 1454 | platform_set_drvdata(pdev, ndev); |
@@ -1455,13 +1465,16 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1455 | ret = init_phy(ndev); | 1465 | ret = init_phy(ndev); |
1456 | if (ret != 0) { | 1466 | if (ret != 0) { |
1457 | netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret); | 1467 | netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret); |
1458 | goto out_free_mdio; | 1468 | goto err_init_phy; |
1459 | } | 1469 | } |
1460 | return 0; | 1470 | return 0; |
1461 | 1471 | ||
1462 | out_free_mdio: | 1472 | err_init_phy: |
1473 | unregister_netdev(ndev); | ||
1474 | err_register_netdev: | ||
1475 | netif_napi_del(&priv->napi); | ||
1463 | altera_tse_mdio_destroy(ndev); | 1476 | altera_tse_mdio_destroy(ndev); |
1464 | out_free: | 1477 | err_free_netdev: |
1465 | free_netdev(ndev); | 1478 | free_netdev(ndev); |
1466 | return ret; | 1479 | return ret; |
1467 | } | 1480 | } |
@@ -1496,6 +1509,7 @@ struct altera_dmaops altera_dtype_sgdma = { | |||
1496 | .get_rx_status = sgdma_rx_status, | 1509 | .get_rx_status = sgdma_rx_status, |
1497 | .init_dma = sgdma_initialize, | 1510 | .init_dma = sgdma_initialize, |
1498 | .uninit_dma = sgdma_uninitialize, | 1511 | .uninit_dma = sgdma_uninitialize, |
1512 | .start_rxdma = sgdma_start_rxdma, | ||
1499 | }; | 1513 | }; |
1500 | 1514 | ||
1501 | struct altera_dmaops altera_dtype_msgdma = { | 1515 | struct altera_dmaops altera_dtype_msgdma = { |
@@ -1514,6 +1528,7 @@ struct altera_dmaops altera_dtype_msgdma = { | |||
1514 | .get_rx_status = msgdma_rx_status, | 1528 | .get_rx_status = msgdma_rx_status, |
1515 | .init_dma = msgdma_initialize, | 1529 | .init_dma = msgdma_initialize, |
1516 | .uninit_dma = msgdma_uninitialize, | 1530 | .uninit_dma = msgdma_uninitialize, |
1531 | .start_rxdma = msgdma_start_rxdma, | ||
1517 | }; | 1532 | }; |
1518 | 1533 | ||
1519 | static struct of_device_id altera_tse_ids[] = { | 1534 | static struct of_device_id altera_tse_ids[] = { |
diff --git a/drivers/net/ethernet/arc/emac.h b/drivers/net/ethernet/arc/emac.h index 928fac6dd10a..53f85bf71526 100644 --- a/drivers/net/ethernet/arc/emac.h +++ b/drivers/net/ethernet/arc/emac.h | |||
@@ -11,6 +11,7 @@ | |||
11 | #include <linux/dma-mapping.h> | 11 | #include <linux/dma-mapping.h> |
12 | #include <linux/netdevice.h> | 12 | #include <linux/netdevice.h> |
13 | #include <linux/phy.h> | 13 | #include <linux/phy.h> |
14 | #include <linux/clk.h> | ||
14 | 15 | ||
15 | /* STATUS and ENABLE Register bit masks */ | 16 | /* STATUS and ENABLE Register bit masks */ |
16 | #define TXINT_MASK (1<<0) /* Transmit interrupt */ | 17 | #define TXINT_MASK (1<<0) /* Transmit interrupt */ |
@@ -131,6 +132,7 @@ struct arc_emac_priv { | |||
131 | struct mii_bus *bus; | 132 | struct mii_bus *bus; |
132 | 133 | ||
133 | void __iomem *regs; | 134 | void __iomem *regs; |
135 | struct clk *clk; | ||
134 | 136 | ||
135 | struct napi_struct napi; | 137 | struct napi_struct napi; |
136 | struct net_device_stats stats; | 138 | struct net_device_stats stats; |
diff --git a/drivers/net/ethernet/arc/emac_main.c b/drivers/net/ethernet/arc/emac_main.c index eeecc29cf5b7..d647a7d115ac 100644 --- a/drivers/net/ethernet/arc/emac_main.c +++ b/drivers/net/ethernet/arc/emac_main.c | |||
@@ -574,6 +574,18 @@ static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev) | |||
574 | return NETDEV_TX_OK; | 574 | return NETDEV_TX_OK; |
575 | } | 575 | } |
576 | 576 | ||
577 | static void arc_emac_set_address_internal(struct net_device *ndev) | ||
578 | { | ||
579 | struct arc_emac_priv *priv = netdev_priv(ndev); | ||
580 | unsigned int addr_low, addr_hi; | ||
581 | |||
582 | addr_low = le32_to_cpu(*(__le32 *) &ndev->dev_addr[0]); | ||
583 | addr_hi = le16_to_cpu(*(__le16 *) &ndev->dev_addr[4]); | ||
584 | |||
585 | arc_reg_set(priv, R_ADDRL, addr_low); | ||
586 | arc_reg_set(priv, R_ADDRH, addr_hi); | ||
587 | } | ||
588 | |||
577 | /** | 589 | /** |
578 | * arc_emac_set_address - Set the MAC address for this device. | 590 | * arc_emac_set_address - Set the MAC address for this device. |
579 | * @ndev: Pointer to net_device structure. | 591 | * @ndev: Pointer to net_device structure. |
@@ -587,9 +599,7 @@ static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev) | |||
587 | */ | 599 | */ |
588 | static int arc_emac_set_address(struct net_device *ndev, void *p) | 600 | static int arc_emac_set_address(struct net_device *ndev, void *p) |
589 | { | 601 | { |
590 | struct arc_emac_priv *priv = netdev_priv(ndev); | ||
591 | struct sockaddr *addr = p; | 602 | struct sockaddr *addr = p; |
592 | unsigned int addr_low, addr_hi; | ||
593 | 603 | ||
594 | if (netif_running(ndev)) | 604 | if (netif_running(ndev)) |
595 | return -EBUSY; | 605 | return -EBUSY; |
@@ -599,11 +609,7 @@ static int arc_emac_set_address(struct net_device *ndev, void *p) | |||
599 | 609 | ||
600 | memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); | 610 | memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); |
601 | 611 | ||
602 | addr_low = le32_to_cpu(*(__le32 *) &ndev->dev_addr[0]); | 612 | arc_emac_set_address_internal(ndev); |
603 | addr_hi = le16_to_cpu(*(__le16 *) &ndev->dev_addr[4]); | ||
604 | |||
605 | arc_reg_set(priv, R_ADDRL, addr_low); | ||
606 | arc_reg_set(priv, R_ADDRH, addr_hi); | ||
607 | 613 | ||
608 | return 0; | 614 | return 0; |
609 | } | 615 | } |
@@ -643,13 +649,6 @@ static int arc_emac_probe(struct platform_device *pdev) | |||
643 | return -ENODEV; | 649 | return -ENODEV; |
644 | } | 650 | } |
645 | 651 | ||
646 | /* Get CPU clock frequency from device tree */ | ||
647 | if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", | ||
648 | &clock_frequency)) { | ||
649 | dev_err(&pdev->dev, "failed to retrieve <clock-frequency> from device tree\n"); | ||
650 | return -EINVAL; | ||
651 | } | ||
652 | |||
653 | /* Get IRQ from device tree */ | 652 | /* Get IRQ from device tree */ |
654 | irq = irq_of_parse_and_map(pdev->dev.of_node, 0); | 653 | irq = irq_of_parse_and_map(pdev->dev.of_node, 0); |
655 | if (!irq) { | 654 | if (!irq) { |
@@ -677,17 +676,36 @@ static int arc_emac_probe(struct platform_device *pdev) | |||
677 | priv->regs = devm_ioremap_resource(&pdev->dev, &res_regs); | 676 | priv->regs = devm_ioremap_resource(&pdev->dev, &res_regs); |
678 | if (IS_ERR(priv->regs)) { | 677 | if (IS_ERR(priv->regs)) { |
679 | err = PTR_ERR(priv->regs); | 678 | err = PTR_ERR(priv->regs); |
680 | goto out; | 679 | goto out_netdev; |
681 | } | 680 | } |
682 | dev_dbg(&pdev->dev, "Registers base address is 0x%p\n", priv->regs); | 681 | dev_dbg(&pdev->dev, "Registers base address is 0x%p\n", priv->regs); |
683 | 682 | ||
683 | priv->clk = of_clk_get(pdev->dev.of_node, 0); | ||
684 | if (IS_ERR(priv->clk)) { | ||
685 | /* Get CPU clock frequency from device tree */ | ||
686 | if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", | ||
687 | &clock_frequency)) { | ||
688 | dev_err(&pdev->dev, "failed to retrieve <clock-frequency> from device tree\n"); | ||
689 | err = -EINVAL; | ||
690 | goto out_netdev; | ||
691 | } | ||
692 | } else { | ||
693 | err = clk_prepare_enable(priv->clk); | ||
694 | if (err) { | ||
695 | dev_err(&pdev->dev, "failed to enable clock\n"); | ||
696 | goto out_clkget; | ||
697 | } | ||
698 | |||
699 | clock_frequency = clk_get_rate(priv->clk); | ||
700 | } | ||
701 | |||
684 | id = arc_reg_get(priv, R_ID); | 702 | id = arc_reg_get(priv, R_ID); |
685 | 703 | ||
686 | /* Check for EMAC revision 5 or 7, magic number */ | 704 | /* Check for EMAC revision 5 or 7, magic number */ |
687 | if (!(id == 0x0005fd02 || id == 0x0007fd02)) { | 705 | if (!(id == 0x0005fd02 || id == 0x0007fd02)) { |
688 | dev_err(&pdev->dev, "ARC EMAC not detected, id=0x%x\n", id); | 706 | dev_err(&pdev->dev, "ARC EMAC not detected, id=0x%x\n", id); |
689 | err = -ENODEV; | 707 | err = -ENODEV; |
690 | goto out; | 708 | goto out_clken; |
691 | } | 709 | } |
692 | dev_info(&pdev->dev, "ARC EMAC detected with id: 0x%x\n", id); | 710 | dev_info(&pdev->dev, "ARC EMAC detected with id: 0x%x\n", id); |
693 | 711 | ||
@@ -702,7 +720,7 @@ static int arc_emac_probe(struct platform_device *pdev) | |||
702 | ndev->name, ndev); | 720 | ndev->name, ndev); |
703 | if (err) { | 721 | if (err) { |
704 | dev_err(&pdev->dev, "could not allocate IRQ\n"); | 722 | dev_err(&pdev->dev, "could not allocate IRQ\n"); |
705 | goto out; | 723 | goto out_clken; |
706 | } | 724 | } |
707 | 725 | ||
708 | /* Get MAC address from device tree */ | 726 | /* Get MAC address from device tree */ |
@@ -713,6 +731,7 @@ static int arc_emac_probe(struct platform_device *pdev) | |||
713 | else | 731 | else |
714 | eth_hw_addr_random(ndev); | 732 | eth_hw_addr_random(ndev); |
715 | 733 | ||
734 | arc_emac_set_address_internal(ndev); | ||
716 | dev_info(&pdev->dev, "MAC address is now %pM\n", ndev->dev_addr); | 735 | dev_info(&pdev->dev, "MAC address is now %pM\n", ndev->dev_addr); |
717 | 736 | ||
718 | /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */ | 737 | /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */ |
@@ -722,7 +741,7 @@ static int arc_emac_probe(struct platform_device *pdev) | |||
722 | if (!priv->rxbd) { | 741 | if (!priv->rxbd) { |
723 | dev_err(&pdev->dev, "failed to allocate data buffers\n"); | 742 | dev_err(&pdev->dev, "failed to allocate data buffers\n"); |
724 | err = -ENOMEM; | 743 | err = -ENOMEM; |
725 | goto out; | 744 | goto out_clken; |
726 | } | 745 | } |
727 | 746 | ||
728 | priv->txbd = priv->rxbd + RX_BD_NUM; | 747 | priv->txbd = priv->rxbd + RX_BD_NUM; |
@@ -734,7 +753,7 @@ static int arc_emac_probe(struct platform_device *pdev) | |||
734 | err = arc_mdio_probe(pdev, priv); | 753 | err = arc_mdio_probe(pdev, priv); |
735 | if (err) { | 754 | if (err) { |
736 | dev_err(&pdev->dev, "failed to probe MII bus\n"); | 755 | dev_err(&pdev->dev, "failed to probe MII bus\n"); |
737 | goto out; | 756 | goto out_clken; |
738 | } | 757 | } |
739 | 758 | ||
740 | priv->phy_dev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0, | 759 | priv->phy_dev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0, |
@@ -742,7 +761,7 @@ static int arc_emac_probe(struct platform_device *pdev) | |||
742 | if (!priv->phy_dev) { | 761 | if (!priv->phy_dev) { |
743 | dev_err(&pdev->dev, "of_phy_connect() failed\n"); | 762 | dev_err(&pdev->dev, "of_phy_connect() failed\n"); |
744 | err = -ENODEV; | 763 | err = -ENODEV; |
745 | goto out; | 764 | goto out_mdio; |
746 | } | 765 | } |
747 | 766 | ||
748 | dev_info(&pdev->dev, "connected to %s phy with id 0x%x\n", | 767 | dev_info(&pdev->dev, "connected to %s phy with id 0x%x\n", |
@@ -752,14 +771,25 @@ static int arc_emac_probe(struct platform_device *pdev) | |||
752 | 771 | ||
753 | err = register_netdev(ndev); | 772 | err = register_netdev(ndev); |
754 | if (err) { | 773 | if (err) { |
755 | netif_napi_del(&priv->napi); | ||
756 | dev_err(&pdev->dev, "failed to register network device\n"); | 774 | dev_err(&pdev->dev, "failed to register network device\n"); |
757 | goto out; | 775 | goto out_netif_api; |
758 | } | 776 | } |
759 | 777 | ||
760 | return 0; | 778 | return 0; |
761 | 779 | ||
762 | out: | 780 | out_netif_api: |
781 | netif_napi_del(&priv->napi); | ||
782 | phy_disconnect(priv->phy_dev); | ||
783 | priv->phy_dev = NULL; | ||
784 | out_mdio: | ||
785 | arc_mdio_remove(priv); | ||
786 | out_clken: | ||
787 | if (!IS_ERR(priv->clk)) | ||
788 | clk_disable_unprepare(priv->clk); | ||
789 | out_clkget: | ||
790 | if (!IS_ERR(priv->clk)) | ||
791 | clk_put(priv->clk); | ||
792 | out_netdev: | ||
763 | free_netdev(ndev); | 793 | free_netdev(ndev); |
764 | return err; | 794 | return err; |
765 | } | 795 | } |
@@ -774,6 +804,12 @@ static int arc_emac_remove(struct platform_device *pdev) | |||
774 | arc_mdio_remove(priv); | 804 | arc_mdio_remove(priv); |
775 | unregister_netdev(ndev); | 805 | unregister_netdev(ndev); |
776 | netif_napi_del(&priv->napi); | 806 | netif_napi_del(&priv->napi); |
807 | |||
808 | if (!IS_ERR(priv->clk)) { | ||
809 | clk_disable_unprepare(priv->clk); | ||
810 | clk_put(priv->clk); | ||
811 | } | ||
812 | |||
777 | free_netdev(ndev); | 813 | free_netdev(ndev); |
778 | 814 | ||
779 | return 0; | 815 | return 0; |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c index a78edaccceee..b260913db236 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | |||
@@ -13233,6 +13233,8 @@ static void __bnx2x_remove(struct pci_dev *pdev, | |||
13233 | iounmap(bp->doorbells); | 13233 | iounmap(bp->doorbells); |
13234 | 13234 | ||
13235 | bnx2x_release_firmware(bp); | 13235 | bnx2x_release_firmware(bp); |
13236 | } else { | ||
13237 | bnx2x_vf_pci_dealloc(bp); | ||
13236 | } | 13238 | } |
13237 | bnx2x_free_mem_bp(bp); | 13239 | bnx2x_free_mem_bp(bp); |
13238 | 13240 | ||
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c index 5c523b32db70..81cc2d9831c2 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c | |||
@@ -427,7 +427,9 @@ static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp, | |||
427 | if (filter->add && filter->type == BNX2X_VF_FILTER_VLAN && | 427 | if (filter->add && filter->type == BNX2X_VF_FILTER_VLAN && |
428 | (atomic_read(&bnx2x_vfq(vf, qid, vlan_count)) >= | 428 | (atomic_read(&bnx2x_vfq(vf, qid, vlan_count)) >= |
429 | vf_vlan_rules_cnt(vf))) { | 429 | vf_vlan_rules_cnt(vf))) { |
430 | BNX2X_ERR("No credits for vlan\n"); | 430 | BNX2X_ERR("No credits for vlan [%d >= %d]\n", |
431 | atomic_read(&bnx2x_vfq(vf, qid, vlan_count)), | ||
432 | vf_vlan_rules_cnt(vf)); | ||
431 | return -ENOMEM; | 433 | return -ENOMEM; |
432 | } | 434 | } |
433 | 435 | ||
@@ -610,6 +612,7 @@ int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf, | |||
610 | } | 612 | } |
611 | 613 | ||
612 | /* add new mcasts */ | 614 | /* add new mcasts */ |
615 | mcast.mcast_list_len = mc_num; | ||
613 | rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_ADD); | 616 | rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_ADD); |
614 | if (rc) | 617 | if (rc) |
615 | BNX2X_ERR("Faled to add multicasts\n"); | 618 | BNX2X_ERR("Faled to add multicasts\n"); |
@@ -837,6 +840,29 @@ int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid) | |||
837 | return 0; | 840 | return 0; |
838 | } | 841 | } |
839 | 842 | ||
843 | static void bnx2x_iov_re_set_vlan_filters(struct bnx2x *bp, | ||
844 | struct bnx2x_virtf *vf, | ||
845 | int new) | ||
846 | { | ||
847 | int num = vf_vlan_rules_cnt(vf); | ||
848 | int diff = new - num; | ||
849 | bool rc = true; | ||
850 | |||
851 | DP(BNX2X_MSG_IOV, "vf[%d] - %d vlan filter credits [previously %d]\n", | ||
852 | vf->abs_vfid, new, num); | ||
853 | |||
854 | if (diff > 0) | ||
855 | rc = bp->vlans_pool.get(&bp->vlans_pool, diff); | ||
856 | else if (diff < 0) | ||
857 | rc = bp->vlans_pool.put(&bp->vlans_pool, -diff); | ||
858 | |||
859 | if (rc) | ||
860 | vf_vlan_rules_cnt(vf) = new; | ||
861 | else | ||
862 | DP(BNX2X_MSG_IOV, "vf[%d] - Failed to configure vlan filter credits change\n", | ||
863 | vf->abs_vfid); | ||
864 | } | ||
865 | |||
840 | /* must be called after the number of PF queues and the number of VFs are | 866 | /* must be called after the number of PF queues and the number of VFs are |
841 | * both known | 867 | * both known |
842 | */ | 868 | */ |
@@ -854,9 +880,11 @@ bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf) | |||
854 | resc->num_mac_filters = 1; | 880 | resc->num_mac_filters = 1; |
855 | 881 | ||
856 | /* divvy up vlan rules */ | 882 | /* divvy up vlan rules */ |
883 | bnx2x_iov_re_set_vlan_filters(bp, vf, 0); | ||
857 | vlan_count = bp->vlans_pool.check(&bp->vlans_pool); | 884 | vlan_count = bp->vlans_pool.check(&bp->vlans_pool); |
858 | vlan_count = 1 << ilog2(vlan_count); | 885 | vlan_count = 1 << ilog2(vlan_count); |
859 | resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp); | 886 | bnx2x_iov_re_set_vlan_filters(bp, vf, |
887 | vlan_count / BNX2X_NR_VIRTFN(bp)); | ||
860 | 888 | ||
861 | /* no real limitation */ | 889 | /* no real limitation */ |
862 | resc->num_mc_filters = 0; | 890 | resc->num_mc_filters = 0; |
@@ -1478,10 +1506,6 @@ int bnx2x_iov_nic_init(struct bnx2x *bp) | |||
1478 | bnx2x_iov_static_resc(bp, vf); | 1506 | bnx2x_iov_static_resc(bp, vf); |
1479 | 1507 | ||
1480 | /* queues are initialized during VF-ACQUIRE */ | 1508 | /* queues are initialized during VF-ACQUIRE */ |
1481 | |||
1482 | /* reserve the vf vlan credit */ | ||
1483 | bp->vlans_pool.get(&bp->vlans_pool, vf_vlan_rules_cnt(vf)); | ||
1484 | |||
1485 | vf->filter_state = 0; | 1509 | vf->filter_state = 0; |
1486 | vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id); | 1510 | vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id); |
1487 | 1511 | ||
@@ -1912,11 +1936,12 @@ int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf, | |||
1912 | u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf); | 1936 | u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf); |
1913 | u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf); | 1937 | u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf); |
1914 | 1938 | ||
1939 | /* Save a vlan filter for the Hypervisor */ | ||
1915 | return ((req_resc->num_rxqs <= rxq_cnt) && | 1940 | return ((req_resc->num_rxqs <= rxq_cnt) && |
1916 | (req_resc->num_txqs <= txq_cnt) && | 1941 | (req_resc->num_txqs <= txq_cnt) && |
1917 | (req_resc->num_sbs <= vf_sb_count(vf)) && | 1942 | (req_resc->num_sbs <= vf_sb_count(vf)) && |
1918 | (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) && | 1943 | (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) && |
1919 | (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf))); | 1944 | (req_resc->num_vlan_filters <= vf_vlan_rules_visible_cnt(vf))); |
1920 | } | 1945 | } |
1921 | 1946 | ||
1922 | /* CORE VF API */ | 1947 | /* CORE VF API */ |
@@ -1972,14 +1997,14 @@ int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf, | |||
1972 | vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf); | 1997 | vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf); |
1973 | if (resc->num_mac_filters) | 1998 | if (resc->num_mac_filters) |
1974 | vf_mac_rules_cnt(vf) = resc->num_mac_filters; | 1999 | vf_mac_rules_cnt(vf) = resc->num_mac_filters; |
1975 | if (resc->num_vlan_filters) | 2000 | /* Add an additional vlan filter credit for the hypervisor */ |
1976 | vf_vlan_rules_cnt(vf) = resc->num_vlan_filters; | 2001 | bnx2x_iov_re_set_vlan_filters(bp, vf, resc->num_vlan_filters + 1); |
1977 | 2002 | ||
1978 | DP(BNX2X_MSG_IOV, | 2003 | DP(BNX2X_MSG_IOV, |
1979 | "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n", | 2004 | "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n", |
1980 | vf_sb_count(vf), vf_rxq_count(vf), | 2005 | vf_sb_count(vf), vf_rxq_count(vf), |
1981 | vf_txq_count(vf), vf_mac_rules_cnt(vf), | 2006 | vf_txq_count(vf), vf_mac_rules_cnt(vf), |
1982 | vf_vlan_rules_cnt(vf)); | 2007 | vf_vlan_rules_visible_cnt(vf)); |
1983 | 2008 | ||
1984 | /* Initialize the queues */ | 2009 | /* Initialize the queues */ |
1985 | if (!vf->vfqs) { | 2010 | if (!vf->vfqs) { |
@@ -2896,6 +2921,14 @@ void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp) | |||
2896 | return bp->regview + PXP_VF_ADDR_DB_START; | 2921 | return bp->regview + PXP_VF_ADDR_DB_START; |
2897 | } | 2922 | } |
2898 | 2923 | ||
2924 | void bnx2x_vf_pci_dealloc(struct bnx2x *bp) | ||
2925 | { | ||
2926 | BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping, | ||
2927 | sizeof(struct bnx2x_vf_mbx_msg)); | ||
2928 | BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping, | ||
2929 | sizeof(union pf_vf_bulletin)); | ||
2930 | } | ||
2931 | |||
2899 | int bnx2x_vf_pci_alloc(struct bnx2x *bp) | 2932 | int bnx2x_vf_pci_alloc(struct bnx2x *bp) |
2900 | { | 2933 | { |
2901 | mutex_init(&bp->vf2pf_mutex); | 2934 | mutex_init(&bp->vf2pf_mutex); |
@@ -2915,10 +2948,7 @@ int bnx2x_vf_pci_alloc(struct bnx2x *bp) | |||
2915 | return 0; | 2948 | return 0; |
2916 | 2949 | ||
2917 | alloc_mem_err: | 2950 | alloc_mem_err: |
2918 | BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping, | 2951 | bnx2x_vf_pci_dealloc(bp); |
2919 | sizeof(struct bnx2x_vf_mbx_msg)); | ||
2920 | BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping, | ||
2921 | sizeof(union pf_vf_bulletin)); | ||
2922 | return -ENOMEM; | 2952 | return -ENOMEM; |
2923 | } | 2953 | } |
2924 | 2954 | ||
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h index 8bf764570eef..6929adba52f9 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h | |||
@@ -159,6 +159,8 @@ struct bnx2x_virtf { | |||
159 | #define vf_mac_rules_cnt(vf) ((vf)->alloc_resc.num_mac_filters) | 159 | #define vf_mac_rules_cnt(vf) ((vf)->alloc_resc.num_mac_filters) |
160 | #define vf_vlan_rules_cnt(vf) ((vf)->alloc_resc.num_vlan_filters) | 160 | #define vf_vlan_rules_cnt(vf) ((vf)->alloc_resc.num_vlan_filters) |
161 | #define vf_mc_rules_cnt(vf) ((vf)->alloc_resc.num_mc_filters) | 161 | #define vf_mc_rules_cnt(vf) ((vf)->alloc_resc.num_mc_filters) |
162 | /* Hide a single vlan filter credit for the hypervisor */ | ||
163 | #define vf_vlan_rules_visible_cnt(vf) (vf_vlan_rules_cnt(vf) - 1) | ||
162 | 164 | ||
163 | u8 sb_count; /* actual number of SBs */ | 165 | u8 sb_count; /* actual number of SBs */ |
164 | u8 igu_base_id; /* base igu status block id */ | 166 | u8 igu_base_id; /* base igu status block id */ |
@@ -502,6 +504,7 @@ static inline int bnx2x_vf_ustorm_prods_offset(struct bnx2x *bp, | |||
502 | enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp); | 504 | enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp); |
503 | void bnx2x_timer_sriov(struct bnx2x *bp); | 505 | void bnx2x_timer_sriov(struct bnx2x *bp); |
504 | void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp); | 506 | void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp); |
507 | void bnx2x_vf_pci_dealloc(struct bnx2x *bp); | ||
505 | int bnx2x_vf_pci_alloc(struct bnx2x *bp); | 508 | int bnx2x_vf_pci_alloc(struct bnx2x *bp); |
506 | int bnx2x_enable_sriov(struct bnx2x *bp); | 509 | int bnx2x_enable_sriov(struct bnx2x *bp); |
507 | void bnx2x_disable_sriov(struct bnx2x *bp); | 510 | void bnx2x_disable_sriov(struct bnx2x *bp); |
@@ -568,6 +571,7 @@ static inline void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp) | |||
568 | return NULL; | 571 | return NULL; |
569 | } | 572 | } |
570 | 573 | ||
574 | static inline void bnx2x_vf_pci_dealloc(struct bnx2 *bp) {return 0; } | ||
571 | static inline int bnx2x_vf_pci_alloc(struct bnx2x *bp) {return 0; } | 575 | static inline int bnx2x_vf_pci_alloc(struct bnx2x *bp) {return 0; } |
572 | static inline void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp) {} | 576 | static inline void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp) {} |
573 | static inline int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs) {return 0; } | 577 | static inline int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs) {return 0; } |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c index 0622884596b2..0c067e8564dd 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c | |||
@@ -1163,7 +1163,7 @@ static void bnx2x_vf_mbx_acquire_resp(struct bnx2x *bp, struct bnx2x_virtf *vf, | |||
1163 | bnx2x_vf_max_queue_cnt(bp, vf); | 1163 | bnx2x_vf_max_queue_cnt(bp, vf); |
1164 | resc->num_sbs = vf_sb_count(vf); | 1164 | resc->num_sbs = vf_sb_count(vf); |
1165 | resc->num_mac_filters = vf_mac_rules_cnt(vf); | 1165 | resc->num_mac_filters = vf_mac_rules_cnt(vf); |
1166 | resc->num_vlan_filters = vf_vlan_rules_cnt(vf); | 1166 | resc->num_vlan_filters = vf_vlan_rules_visible_cnt(vf); |
1167 | resc->num_mc_filters = 0; | 1167 | resc->num_mc_filters = 0; |
1168 | 1168 | ||
1169 | if (status == PFVF_STATUS_SUCCESS) { | 1169 | if (status == PFVF_STATUS_SUCCESS) { |
diff --git a/drivers/net/ethernet/cadence/Kconfig b/drivers/net/ethernet/cadence/Kconfig index 7e49c43b7af3..9e089d24466e 100644 --- a/drivers/net/ethernet/cadence/Kconfig +++ b/drivers/net/ethernet/cadence/Kconfig | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | config NET_CADENCE | 5 | config NET_CADENCE |
6 | bool "Cadence devices" | 6 | bool "Cadence devices" |
7 | depends on HAS_IOMEM && (ARM || AVR32 || COMPILE_TEST) | 7 | depends on HAS_IOMEM && (ARM || AVR32 || MICROBLAZE || COMPILE_TEST) |
8 | default y | 8 | default y |
9 | ---help--- | 9 | ---help--- |
10 | If you have a network (Ethernet) card belonging to this class, say Y. | 10 | If you have a network (Ethernet) card belonging to this class, say Y. |
@@ -30,7 +30,7 @@ config ARM_AT91_ETHER | |||
30 | 30 | ||
31 | config MACB | 31 | config MACB |
32 | tristate "Cadence MACB/GEM support" | 32 | tristate "Cadence MACB/GEM support" |
33 | depends on HAS_DMA && (PLATFORM_AT32AP || ARCH_AT91 || ARCH_PICOXCELL || ARCH_ZYNQ || COMPILE_TEST) | 33 | depends on HAS_DMA && (PLATFORM_AT32AP || ARCH_AT91 || ARCH_PICOXCELL || ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST) |
34 | select PHYLIB | 34 | select PHYLIB |
35 | ---help--- | 35 | ---help--- |
36 | The Cadence MACB ethernet interface is found on many Atmel AT32 and | 36 | The Cadence MACB ethernet interface is found on many Atmel AT32 and |
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index ca97005e24b4..e9daa072ebb4 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c | |||
@@ -599,25 +599,16 @@ static void gem_rx_refill(struct macb *bp) | |||
599 | { | 599 | { |
600 | unsigned int entry; | 600 | unsigned int entry; |
601 | struct sk_buff *skb; | 601 | struct sk_buff *skb; |
602 | struct macb_dma_desc *desc; | ||
603 | dma_addr_t paddr; | 602 | dma_addr_t paddr; |
604 | 603 | ||
605 | while (CIRC_SPACE(bp->rx_prepared_head, bp->rx_tail, RX_RING_SIZE) > 0) { | 604 | while (CIRC_SPACE(bp->rx_prepared_head, bp->rx_tail, RX_RING_SIZE) > 0) { |
606 | u32 addr, ctrl; | ||
607 | |||
608 | entry = macb_rx_ring_wrap(bp->rx_prepared_head); | 605 | entry = macb_rx_ring_wrap(bp->rx_prepared_head); |
609 | desc = &bp->rx_ring[entry]; | ||
610 | 606 | ||
611 | /* Make hw descriptor updates visible to CPU */ | 607 | /* Make hw descriptor updates visible to CPU */ |
612 | rmb(); | 608 | rmb(); |
613 | 609 | ||
614 | addr = desc->addr; | ||
615 | ctrl = desc->ctrl; | ||
616 | bp->rx_prepared_head++; | 610 | bp->rx_prepared_head++; |
617 | 611 | ||
618 | if ((addr & MACB_BIT(RX_USED))) | ||
619 | continue; | ||
620 | |||
621 | if (bp->rx_skbuff[entry] == NULL) { | 612 | if (bp->rx_skbuff[entry] == NULL) { |
622 | /* allocate sk_buff for this free entry in ring */ | 613 | /* allocate sk_buff for this free entry in ring */ |
623 | skb = netdev_alloc_skb(bp->dev, bp->rx_buffer_size); | 614 | skb = netdev_alloc_skb(bp->dev, bp->rx_buffer_size); |
@@ -698,7 +689,6 @@ static int gem_rx(struct macb *bp, int budget) | |||
698 | if (!(addr & MACB_BIT(RX_USED))) | 689 | if (!(addr & MACB_BIT(RX_USED))) |
699 | break; | 690 | break; |
700 | 691 | ||
701 | desc->addr &= ~MACB_BIT(RX_USED); | ||
702 | bp->rx_tail++; | 692 | bp->rx_tail++; |
703 | count++; | 693 | count++; |
704 | 694 | ||
@@ -891,16 +881,15 @@ static int macb_poll(struct napi_struct *napi, int budget) | |||
891 | if (work_done < budget) { | 881 | if (work_done < budget) { |
892 | napi_complete(napi); | 882 | napi_complete(napi); |
893 | 883 | ||
894 | /* | ||
895 | * We've done what we can to clean the buffers. Make sure we | ||
896 | * get notified when new packets arrive. | ||
897 | */ | ||
898 | macb_writel(bp, IER, MACB_RX_INT_FLAGS); | ||
899 | |||
900 | /* Packets received while interrupts were disabled */ | 884 | /* Packets received while interrupts were disabled */ |
901 | status = macb_readl(bp, RSR); | 885 | status = macb_readl(bp, RSR); |
902 | if (unlikely(status)) | 886 | if (status) { |
887 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) | ||
888 | macb_writel(bp, ISR, MACB_BIT(RCOMP)); | ||
903 | napi_reschedule(napi); | 889 | napi_reschedule(napi); |
890 | } else { | ||
891 | macb_writel(bp, IER, MACB_RX_INT_FLAGS); | ||
892 | } | ||
904 | } | 893 | } |
905 | 894 | ||
906 | /* TODO: Handle errors */ | 895 | /* TODO: Handle errors */ |
@@ -951,6 +940,10 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) | |||
951 | if (unlikely(status & (MACB_TX_ERR_FLAGS))) { | 940 | if (unlikely(status & (MACB_TX_ERR_FLAGS))) { |
952 | macb_writel(bp, IDR, MACB_TX_INT_FLAGS); | 941 | macb_writel(bp, IDR, MACB_TX_INT_FLAGS); |
953 | schedule_work(&bp->tx_error_task); | 942 | schedule_work(&bp->tx_error_task); |
943 | |||
944 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) | ||
945 | macb_writel(bp, ISR, MACB_TX_ERR_FLAGS); | ||
946 | |||
954 | break; | 947 | break; |
955 | } | 948 | } |
956 | 949 | ||
@@ -968,6 +961,9 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) | |||
968 | bp->hw_stats.gem.rx_overruns++; | 961 | bp->hw_stats.gem.rx_overruns++; |
969 | else | 962 | else |
970 | bp->hw_stats.macb.rx_overruns++; | 963 | bp->hw_stats.macb.rx_overruns++; |
964 | |||
965 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) | ||
966 | macb_writel(bp, ISR, MACB_BIT(ISR_ROVR)); | ||
971 | } | 967 | } |
972 | 968 | ||
973 | if (status & MACB_BIT(HRESP)) { | 969 | if (status & MACB_BIT(HRESP)) { |
@@ -977,6 +973,9 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) | |||
977 | * (work queue?) | 973 | * (work queue?) |
978 | */ | 974 | */ |
979 | netdev_err(dev, "DMA bus error: HRESP not OK\n"); | 975 | netdev_err(dev, "DMA bus error: HRESP not OK\n"); |
976 | |||
977 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) | ||
978 | macb_writel(bp, ISR, MACB_BIT(HRESP)); | ||
980 | } | 979 | } |
981 | 980 | ||
982 | status = macb_readl(bp, ISR); | 981 | status = macb_readl(bp, ISR); |
@@ -1113,7 +1112,7 @@ static void gem_free_rx_buffers(struct macb *bp) | |||
1113 | 1112 | ||
1114 | desc = &bp->rx_ring[i]; | 1113 | desc = &bp->rx_ring[i]; |
1115 | addr = MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr)); | 1114 | addr = MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr)); |
1116 | dma_unmap_single(&bp->pdev->dev, addr, skb->len, | 1115 | dma_unmap_single(&bp->pdev->dev, addr, bp->rx_buffer_size, |
1117 | DMA_FROM_DEVICE); | 1116 | DMA_FROM_DEVICE); |
1118 | dev_kfree_skb_any(skb); | 1117 | dev_kfree_skb_any(skb); |
1119 | skb = NULL; | 1118 | skb = NULL; |
diff --git a/drivers/net/ethernet/chelsio/Kconfig b/drivers/net/ethernet/chelsio/Kconfig index d40c994a4f6a..570222c33410 100644 --- a/drivers/net/ethernet/chelsio/Kconfig +++ b/drivers/net/ethernet/chelsio/Kconfig | |||
@@ -67,13 +67,13 @@ config CHELSIO_T3 | |||
67 | will be called cxgb3. | 67 | will be called cxgb3. |
68 | 68 | ||
69 | config CHELSIO_T4 | 69 | config CHELSIO_T4 |
70 | tristate "Chelsio Communications T4 Ethernet support" | 70 | tristate "Chelsio Communications T4/T5 Ethernet support" |
71 | depends on PCI | 71 | depends on PCI |
72 | select FW_LOADER | 72 | select FW_LOADER |
73 | select MDIO | 73 | select MDIO |
74 | ---help--- | 74 | ---help--- |
75 | This driver supports Chelsio T4-based gigabit and 10Gb Ethernet | 75 | This driver supports Chelsio T4 and T5 based gigabit, 10Gb Ethernet |
76 | adapters. | 76 | adapter and T5 based 40Gb Ethernet adapter. |
77 | 77 | ||
78 | For general information about Chelsio and our products, visit | 78 | For general information about Chelsio and our products, visit |
79 | our website at <http://www.chelsio.com>. | 79 | our website at <http://www.chelsio.com>. |
@@ -87,11 +87,12 @@ config CHELSIO_T4 | |||
87 | will be called cxgb4. | 87 | will be called cxgb4. |
88 | 88 | ||
89 | config CHELSIO_T4VF | 89 | config CHELSIO_T4VF |
90 | tristate "Chelsio Communications T4 Virtual Function Ethernet support" | 90 | tristate "Chelsio Communications T4/T5 Virtual Function Ethernet support" |
91 | depends on PCI | 91 | depends on PCI |
92 | ---help--- | 92 | ---help--- |
93 | This driver supports Chelsio T4-based gigabit and 10Gb Ethernet | 93 | This driver supports Chelsio T4 and T5 based gigabit, 10Gb Ethernet |
94 | adapters with PCI-E SR-IOV Virtual Functions. | 94 | adapters and T5 based 40Gb Ethernet adapters with PCI-E SR-IOV Virtual |
95 | Functions. | ||
95 | 96 | ||
96 | For general information about Chelsio and our products, visit | 97 | For general information about Chelsio and our products, visit |
97 | our website at <http://www.chelsio.com>. | 98 | our website at <http://www.chelsio.com>. |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index 6fe58913403a..24e16e3301e0 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | |||
@@ -5870,6 +5870,8 @@ static void print_port_info(const struct net_device *dev) | |||
5870 | spd = " 2.5 GT/s"; | 5870 | spd = " 2.5 GT/s"; |
5871 | else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_5_0GB) | 5871 | else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_5_0GB) |
5872 | spd = " 5 GT/s"; | 5872 | spd = " 5 GT/s"; |
5873 | else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_8_0GB) | ||
5874 | spd = " 8 GT/s"; | ||
5873 | 5875 | ||
5874 | if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_100M) | 5876 | if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_100M) |
5875 | bufp += sprintf(bufp, "100/"); | 5877 | bufp += sprintf(bufp, "100/"); |
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index 9125d9abf099..e2d42475b006 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c | |||
@@ -121,6 +121,7 @@ static irqreturn_t gfar_error(int irq, void *dev_id); | |||
121 | static irqreturn_t gfar_transmit(int irq, void *dev_id); | 121 | static irqreturn_t gfar_transmit(int irq, void *dev_id); |
122 | static irqreturn_t gfar_interrupt(int irq, void *dev_id); | 122 | static irqreturn_t gfar_interrupt(int irq, void *dev_id); |
123 | static void adjust_link(struct net_device *dev); | 123 | static void adjust_link(struct net_device *dev); |
124 | static noinline void gfar_update_link_state(struct gfar_private *priv); | ||
124 | static int init_phy(struct net_device *dev); | 125 | static int init_phy(struct net_device *dev); |
125 | static int gfar_probe(struct platform_device *ofdev); | 126 | static int gfar_probe(struct platform_device *ofdev); |
126 | static int gfar_remove(struct platform_device *ofdev); | 127 | static int gfar_remove(struct platform_device *ofdev); |
@@ -3076,41 +3077,6 @@ static irqreturn_t gfar_interrupt(int irq, void *grp_id) | |||
3076 | return IRQ_HANDLED; | 3077 | return IRQ_HANDLED; |
3077 | } | 3078 | } |
3078 | 3079 | ||
3079 | static u32 gfar_get_flowctrl_cfg(struct gfar_private *priv) | ||
3080 | { | ||
3081 | struct phy_device *phydev = priv->phydev; | ||
3082 | u32 val = 0; | ||
3083 | |||
3084 | if (!phydev->duplex) | ||
3085 | return val; | ||
3086 | |||
3087 | if (!priv->pause_aneg_en) { | ||
3088 | if (priv->tx_pause_en) | ||
3089 | val |= MACCFG1_TX_FLOW; | ||
3090 | if (priv->rx_pause_en) | ||
3091 | val |= MACCFG1_RX_FLOW; | ||
3092 | } else { | ||
3093 | u16 lcl_adv, rmt_adv; | ||
3094 | u8 flowctrl; | ||
3095 | /* get link partner capabilities */ | ||
3096 | rmt_adv = 0; | ||
3097 | if (phydev->pause) | ||
3098 | rmt_adv = LPA_PAUSE_CAP; | ||
3099 | if (phydev->asym_pause) | ||
3100 | rmt_adv |= LPA_PAUSE_ASYM; | ||
3101 | |||
3102 | lcl_adv = mii_advertise_flowctrl(phydev->advertising); | ||
3103 | |||
3104 | flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv); | ||
3105 | if (flowctrl & FLOW_CTRL_TX) | ||
3106 | val |= MACCFG1_TX_FLOW; | ||
3107 | if (flowctrl & FLOW_CTRL_RX) | ||
3108 | val |= MACCFG1_RX_FLOW; | ||
3109 | } | ||
3110 | |||
3111 | return val; | ||
3112 | } | ||
3113 | |||
3114 | /* Called every time the controller might need to be made | 3080 | /* Called every time the controller might need to be made |
3115 | * aware of new link state. The PHY code conveys this | 3081 | * aware of new link state. The PHY code conveys this |
3116 | * information through variables in the phydev structure, and this | 3082 | * information through variables in the phydev structure, and this |
@@ -3120,83 +3086,12 @@ static u32 gfar_get_flowctrl_cfg(struct gfar_private *priv) | |||
3120 | static void adjust_link(struct net_device *dev) | 3086 | static void adjust_link(struct net_device *dev) |
3121 | { | 3087 | { |
3122 | struct gfar_private *priv = netdev_priv(dev); | 3088 | struct gfar_private *priv = netdev_priv(dev); |
3123 | struct gfar __iomem *regs = priv->gfargrp[0].regs; | ||
3124 | struct phy_device *phydev = priv->phydev; | 3089 | struct phy_device *phydev = priv->phydev; |
3125 | int new_state = 0; | ||
3126 | 3090 | ||
3127 | if (test_bit(GFAR_RESETTING, &priv->state)) | 3091 | if (unlikely(phydev->link != priv->oldlink || |
3128 | return; | 3092 | phydev->duplex != priv->oldduplex || |
3129 | 3093 | phydev->speed != priv->oldspeed)) | |
3130 | if (phydev->link) { | 3094 | gfar_update_link_state(priv); |
3131 | u32 tempval1 = gfar_read(®s->maccfg1); | ||
3132 | u32 tempval = gfar_read(®s->maccfg2); | ||
3133 | u32 ecntrl = gfar_read(®s->ecntrl); | ||
3134 | |||
3135 | /* Now we make sure that we can be in full duplex mode. | ||
3136 | * If not, we operate in half-duplex mode. | ||
3137 | */ | ||
3138 | if (phydev->duplex != priv->oldduplex) { | ||
3139 | new_state = 1; | ||
3140 | if (!(phydev->duplex)) | ||
3141 | tempval &= ~(MACCFG2_FULL_DUPLEX); | ||
3142 | else | ||
3143 | tempval |= MACCFG2_FULL_DUPLEX; | ||
3144 | |||
3145 | priv->oldduplex = phydev->duplex; | ||
3146 | } | ||
3147 | |||
3148 | if (phydev->speed != priv->oldspeed) { | ||
3149 | new_state = 1; | ||
3150 | switch (phydev->speed) { | ||
3151 | case 1000: | ||
3152 | tempval = | ||
3153 | ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII); | ||
3154 | |||
3155 | ecntrl &= ~(ECNTRL_R100); | ||
3156 | break; | ||
3157 | case 100: | ||
3158 | case 10: | ||
3159 | tempval = | ||
3160 | ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII); | ||
3161 | |||
3162 | /* Reduced mode distinguishes | ||
3163 | * between 10 and 100 | ||
3164 | */ | ||
3165 | if (phydev->speed == SPEED_100) | ||
3166 | ecntrl |= ECNTRL_R100; | ||
3167 | else | ||
3168 | ecntrl &= ~(ECNTRL_R100); | ||
3169 | break; | ||
3170 | default: | ||
3171 | netif_warn(priv, link, dev, | ||
3172 | "Ack! Speed (%d) is not 10/100/1000!\n", | ||
3173 | phydev->speed); | ||
3174 | break; | ||
3175 | } | ||
3176 | |||
3177 | priv->oldspeed = phydev->speed; | ||
3178 | } | ||
3179 | |||
3180 | tempval1 &= ~(MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); | ||
3181 | tempval1 |= gfar_get_flowctrl_cfg(priv); | ||
3182 | |||
3183 | gfar_write(®s->maccfg1, tempval1); | ||
3184 | gfar_write(®s->maccfg2, tempval); | ||
3185 | gfar_write(®s->ecntrl, ecntrl); | ||
3186 | |||
3187 | if (!priv->oldlink) { | ||
3188 | new_state = 1; | ||
3189 | priv->oldlink = 1; | ||
3190 | } | ||
3191 | } else if (priv->oldlink) { | ||
3192 | new_state = 1; | ||
3193 | priv->oldlink = 0; | ||
3194 | priv->oldspeed = 0; | ||
3195 | priv->oldduplex = -1; | ||
3196 | } | ||
3197 | |||
3198 | if (new_state && netif_msg_link(priv)) | ||
3199 | phy_print_status(phydev); | ||
3200 | } | 3095 | } |
3201 | 3096 | ||
3202 | /* Update the hash table based on the current list of multicast | 3097 | /* Update the hash table based on the current list of multicast |
@@ -3442,6 +3337,114 @@ static irqreturn_t gfar_error(int irq, void *grp_id) | |||
3442 | return IRQ_HANDLED; | 3337 | return IRQ_HANDLED; |
3443 | } | 3338 | } |
3444 | 3339 | ||
3340 | static u32 gfar_get_flowctrl_cfg(struct gfar_private *priv) | ||
3341 | { | ||
3342 | struct phy_device *phydev = priv->phydev; | ||
3343 | u32 val = 0; | ||
3344 | |||
3345 | if (!phydev->duplex) | ||
3346 | return val; | ||
3347 | |||
3348 | if (!priv->pause_aneg_en) { | ||
3349 | if (priv->tx_pause_en) | ||
3350 | val |= MACCFG1_TX_FLOW; | ||
3351 | if (priv->rx_pause_en) | ||
3352 | val |= MACCFG1_RX_FLOW; | ||
3353 | } else { | ||
3354 | u16 lcl_adv, rmt_adv; | ||
3355 | u8 flowctrl; | ||
3356 | /* get link partner capabilities */ | ||
3357 | rmt_adv = 0; | ||
3358 | if (phydev->pause) | ||
3359 | rmt_adv = LPA_PAUSE_CAP; | ||
3360 | if (phydev->asym_pause) | ||
3361 | rmt_adv |= LPA_PAUSE_ASYM; | ||
3362 | |||
3363 | lcl_adv = mii_advertise_flowctrl(phydev->advertising); | ||
3364 | |||
3365 | flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv); | ||
3366 | if (flowctrl & FLOW_CTRL_TX) | ||
3367 | val |= MACCFG1_TX_FLOW; | ||
3368 | if (flowctrl & FLOW_CTRL_RX) | ||
3369 | val |= MACCFG1_RX_FLOW; | ||
3370 | } | ||
3371 | |||
3372 | return val; | ||
3373 | } | ||
3374 | |||
3375 | static noinline void gfar_update_link_state(struct gfar_private *priv) | ||
3376 | { | ||
3377 | struct gfar __iomem *regs = priv->gfargrp[0].regs; | ||
3378 | struct phy_device *phydev = priv->phydev; | ||
3379 | |||
3380 | if (unlikely(test_bit(GFAR_RESETTING, &priv->state))) | ||
3381 | return; | ||
3382 | |||
3383 | if (phydev->link) { | ||
3384 | u32 tempval1 = gfar_read(®s->maccfg1); | ||
3385 | u32 tempval = gfar_read(®s->maccfg2); | ||
3386 | u32 ecntrl = gfar_read(®s->ecntrl); | ||
3387 | |||
3388 | if (phydev->duplex != priv->oldduplex) { | ||
3389 | if (!(phydev->duplex)) | ||
3390 | tempval &= ~(MACCFG2_FULL_DUPLEX); | ||
3391 | else | ||
3392 | tempval |= MACCFG2_FULL_DUPLEX; | ||
3393 | |||
3394 | priv->oldduplex = phydev->duplex; | ||
3395 | } | ||
3396 | |||
3397 | if (phydev->speed != priv->oldspeed) { | ||
3398 | switch (phydev->speed) { | ||
3399 | case 1000: | ||
3400 | tempval = | ||
3401 | ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII); | ||
3402 | |||
3403 | ecntrl &= ~(ECNTRL_R100); | ||
3404 | break; | ||
3405 | case 100: | ||
3406 | case 10: | ||
3407 | tempval = | ||
3408 | ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII); | ||
3409 | |||
3410 | /* Reduced mode distinguishes | ||
3411 | * between 10 and 100 | ||
3412 | */ | ||
3413 | if (phydev->speed == SPEED_100) | ||
3414 | ecntrl |= ECNTRL_R100; | ||
3415 | else | ||
3416 | ecntrl &= ~(ECNTRL_R100); | ||
3417 | break; | ||
3418 | default: | ||
3419 | netif_warn(priv, link, priv->ndev, | ||
3420 | "Ack! Speed (%d) is not 10/100/1000!\n", | ||
3421 | phydev->speed); | ||
3422 | break; | ||
3423 | } | ||
3424 | |||
3425 | priv->oldspeed = phydev->speed; | ||
3426 | } | ||
3427 | |||
3428 | tempval1 &= ~(MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); | ||
3429 | tempval1 |= gfar_get_flowctrl_cfg(priv); | ||
3430 | |||
3431 | gfar_write(®s->maccfg1, tempval1); | ||
3432 | gfar_write(®s->maccfg2, tempval); | ||
3433 | gfar_write(®s->ecntrl, ecntrl); | ||
3434 | |||
3435 | if (!priv->oldlink) | ||
3436 | priv->oldlink = 1; | ||
3437 | |||
3438 | } else if (priv->oldlink) { | ||
3439 | priv->oldlink = 0; | ||
3440 | priv->oldspeed = 0; | ||
3441 | priv->oldduplex = -1; | ||
3442 | } | ||
3443 | |||
3444 | if (netif_msg_link(priv)) | ||
3445 | phy_print_status(phydev); | ||
3446 | } | ||
3447 | |||
3445 | static struct of_device_id gfar_match[] = | 3448 | static struct of_device_id gfar_match[] = |
3446 | { | 3449 | { |
3447 | { | 3450 | { |
diff --git a/drivers/net/ethernet/freescale/gianfar_ethtool.c b/drivers/net/ethernet/freescale/gianfar_ethtool.c index 891dbee6e6c1..76d70708f864 100644 --- a/drivers/net/ethernet/freescale/gianfar_ethtool.c +++ b/drivers/net/ethernet/freescale/gianfar_ethtool.c | |||
@@ -533,6 +533,9 @@ static int gfar_spauseparam(struct net_device *dev, | |||
533 | struct gfar __iomem *regs = priv->gfargrp[0].regs; | 533 | struct gfar __iomem *regs = priv->gfargrp[0].regs; |
534 | u32 oldadv, newadv; | 534 | u32 oldadv, newadv; |
535 | 535 | ||
536 | if (!phydev) | ||
537 | return -ENODEV; | ||
538 | |||
536 | if (!(phydev->supported & SUPPORTED_Pause) || | 539 | if (!(phydev->supported & SUPPORTED_Pause) || |
537 | (!(phydev->supported & SUPPORTED_Asym_Pause) && | 540 | (!(phydev->supported & SUPPORTED_Asym_Pause) && |
538 | (epause->rx_pause != epause->tx_pause))) | 541 | (epause->rx_pause != epause->tx_pause))) |
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c index 9866f264f55e..f0bbd4246d71 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c | |||
@@ -186,7 +186,7 @@ static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw) | |||
186 | { | 186 | { |
187 | u16 phy_reg = 0; | 187 | u16 phy_reg = 0; |
188 | u32 phy_id = 0; | 188 | u32 phy_id = 0; |
189 | s32 ret_val; | 189 | s32 ret_val = 0; |
190 | u16 retry_count; | 190 | u16 retry_count; |
191 | u32 mac_reg = 0; | 191 | u32 mac_reg = 0; |
192 | 192 | ||
@@ -217,11 +217,13 @@ static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw) | |||
217 | /* In case the PHY needs to be in mdio slow mode, | 217 | /* In case the PHY needs to be in mdio slow mode, |
218 | * set slow mode and try to get the PHY id again. | 218 | * set slow mode and try to get the PHY id again. |
219 | */ | 219 | */ |
220 | hw->phy.ops.release(hw); | 220 | if (hw->mac.type < e1000_pch_lpt) { |
221 | ret_val = e1000_set_mdio_slow_mode_hv(hw); | 221 | hw->phy.ops.release(hw); |
222 | if (!ret_val) | 222 | ret_val = e1000_set_mdio_slow_mode_hv(hw); |
223 | ret_val = e1000e_get_phy_id(hw); | 223 | if (!ret_val) |
224 | hw->phy.ops.acquire(hw); | 224 | ret_val = e1000e_get_phy_id(hw); |
225 | hw->phy.ops.acquire(hw); | ||
226 | } | ||
225 | 227 | ||
226 | if (ret_val) | 228 | if (ret_val) |
227 | return false; | 229 | return false; |
@@ -842,6 +844,17 @@ s32 e1000_set_eee_pchlan(struct e1000_hw *hw) | |||
842 | } | 844 | } |
843 | } | 845 | } |
844 | 846 | ||
847 | if (hw->phy.type == e1000_phy_82579) { | ||
848 | ret_val = e1000_read_emi_reg_locked(hw, I82579_LPI_PLL_SHUT, | ||
849 | &data); | ||
850 | if (ret_val) | ||
851 | goto release; | ||
852 | |||
853 | data &= ~I82579_LPI_100_PLL_SHUT; | ||
854 | ret_val = e1000_write_emi_reg_locked(hw, I82579_LPI_PLL_SHUT, | ||
855 | data); | ||
856 | } | ||
857 | |||
845 | /* R/Clr IEEE MMD 3.1 bits 11:10 - Tx/Rx LPI Received */ | 858 | /* R/Clr IEEE MMD 3.1 bits 11:10 - Tx/Rx LPI Received */ |
846 | ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data); | 859 | ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data); |
847 | if (ret_val) | 860 | if (ret_val) |
@@ -1314,14 +1327,17 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) | |||
1314 | return ret_val; | 1327 | return ret_val; |
1315 | } | 1328 | } |
1316 | 1329 | ||
1317 | /* When connected at 10Mbps half-duplex, 82579 parts are excessively | 1330 | /* When connected at 10Mbps half-duplex, some parts are excessively |
1318 | * aggressive resulting in many collisions. To avoid this, increase | 1331 | * aggressive resulting in many collisions. To avoid this, increase |
1319 | * the IPG and reduce Rx latency in the PHY. | 1332 | * the IPG and reduce Rx latency in the PHY. |
1320 | */ | 1333 | */ |
1321 | if ((hw->mac.type == e1000_pch2lan) && link) { | 1334 | if (((hw->mac.type == e1000_pch2lan) || |
1335 | (hw->mac.type == e1000_pch_lpt)) && link) { | ||
1322 | u32 reg; | 1336 | u32 reg; |
1323 | reg = er32(STATUS); | 1337 | reg = er32(STATUS); |
1324 | if (!(reg & (E1000_STATUS_FD | E1000_STATUS_SPEED_MASK))) { | 1338 | if (!(reg & (E1000_STATUS_FD | E1000_STATUS_SPEED_MASK))) { |
1339 | u16 emi_addr; | ||
1340 | |||
1325 | reg = er32(TIPG); | 1341 | reg = er32(TIPG); |
1326 | reg &= ~E1000_TIPG_IPGT_MASK; | 1342 | reg &= ~E1000_TIPG_IPGT_MASK; |
1327 | reg |= 0xFF; | 1343 | reg |= 0xFF; |
@@ -1332,8 +1348,12 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) | |||
1332 | if (ret_val) | 1348 | if (ret_val) |
1333 | return ret_val; | 1349 | return ret_val; |
1334 | 1350 | ||
1335 | ret_val = | 1351 | if (hw->mac.type == e1000_pch2lan) |
1336 | e1000_write_emi_reg_locked(hw, I82579_RX_CONFIG, 0); | 1352 | emi_addr = I82579_RX_CONFIG; |
1353 | else | ||
1354 | emi_addr = I217_RX_CONFIG; | ||
1355 | |||
1356 | ret_val = e1000_write_emi_reg_locked(hw, emi_addr, 0); | ||
1337 | 1357 | ||
1338 | hw->phy.ops.release(hw); | 1358 | hw->phy.ops.release(hw); |
1339 | 1359 | ||
@@ -2493,51 +2513,44 @@ release: | |||
2493 | * e1000_k1_gig_workaround_lv - K1 Si workaround | 2513 | * e1000_k1_gig_workaround_lv - K1 Si workaround |
2494 | * @hw: pointer to the HW structure | 2514 | * @hw: pointer to the HW structure |
2495 | * | 2515 | * |
2496 | * Workaround to set the K1 beacon duration for 82579 parts | 2516 | * Workaround to set the K1 beacon duration for 82579 parts in 10Mbps |
2517 | * Disable K1 in 1000Mbps and 100Mbps | ||
2497 | **/ | 2518 | **/ |
2498 | static s32 e1000_k1_workaround_lv(struct e1000_hw *hw) | 2519 | static s32 e1000_k1_workaround_lv(struct e1000_hw *hw) |
2499 | { | 2520 | { |
2500 | s32 ret_val = 0; | 2521 | s32 ret_val = 0; |
2501 | u16 status_reg = 0; | 2522 | u16 status_reg = 0; |
2502 | u32 mac_reg; | ||
2503 | u16 phy_reg; | ||
2504 | 2523 | ||
2505 | if (hw->mac.type != e1000_pch2lan) | 2524 | if (hw->mac.type != e1000_pch2lan) |
2506 | return 0; | 2525 | return 0; |
2507 | 2526 | ||
2508 | /* Set K1 beacon duration based on 1Gbps speed or otherwise */ | 2527 | /* Set K1 beacon duration based on 10Mbs speed */ |
2509 | ret_val = e1e_rphy(hw, HV_M_STATUS, &status_reg); | 2528 | ret_val = e1e_rphy(hw, HV_M_STATUS, &status_reg); |
2510 | if (ret_val) | 2529 | if (ret_val) |
2511 | return ret_val; | 2530 | return ret_val; |
2512 | 2531 | ||
2513 | if ((status_reg & (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE)) | 2532 | if ((status_reg & (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE)) |
2514 | == (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE)) { | 2533 | == (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE)) { |
2515 | mac_reg = er32(FEXTNVM4); | 2534 | if (status_reg & |
2516 | mac_reg &= ~E1000_FEXTNVM4_BEACON_DURATION_MASK; | 2535 | (HV_M_STATUS_SPEED_1000 | HV_M_STATUS_SPEED_100)) { |
2517 | |||
2518 | ret_val = e1e_rphy(hw, I82579_LPI_CTRL, &phy_reg); | ||
2519 | if (ret_val) | ||
2520 | return ret_val; | ||
2521 | |||
2522 | if (status_reg & HV_M_STATUS_SPEED_1000) { | ||
2523 | u16 pm_phy_reg; | 2536 | u16 pm_phy_reg; |
2524 | 2537 | ||
2525 | mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_8USEC; | 2538 | /* LV 1G/100 Packet drop issue wa */ |
2526 | phy_reg &= ~I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT; | ||
2527 | /* LV 1G Packet drop issue wa */ | ||
2528 | ret_val = e1e_rphy(hw, HV_PM_CTRL, &pm_phy_reg); | 2539 | ret_val = e1e_rphy(hw, HV_PM_CTRL, &pm_phy_reg); |
2529 | if (ret_val) | 2540 | if (ret_val) |
2530 | return ret_val; | 2541 | return ret_val; |
2531 | pm_phy_reg &= ~HV_PM_CTRL_PLL_STOP_IN_K1_GIGA; | 2542 | pm_phy_reg &= ~HV_PM_CTRL_K1_ENABLE; |
2532 | ret_val = e1e_wphy(hw, HV_PM_CTRL, pm_phy_reg); | 2543 | ret_val = e1e_wphy(hw, HV_PM_CTRL, pm_phy_reg); |
2533 | if (ret_val) | 2544 | if (ret_val) |
2534 | return ret_val; | 2545 | return ret_val; |
2535 | } else { | 2546 | } else { |
2547 | u32 mac_reg; | ||
2548 | |||
2549 | mac_reg = er32(FEXTNVM4); | ||
2550 | mac_reg &= ~E1000_FEXTNVM4_BEACON_DURATION_MASK; | ||
2536 | mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_16USEC; | 2551 | mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_16USEC; |
2537 | phy_reg |= I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT; | 2552 | ew32(FEXTNVM4, mac_reg); |
2538 | } | 2553 | } |
2539 | ew32(FEXTNVM4, mac_reg); | ||
2540 | ret_val = e1e_wphy(hw, I82579_LPI_CTRL, phy_reg); | ||
2541 | } | 2554 | } |
2542 | 2555 | ||
2543 | return ret_val; | 2556 | return ret_val; |
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.h b/drivers/net/ethernet/intel/e1000e/ich8lan.h index bead50f9187b..5515126c81c1 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.h +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.h | |||
@@ -232,16 +232,19 @@ | |||
232 | #define I82577_MSE_THRESHOLD 0x0887 /* 82577 Mean Square Error Threshold */ | 232 | #define I82577_MSE_THRESHOLD 0x0887 /* 82577 Mean Square Error Threshold */ |
233 | #define I82579_MSE_LINK_DOWN 0x2411 /* MSE count before dropping link */ | 233 | #define I82579_MSE_LINK_DOWN 0x2411 /* MSE count before dropping link */ |
234 | #define I82579_RX_CONFIG 0x3412 /* Receive configuration */ | 234 | #define I82579_RX_CONFIG 0x3412 /* Receive configuration */ |
235 | #define I82579_LPI_PLL_SHUT 0x4412 /* LPI PLL Shut Enable */ | ||
235 | #define I82579_EEE_PCS_STATUS 0x182E /* IEEE MMD Register 3.1 >> 8 */ | 236 | #define I82579_EEE_PCS_STATUS 0x182E /* IEEE MMD Register 3.1 >> 8 */ |
236 | #define I82579_EEE_CAPABILITY 0x0410 /* IEEE MMD Register 3.20 */ | 237 | #define I82579_EEE_CAPABILITY 0x0410 /* IEEE MMD Register 3.20 */ |
237 | #define I82579_EEE_ADVERTISEMENT 0x040E /* IEEE MMD Register 7.60 */ | 238 | #define I82579_EEE_ADVERTISEMENT 0x040E /* IEEE MMD Register 7.60 */ |
238 | #define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */ | 239 | #define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */ |
239 | #define I82579_EEE_100_SUPPORTED (1 << 1) /* 100BaseTx EEE */ | 240 | #define I82579_EEE_100_SUPPORTED (1 << 1) /* 100BaseTx EEE */ |
240 | #define I82579_EEE_1000_SUPPORTED (1 << 2) /* 1000BaseTx EEE */ | 241 | #define I82579_EEE_1000_SUPPORTED (1 << 2) /* 1000BaseTx EEE */ |
242 | #define I82579_LPI_100_PLL_SHUT (1 << 2) /* 100M LPI PLL Shut Enabled */ | ||
241 | #define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */ | 243 | #define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */ |
242 | #define I217_EEE_CAPABILITY 0x8000 /* IEEE MMD Register 3.20 */ | 244 | #define I217_EEE_CAPABILITY 0x8000 /* IEEE MMD Register 3.20 */ |
243 | #define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */ | 245 | #define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */ |
244 | #define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */ | 246 | #define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */ |
247 | #define I217_RX_CONFIG 0xB20C /* Receive configuration */ | ||
245 | 248 | ||
246 | #define E1000_EEE_RX_LPI_RCVD 0x0400 /* Tx LP idle received */ | 249 | #define E1000_EEE_RX_LPI_RCVD 0x0400 /* Tx LP idle received */ |
247 | #define E1000_EEE_TX_LPI_RCVD 0x0800 /* Rx LP idle received */ | 250 | #define E1000_EEE_TX_LPI_RCVD 0x0800 /* Rx LP idle received */ |
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c index d50c91e50528..3e69386add04 100644 --- a/drivers/net/ethernet/intel/e1000e/netdev.c +++ b/drivers/net/ethernet/intel/e1000e/netdev.c | |||
@@ -1165,7 +1165,7 @@ static void e1000e_tx_hwtstamp_work(struct work_struct *work) | |||
1165 | dev_kfree_skb_any(adapter->tx_hwtstamp_skb); | 1165 | dev_kfree_skb_any(adapter->tx_hwtstamp_skb); |
1166 | adapter->tx_hwtstamp_skb = NULL; | 1166 | adapter->tx_hwtstamp_skb = NULL; |
1167 | adapter->tx_hwtstamp_timeouts++; | 1167 | adapter->tx_hwtstamp_timeouts++; |
1168 | e_warn("clearing Tx timestamp hang"); | 1168 | e_warn("clearing Tx timestamp hang\n"); |
1169 | } else { | 1169 | } else { |
1170 | /* reschedule to check later */ | 1170 | /* reschedule to check later */ |
1171 | schedule_work(&adapter->tx_hwtstamp_work); | 1171 | schedule_work(&adapter->tx_hwtstamp_work); |
@@ -5687,7 +5687,7 @@ struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, | |||
5687 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu) | 5687 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu) |
5688 | { | 5688 | { |
5689 | struct e1000_adapter *adapter = netdev_priv(netdev); | 5689 | struct e1000_adapter *adapter = netdev_priv(netdev); |
5690 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; | 5690 | int max_frame = new_mtu + VLAN_HLEN + ETH_HLEN + ETH_FCS_LEN; |
5691 | 5691 | ||
5692 | /* Jumbo frame support */ | 5692 | /* Jumbo frame support */ |
5693 | if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && | 5693 | if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && |
@@ -6235,6 +6235,7 @@ static int __e1000_resume(struct pci_dev *pdev) | |||
6235 | return 0; | 6235 | return 0; |
6236 | } | 6236 | } |
6237 | 6237 | ||
6238 | #ifdef CONFIG_PM_SLEEP | ||
6238 | static int e1000e_pm_thaw(struct device *dev) | 6239 | static int e1000e_pm_thaw(struct device *dev) |
6239 | { | 6240 | { |
6240 | struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev)); | 6241 | struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev)); |
@@ -6255,7 +6256,6 @@ static int e1000e_pm_thaw(struct device *dev) | |||
6255 | return 0; | 6256 | return 0; |
6256 | } | 6257 | } |
6257 | 6258 | ||
6258 | #ifdef CONFIG_PM_SLEEP | ||
6259 | static int e1000e_pm_suspend(struct device *dev) | 6259 | static int e1000e_pm_suspend(struct device *dev) |
6260 | { | 6260 | { |
6261 | struct pci_dev *pdev = to_pci_dev(dev); | 6261 | struct pci_dev *pdev = to_pci_dev(dev); |
diff --git a/drivers/net/ethernet/intel/e1000e/phy.h b/drivers/net/ethernet/intel/e1000e/phy.h index 3841bccf058c..537d2780b408 100644 --- a/drivers/net/ethernet/intel/e1000e/phy.h +++ b/drivers/net/ethernet/intel/e1000e/phy.h | |||
@@ -164,6 +164,7 @@ s32 e1000_get_cable_length_82577(struct e1000_hw *hw); | |||
164 | #define HV_M_STATUS_AUTONEG_COMPLETE 0x1000 | 164 | #define HV_M_STATUS_AUTONEG_COMPLETE 0x1000 |
165 | #define HV_M_STATUS_SPEED_MASK 0x0300 | 165 | #define HV_M_STATUS_SPEED_MASK 0x0300 |
166 | #define HV_M_STATUS_SPEED_1000 0x0200 | 166 | #define HV_M_STATUS_SPEED_1000 0x0200 |
167 | #define HV_M_STATUS_SPEED_100 0x0100 | ||
167 | #define HV_M_STATUS_LINK_UP 0x0040 | 168 | #define HV_M_STATUS_LINK_UP 0x0040 |
168 | 169 | ||
169 | #define IGP01E1000_PHY_PCS_INIT_REG 0x00B4 | 170 | #define IGP01E1000_PHY_PCS_INIT_REG 0x00B4 |
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c index 861b722c2672..cf0761f08911 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_main.c +++ b/drivers/net/ethernet/intel/i40e/i40e_main.c | |||
@@ -2897,12 +2897,9 @@ static irqreturn_t i40e_intr(int irq, void *data) | |||
2897 | u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); | 2897 | u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); |
2898 | 2898 | ||
2899 | if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { | 2899 | if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { |
2900 | ena_mask &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; | 2900 | icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; |
2901 | i40e_ptp_tx_hwtstamp(pf); | 2901 | i40e_ptp_tx_hwtstamp(pf); |
2902 | prttsyn_stat &= ~I40E_PRTTSYN_STAT_0_TXTIME_MASK; | ||
2903 | } | 2902 | } |
2904 | |||
2905 | wr32(hw, I40E_PRTTSYN_STAT_0, prttsyn_stat); | ||
2906 | } | 2903 | } |
2907 | 2904 | ||
2908 | /* If a critical error is pending we have no choice but to reset the | 2905 | /* If a critical error is pending we have no choice but to reset the |
@@ -4271,6 +4268,14 @@ static int i40e_open(struct net_device *netdev) | |||
4271 | if (err) | 4268 | if (err) |
4272 | return err; | 4269 | return err; |
4273 | 4270 | ||
4271 | /* configure global TSO hardware offload settings */ | ||
4272 | wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | | ||
4273 | TCP_FLAG_FIN) >> 16); | ||
4274 | wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | | ||
4275 | TCP_FLAG_FIN | | ||
4276 | TCP_FLAG_CWR) >> 16); | ||
4277 | wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); | ||
4278 | |||
4274 | #ifdef CONFIG_I40E_VXLAN | 4279 | #ifdef CONFIG_I40E_VXLAN |
4275 | vxlan_get_rx_port(netdev); | 4280 | vxlan_get_rx_port(netdev); |
4276 | #endif | 4281 | #endif |
@@ -6712,6 +6717,7 @@ static int i40e_config_netdev(struct i40e_vsi *vsi) | |||
6712 | NETIF_F_HW_VLAN_CTAG_FILTER | | 6717 | NETIF_F_HW_VLAN_CTAG_FILTER | |
6713 | NETIF_F_IPV6_CSUM | | 6718 | NETIF_F_IPV6_CSUM | |
6714 | NETIF_F_TSO | | 6719 | NETIF_F_TSO | |
6720 | NETIF_F_TSO_ECN | | ||
6715 | NETIF_F_TSO6 | | 6721 | NETIF_F_TSO6 | |
6716 | NETIF_F_RXCSUM | | 6722 | NETIF_F_RXCSUM | |
6717 | NETIF_F_NTUPLE | | 6723 | NETIF_F_NTUPLE | |
diff --git a/drivers/net/ethernet/intel/i40e/i40e_nvm.c b/drivers/net/ethernet/intel/i40e/i40e_nvm.c index 262bdf11d221..81299189a47d 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_nvm.c +++ b/drivers/net/ethernet/intel/i40e/i40e_nvm.c | |||
@@ -160,7 +160,7 @@ static i40e_status i40e_poll_sr_srctl_done_bit(struct i40e_hw *hw) | |||
160 | udelay(5); | 160 | udelay(5); |
161 | } | 161 | } |
162 | if (ret_code == I40E_ERR_TIMEOUT) | 162 | if (ret_code == I40E_ERR_TIMEOUT) |
163 | hw_dbg(hw, "Done bit in GLNVM_SRCTL not set"); | 163 | hw_dbg(hw, "Done bit in GLNVM_SRCTL not set\n"); |
164 | return ret_code; | 164 | return ret_code; |
165 | } | 165 | } |
166 | 166 | ||
diff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c index e33ec6c842b7..e61e63720800 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c +++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c | |||
@@ -239,7 +239,7 @@ static void i40e_ptp_tx_work(struct work_struct *work) | |||
239 | dev_kfree_skb_any(pf->ptp_tx_skb); | 239 | dev_kfree_skb_any(pf->ptp_tx_skb); |
240 | pf->ptp_tx_skb = NULL; | 240 | pf->ptp_tx_skb = NULL; |
241 | pf->tx_hwtstamp_timeouts++; | 241 | pf->tx_hwtstamp_timeouts++; |
242 | dev_warn(&pf->pdev->dev, "clearing Tx timestamp hang"); | 242 | dev_warn(&pf->pdev->dev, "clearing Tx timestamp hang\n"); |
243 | return; | 243 | return; |
244 | } | 244 | } |
245 | 245 | ||
@@ -321,7 +321,7 @@ void i40e_ptp_rx_hang(struct i40e_vsi *vsi) | |||
321 | pf->last_rx_ptp_check = jiffies; | 321 | pf->last_rx_ptp_check = jiffies; |
322 | pf->rx_hwtstamp_cleared++; | 322 | pf->rx_hwtstamp_cleared++; |
323 | dev_warn(&vsi->back->pdev->dev, | 323 | dev_warn(&vsi->back->pdev->dev, |
324 | "%s: clearing Rx timestamp hang", | 324 | "%s: clearing Rx timestamp hang\n", |
325 | __func__); | 325 | __func__); |
326 | } | 326 | } |
327 | } | 327 | } |
diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c index 0f5d96ad281d..9478ddc66caf 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c +++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c | |||
@@ -418,7 +418,7 @@ int i40e_add_del_fdir(struct i40e_vsi *vsi, | |||
418 | } | 418 | } |
419 | break; | 419 | break; |
420 | default: | 420 | default: |
421 | dev_info(&pf->pdev->dev, "Could not specify spec type %d", | 421 | dev_info(&pf->pdev->dev, "Could not specify spec type %d\n", |
422 | input->flow_type); | 422 | input->flow_type); |
423 | ret = -EINVAL; | 423 | ret = -EINVAL; |
424 | } | 424 | } |
@@ -478,7 +478,7 @@ static void i40e_fd_handle_status(struct i40e_ring *rx_ring, | |||
478 | pf->flags |= I40E_FLAG_FDIR_REQUIRES_REINIT; | 478 | pf->flags |= I40E_FLAG_FDIR_REQUIRES_REINIT; |
479 | } | 479 | } |
480 | } else { | 480 | } else { |
481 | dev_info(&pdev->dev, "FD filter programming error"); | 481 | dev_info(&pdev->dev, "FD filter programming error\n"); |
482 | } | 482 | } |
483 | } else if (error == | 483 | } else if (error == |
484 | (0x1 << I40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT)) { | 484 | (0x1 << I40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT)) { |
@@ -1713,9 +1713,11 @@ static int i40e_tx_prepare_vlan_flags(struct sk_buff *skb, | |||
1713 | I40E_TX_FLAGS_VLAN_PRIO_SHIFT; | 1713 | I40E_TX_FLAGS_VLAN_PRIO_SHIFT; |
1714 | if (tx_flags & I40E_TX_FLAGS_SW_VLAN) { | 1714 | if (tx_flags & I40E_TX_FLAGS_SW_VLAN) { |
1715 | struct vlan_ethhdr *vhdr; | 1715 | struct vlan_ethhdr *vhdr; |
1716 | if (skb_header_cloned(skb) && | 1716 | int rc; |
1717 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) | 1717 | |
1718 | return -ENOMEM; | 1718 | rc = skb_cow_head(skb, 0); |
1719 | if (rc < 0) | ||
1720 | return rc; | ||
1719 | vhdr = (struct vlan_ethhdr *)skb->data; | 1721 | vhdr = (struct vlan_ethhdr *)skb->data; |
1720 | vhdr->h_vlan_TCI = htons(tx_flags >> | 1722 | vhdr->h_vlan_TCI = htons(tx_flags >> |
1721 | I40E_TX_FLAGS_VLAN_SHIFT); | 1723 | I40E_TX_FLAGS_VLAN_SHIFT); |
@@ -1743,20 +1745,18 @@ static int i40e_tso(struct i40e_ring *tx_ring, struct sk_buff *skb, | |||
1743 | u64 *cd_type_cmd_tso_mss, u32 *cd_tunneling) | 1745 | u64 *cd_type_cmd_tso_mss, u32 *cd_tunneling) |
1744 | { | 1746 | { |
1745 | u32 cd_cmd, cd_tso_len, cd_mss; | 1747 | u32 cd_cmd, cd_tso_len, cd_mss; |
1748 | struct ipv6hdr *ipv6h; | ||
1746 | struct tcphdr *tcph; | 1749 | struct tcphdr *tcph; |
1747 | struct iphdr *iph; | 1750 | struct iphdr *iph; |
1748 | u32 l4len; | 1751 | u32 l4len; |
1749 | int err; | 1752 | int err; |
1750 | struct ipv6hdr *ipv6h; | ||
1751 | 1753 | ||
1752 | if (!skb_is_gso(skb)) | 1754 | if (!skb_is_gso(skb)) |
1753 | return 0; | 1755 | return 0; |
1754 | 1756 | ||
1755 | if (skb_header_cloned(skb)) { | 1757 | err = skb_cow_head(skb, 0); |
1756 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | 1758 | if (err < 0) |
1757 | if (err) | 1759 | return err; |
1758 | return err; | ||
1759 | } | ||
1760 | 1760 | ||
1761 | if (protocol == htons(ETH_P_IP)) { | 1761 | if (protocol == htons(ETH_P_IP)) { |
1762 | iph = skb->encapsulation ? inner_ip_hdr(skb) : ip_hdr(skb); | 1762 | iph = skb->encapsulation ? inner_ip_hdr(skb) : ip_hdr(skb); |
diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.c b/drivers/net/ethernet/intel/igb/e1000_i210.c index db963397cc27..f67f8a170b90 100644 --- a/drivers/net/ethernet/intel/igb/e1000_i210.c +++ b/drivers/net/ethernet/intel/igb/e1000_i210.c | |||
@@ -365,7 +365,7 @@ static s32 igb_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data) | |||
365 | word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword); | 365 | word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword); |
366 | if (word_address == address) { | 366 | if (word_address == address) { |
367 | *data = INVM_DWORD_TO_WORD_DATA(invm_dword); | 367 | *data = INVM_DWORD_TO_WORD_DATA(invm_dword); |
368 | hw_dbg("Read INVM Word 0x%02x = %x", | 368 | hw_dbg("Read INVM Word 0x%02x = %x\n", |
369 | address, *data); | 369 | address, *data); |
370 | status = E1000_SUCCESS; | 370 | status = E1000_SUCCESS; |
371 | break; | 371 | break; |
diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.c b/drivers/net/ethernet/intel/igb/e1000_mac.c index 5910a932ea7c..1e0c404db81a 100644 --- a/drivers/net/ethernet/intel/igb/e1000_mac.c +++ b/drivers/net/ethernet/intel/igb/e1000_mac.c | |||
@@ -929,11 +929,10 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw) | |||
929 | */ | 929 | */ |
930 | if (hw->fc.requested_mode == e1000_fc_full) { | 930 | if (hw->fc.requested_mode == e1000_fc_full) { |
931 | hw->fc.current_mode = e1000_fc_full; | 931 | hw->fc.current_mode = e1000_fc_full; |
932 | hw_dbg("Flow Control = FULL.\r\n"); | 932 | hw_dbg("Flow Control = FULL.\n"); |
933 | } else { | 933 | } else { |
934 | hw->fc.current_mode = e1000_fc_rx_pause; | 934 | hw->fc.current_mode = e1000_fc_rx_pause; |
935 | hw_dbg("Flow Control = " | 935 | hw_dbg("Flow Control = RX PAUSE frames only.\n"); |
936 | "RX PAUSE frames only.\r\n"); | ||
937 | } | 936 | } |
938 | } | 937 | } |
939 | /* For receiving PAUSE frames ONLY. | 938 | /* For receiving PAUSE frames ONLY. |
@@ -948,7 +947,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw) | |||
948 | (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && | 947 | (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && |
949 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { | 948 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { |
950 | hw->fc.current_mode = e1000_fc_tx_pause; | 949 | hw->fc.current_mode = e1000_fc_tx_pause; |
951 | hw_dbg("Flow Control = TX PAUSE frames only.\r\n"); | 950 | hw_dbg("Flow Control = TX PAUSE frames only.\n"); |
952 | } | 951 | } |
953 | /* For transmitting PAUSE frames ONLY. | 952 | /* For transmitting PAUSE frames ONLY. |
954 | * | 953 | * |
@@ -962,7 +961,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw) | |||
962 | !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && | 961 | !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && |
963 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { | 962 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { |
964 | hw->fc.current_mode = e1000_fc_rx_pause; | 963 | hw->fc.current_mode = e1000_fc_rx_pause; |
965 | hw_dbg("Flow Control = RX PAUSE frames only.\r\n"); | 964 | hw_dbg("Flow Control = RX PAUSE frames only.\n"); |
966 | } | 965 | } |
967 | /* Per the IEEE spec, at this point flow control should be | 966 | /* Per the IEEE spec, at this point flow control should be |
968 | * disabled. However, we want to consider that we could | 967 | * disabled. However, we want to consider that we could |
@@ -988,10 +987,10 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw) | |||
988 | (hw->fc.requested_mode == e1000_fc_tx_pause) || | 987 | (hw->fc.requested_mode == e1000_fc_tx_pause) || |
989 | (hw->fc.strict_ieee)) { | 988 | (hw->fc.strict_ieee)) { |
990 | hw->fc.current_mode = e1000_fc_none; | 989 | hw->fc.current_mode = e1000_fc_none; |
991 | hw_dbg("Flow Control = NONE.\r\n"); | 990 | hw_dbg("Flow Control = NONE.\n"); |
992 | } else { | 991 | } else { |
993 | hw->fc.current_mode = e1000_fc_rx_pause; | 992 | hw->fc.current_mode = e1000_fc_rx_pause; |
994 | hw_dbg("Flow Control = RX PAUSE frames only.\r\n"); | 993 | hw_dbg("Flow Control = RX PAUSE frames only.\n"); |
995 | } | 994 | } |
996 | 995 | ||
997 | /* Now we need to do one last check... If we auto- | 996 | /* Now we need to do one last check... If we auto- |
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c index fb98d4602f9d..16430a8440fa 100644 --- a/drivers/net/ethernet/intel/igb/igb_main.c +++ b/drivers/net/ethernet/intel/igb/igb_main.c | |||
@@ -5193,8 +5193,10 @@ void igb_update_stats(struct igb_adapter *adapter, | |||
5193 | 5193 | ||
5194 | rcu_read_lock(); | 5194 | rcu_read_lock(); |
5195 | for (i = 0; i < adapter->num_rx_queues; i++) { | 5195 | for (i = 0; i < adapter->num_rx_queues; i++) { |
5196 | u32 rqdpc = rd32(E1000_RQDPC(i)); | ||
5197 | struct igb_ring *ring = adapter->rx_ring[i]; | 5196 | struct igb_ring *ring = adapter->rx_ring[i]; |
5197 | u32 rqdpc = rd32(E1000_RQDPC(i)); | ||
5198 | if (hw->mac.type >= e1000_i210) | ||
5199 | wr32(E1000_RQDPC(i), 0); | ||
5198 | 5200 | ||
5199 | if (rqdpc) { | 5201 | if (rqdpc) { |
5200 | ring->rx_stats.drops += rqdpc; | 5202 | ring->rx_stats.drops += rqdpc; |
diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c index 9209d652e1c9..ab25e49365f7 100644 --- a/drivers/net/ethernet/intel/igb/igb_ptp.c +++ b/drivers/net/ethernet/intel/igb/igb_ptp.c | |||
@@ -389,7 +389,7 @@ static void igb_ptp_tx_work(struct work_struct *work) | |||
389 | adapter->ptp_tx_skb = NULL; | 389 | adapter->ptp_tx_skb = NULL; |
390 | clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state); | 390 | clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state); |
391 | adapter->tx_hwtstamp_timeouts++; | 391 | adapter->tx_hwtstamp_timeouts++; |
392 | dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang"); | 392 | dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n"); |
393 | return; | 393 | return; |
394 | } | 394 | } |
395 | 395 | ||
@@ -451,7 +451,7 @@ void igb_ptp_rx_hang(struct igb_adapter *adapter) | |||
451 | rd32(E1000_RXSTMPH); | 451 | rd32(E1000_RXSTMPH); |
452 | adapter->last_rx_ptp_check = jiffies; | 452 | adapter->last_rx_ptp_check = jiffies; |
453 | adapter->rx_hwtstamp_cleared++; | 453 | adapter->rx_hwtstamp_cleared++; |
454 | dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang"); | 454 | dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang\n"); |
455 | } | 455 | } |
456 | } | 456 | } |
457 | 457 | ||
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h index 1a12c1dd7a27..c6c4ca7d68e6 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h | |||
@@ -256,7 +256,6 @@ struct ixgbe_ring { | |||
256 | struct ixgbe_tx_buffer *tx_buffer_info; | 256 | struct ixgbe_tx_buffer *tx_buffer_info; |
257 | struct ixgbe_rx_buffer *rx_buffer_info; | 257 | struct ixgbe_rx_buffer *rx_buffer_info; |
258 | }; | 258 | }; |
259 | unsigned long last_rx_timestamp; | ||
260 | unsigned long state; | 259 | unsigned long state; |
261 | u8 __iomem *tail; | 260 | u8 __iomem *tail; |
262 | dma_addr_t dma; /* phys. address of descriptor ring */ | 261 | dma_addr_t dma; /* phys. address of descriptor ring */ |
@@ -770,6 +769,7 @@ struct ixgbe_adapter { | |||
770 | unsigned long ptp_tx_start; | 769 | unsigned long ptp_tx_start; |
771 | unsigned long last_overflow_check; | 770 | unsigned long last_overflow_check; |
772 | unsigned long last_rx_ptp_check; | 771 | unsigned long last_rx_ptp_check; |
772 | unsigned long last_rx_timestamp; | ||
773 | spinlock_t tmreg_lock; | 773 | spinlock_t tmreg_lock; |
774 | struct cyclecounter cc; | 774 | struct cyclecounter cc; |
775 | struct timecounter tc; | 775 | struct timecounter tc; |
@@ -944,24 +944,7 @@ void ixgbe_ptp_init(struct ixgbe_adapter *adapter); | |||
944 | void ixgbe_ptp_stop(struct ixgbe_adapter *adapter); | 944 | void ixgbe_ptp_stop(struct ixgbe_adapter *adapter); |
945 | void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter); | 945 | void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter); |
946 | void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter); | 946 | void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter); |
947 | void __ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector, | 947 | void ixgbe_ptp_rx_hwtstamp(struct ixgbe_adapter *adapter, struct sk_buff *skb); |
948 | struct sk_buff *skb); | ||
949 | static inline void ixgbe_ptp_rx_hwtstamp(struct ixgbe_ring *rx_ring, | ||
950 | union ixgbe_adv_rx_desc *rx_desc, | ||
951 | struct sk_buff *skb) | ||
952 | { | ||
953 | if (unlikely(!ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS))) | ||
954 | return; | ||
955 | |||
956 | __ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector, skb); | ||
957 | |||
958 | /* | ||
959 | * Update the last_rx_timestamp timer in order to enable watchdog check | ||
960 | * for error case of latched timestamp on a dropped packet. | ||
961 | */ | ||
962 | rx_ring->last_rx_timestamp = jiffies; | ||
963 | } | ||
964 | |||
965 | int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr); | 948 | int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr); |
966 | int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr); | 949 | int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr); |
967 | void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter); | 950 | void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter); |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c index 24fba39e194e..981b8a7b100d 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c | |||
@@ -1195,7 +1195,7 @@ static s32 ixgbe_detect_eeprom_page_size_generic(struct ixgbe_hw *hw, | |||
1195 | */ | 1195 | */ |
1196 | hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0]; | 1196 | hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0]; |
1197 | 1197 | ||
1198 | hw_dbg(hw, "Detected EEPROM page size = %d words.", | 1198 | hw_dbg(hw, "Detected EEPROM page size = %d words.\n", |
1199 | hw->eeprom.word_page_size); | 1199 | hw->eeprom.word_page_size); |
1200 | out: | 1200 | out: |
1201 | return status; | 1201 | return status; |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index c4c526b7f99f..d62e7a25cf97 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | |||
@@ -1664,7 +1664,8 @@ static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring, | |||
1664 | 1664 | ||
1665 | ixgbe_rx_checksum(rx_ring, rx_desc, skb); | 1665 | ixgbe_rx_checksum(rx_ring, rx_desc, skb); |
1666 | 1666 | ||
1667 | ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb); | 1667 | if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS))) |
1668 | ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb); | ||
1668 | 1669 | ||
1669 | if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) && | 1670 | if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) && |
1670 | ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) { | 1671 | ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) { |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c index 23f765263f12..a76af8e28a04 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c | |||
@@ -536,7 +536,7 @@ s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw) | |||
536 | 536 | ||
537 | if (time_out == max_time_out) { | 537 | if (time_out == max_time_out) { |
538 | status = IXGBE_ERR_LINK_SETUP; | 538 | status = IXGBE_ERR_LINK_SETUP; |
539 | hw_dbg(hw, "ixgbe_setup_phy_link_generic: time out"); | 539 | hw_dbg(hw, "ixgbe_setup_phy_link_generic: time out\n"); |
540 | } | 540 | } |
541 | 541 | ||
542 | return status; | 542 | return status; |
@@ -745,7 +745,7 @@ s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw) | |||
745 | 745 | ||
746 | if (time_out == max_time_out) { | 746 | if (time_out == max_time_out) { |
747 | status = IXGBE_ERR_LINK_SETUP; | 747 | status = IXGBE_ERR_LINK_SETUP; |
748 | hw_dbg(hw, "ixgbe_setup_phy_link_tnx: time out"); | 748 | hw_dbg(hw, "ixgbe_setup_phy_link_tnx: time out\n"); |
749 | } | 749 | } |
750 | 750 | ||
751 | return status; | 751 | return status; |
@@ -1175,7 +1175,7 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw) | |||
1175 | status = 0; | 1175 | status = 0; |
1176 | } else { | 1176 | } else { |
1177 | if (hw->allow_unsupported_sfp) { | 1177 | if (hw->allow_unsupported_sfp) { |
1178 | e_warn(drv, "WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. Intel Corporation is not responsible for any harm caused by using untested modules."); | 1178 | e_warn(drv, "WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. Intel Corporation is not responsible for any harm caused by using untested modules.\n"); |
1179 | status = 0; | 1179 | status = 0; |
1180 | } else { | 1180 | } else { |
1181 | hw_dbg(hw, | 1181 | hw_dbg(hw, |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c index 63515a6f67fa..8902ae683457 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c | |||
@@ -435,10 +435,8 @@ void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter) | |||
435 | void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter) | 435 | void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter) |
436 | { | 436 | { |
437 | struct ixgbe_hw *hw = &adapter->hw; | 437 | struct ixgbe_hw *hw = &adapter->hw; |
438 | struct ixgbe_ring *rx_ring; | ||
439 | u32 tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); | 438 | u32 tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); |
440 | unsigned long rx_event; | 439 | unsigned long rx_event; |
441 | int n; | ||
442 | 440 | ||
443 | /* if we don't have a valid timestamp in the registers, just update the | 441 | /* if we don't have a valid timestamp in the registers, just update the |
444 | * timeout counter and exit | 442 | * timeout counter and exit |
@@ -450,18 +448,15 @@ void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter) | |||
450 | 448 | ||
451 | /* determine the most recent watchdog or rx_timestamp event */ | 449 | /* determine the most recent watchdog or rx_timestamp event */ |
452 | rx_event = adapter->last_rx_ptp_check; | 450 | rx_event = adapter->last_rx_ptp_check; |
453 | for (n = 0; n < adapter->num_rx_queues; n++) { | 451 | if (time_after(adapter->last_rx_timestamp, rx_event)) |
454 | rx_ring = adapter->rx_ring[n]; | 452 | rx_event = adapter->last_rx_timestamp; |
455 | if (time_after(rx_ring->last_rx_timestamp, rx_event)) | ||
456 | rx_event = rx_ring->last_rx_timestamp; | ||
457 | } | ||
458 | 453 | ||
459 | /* only need to read the high RXSTMP register to clear the lock */ | 454 | /* only need to read the high RXSTMP register to clear the lock */ |
460 | if (time_is_before_jiffies(rx_event + 5*HZ)) { | 455 | if (time_is_before_jiffies(rx_event + 5*HZ)) { |
461 | IXGBE_READ_REG(hw, IXGBE_RXSTMPH); | 456 | IXGBE_READ_REG(hw, IXGBE_RXSTMPH); |
462 | adapter->last_rx_ptp_check = jiffies; | 457 | adapter->last_rx_ptp_check = jiffies; |
463 | 458 | ||
464 | e_warn(drv, "clearing RX Timestamp hang"); | 459 | e_warn(drv, "clearing RX Timestamp hang\n"); |
465 | } | 460 | } |
466 | } | 461 | } |
467 | 462 | ||
@@ -517,7 +512,7 @@ static void ixgbe_ptp_tx_hwtstamp_work(struct work_struct *work) | |||
517 | dev_kfree_skb_any(adapter->ptp_tx_skb); | 512 | dev_kfree_skb_any(adapter->ptp_tx_skb); |
518 | adapter->ptp_tx_skb = NULL; | 513 | adapter->ptp_tx_skb = NULL; |
519 | clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state); | 514 | clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state); |
520 | e_warn(drv, "clearing Tx Timestamp hang"); | 515 | e_warn(drv, "clearing Tx Timestamp hang\n"); |
521 | return; | 516 | return; |
522 | } | 517 | } |
523 | 518 | ||
@@ -530,35 +525,22 @@ static void ixgbe_ptp_tx_hwtstamp_work(struct work_struct *work) | |||
530 | } | 525 | } |
531 | 526 | ||
532 | /** | 527 | /** |
533 | * __ixgbe_ptp_rx_hwtstamp - utility function which checks for RX time stamp | 528 | * ixgbe_ptp_rx_hwtstamp - utility function which checks for RX time stamp |
534 | * @q_vector: structure containing interrupt and ring information | 529 | * @adapter: pointer to adapter struct |
535 | * @skb: particular skb to send timestamp with | 530 | * @skb: particular skb to send timestamp with |
536 | * | 531 | * |
537 | * if the timestamp is valid, we convert it into the timecounter ns | 532 | * if the timestamp is valid, we convert it into the timecounter ns |
538 | * value, then store that result into the shhwtstamps structure which | 533 | * value, then store that result into the shhwtstamps structure which |
539 | * is passed up the network stack | 534 | * is passed up the network stack |
540 | */ | 535 | */ |
541 | void __ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector, | 536 | void ixgbe_ptp_rx_hwtstamp(struct ixgbe_adapter *adapter, struct sk_buff *skb) |
542 | struct sk_buff *skb) | ||
543 | { | 537 | { |
544 | struct ixgbe_adapter *adapter; | 538 | struct ixgbe_hw *hw = &adapter->hw; |
545 | struct ixgbe_hw *hw; | ||
546 | struct skb_shared_hwtstamps *shhwtstamps; | 539 | struct skb_shared_hwtstamps *shhwtstamps; |
547 | u64 regval = 0, ns; | 540 | u64 regval = 0, ns; |
548 | u32 tsyncrxctl; | 541 | u32 tsyncrxctl; |
549 | unsigned long flags; | 542 | unsigned long flags; |
550 | 543 | ||
551 | /* we cannot process timestamps on a ring without a q_vector */ | ||
552 | if (!q_vector || !q_vector->adapter) | ||
553 | return; | ||
554 | |||
555 | adapter = q_vector->adapter; | ||
556 | hw = &adapter->hw; | ||
557 | |||
558 | /* | ||
559 | * Read the tsyncrxctl register afterwards in order to prevent taking an | ||
560 | * I/O hit on every packet. | ||
561 | */ | ||
562 | tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); | 544 | tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); |
563 | if (!(tsyncrxctl & IXGBE_TSYNCRXCTL_VALID)) | 545 | if (!(tsyncrxctl & IXGBE_TSYNCRXCTL_VALID)) |
564 | return; | 546 | return; |
@@ -566,13 +548,17 @@ void __ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector, | |||
566 | regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPL); | 548 | regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPL); |
567 | regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPH) << 32; | 549 | regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPH) << 32; |
568 | 550 | ||
569 | |||
570 | spin_lock_irqsave(&adapter->tmreg_lock, flags); | 551 | spin_lock_irqsave(&adapter->tmreg_lock, flags); |
571 | ns = timecounter_cyc2time(&adapter->tc, regval); | 552 | ns = timecounter_cyc2time(&adapter->tc, regval); |
572 | spin_unlock_irqrestore(&adapter->tmreg_lock, flags); | 553 | spin_unlock_irqrestore(&adapter->tmreg_lock, flags); |
573 | 554 | ||
574 | shhwtstamps = skb_hwtstamps(skb); | 555 | shhwtstamps = skb_hwtstamps(skb); |
575 | shhwtstamps->hwtstamp = ns_to_ktime(ns); | 556 | shhwtstamps->hwtstamp = ns_to_ktime(ns); |
557 | |||
558 | /* Update the last_rx_timestamp timer in order to enable watchdog check | ||
559 | * for error case of latched timestamp on a dropped packet. | ||
560 | */ | ||
561 | adapter->last_rx_timestamp = jiffies; | ||
576 | } | 562 | } |
577 | 563 | ||
578 | int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr) | 564 | int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr) |
diff --git a/drivers/net/ethernet/marvell/mvmdio.c b/drivers/net/ethernet/marvell/mvmdio.c index b161a525fc5b..9d5ced263a5e 100644 --- a/drivers/net/ethernet/marvell/mvmdio.c +++ b/drivers/net/ethernet/marvell/mvmdio.c | |||
@@ -232,7 +232,7 @@ static int orion_mdio_probe(struct platform_device *pdev) | |||
232 | clk_prepare_enable(dev->clk); | 232 | clk_prepare_enable(dev->clk); |
233 | 233 | ||
234 | dev->err_interrupt = platform_get_irq(pdev, 0); | 234 | dev->err_interrupt = platform_get_irq(pdev, 0); |
235 | if (dev->err_interrupt != -ENXIO) { | 235 | if (dev->err_interrupt > 0) { |
236 | ret = devm_request_irq(&pdev->dev, dev->err_interrupt, | 236 | ret = devm_request_irq(&pdev->dev, dev->err_interrupt, |
237 | orion_mdio_err_irq, | 237 | orion_mdio_err_irq, |
238 | IRQF_SHARED, pdev->name, dev); | 238 | IRQF_SHARED, pdev->name, dev); |
@@ -241,6 +241,9 @@ static int orion_mdio_probe(struct platform_device *pdev) | |||
241 | 241 | ||
242 | writel(MVMDIO_ERR_INT_SMI_DONE, | 242 | writel(MVMDIO_ERR_INT_SMI_DONE, |
243 | dev->regs + MVMDIO_ERR_INT_MASK); | 243 | dev->regs + MVMDIO_ERR_INT_MASK); |
244 | |||
245 | } else if (dev->err_interrupt == -EPROBE_DEFER) { | ||
246 | return -EPROBE_DEFER; | ||
244 | } | 247 | } |
245 | 248 | ||
246 | mutex_init(&dev->lock); | 249 | mutex_init(&dev->lock); |
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c index cef267e24f9c..7cf9dadcb471 100644 --- a/drivers/net/ethernet/mellanox/mlx4/main.c +++ b/drivers/net/ethernet/mellanox/mlx4/main.c | |||
@@ -754,10 +754,10 @@ static void mlx4_request_modules(struct mlx4_dev *dev) | |||
754 | has_eth_port = true; | 754 | has_eth_port = true; |
755 | } | 755 | } |
756 | 756 | ||
757 | if (has_ib_port || (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) | ||
758 | request_module_nowait(IB_DRV_NAME); | ||
759 | if (has_eth_port) | 757 | if (has_eth_port) |
760 | request_module_nowait(EN_DRV_NAME); | 758 | request_module_nowait(EN_DRV_NAME); |
759 | if (has_ib_port || (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) | ||
760 | request_module_nowait(IB_DRV_NAME); | ||
761 | } | 761 | } |
762 | 762 | ||
763 | /* | 763 | /* |
@@ -2440,7 +2440,8 @@ slave_start: | |||
2440 | * No return code for this call, just warn the user in case of PCI | 2440 | * No return code for this call, just warn the user in case of PCI |
2441 | * express device capabilities are under-satisfied by the bus. | 2441 | * express device capabilities are under-satisfied by the bus. |
2442 | */ | 2442 | */ |
2443 | mlx4_check_pcie_caps(dev); | 2443 | if (!mlx4_is_slave(dev)) |
2444 | mlx4_check_pcie_caps(dev); | ||
2444 | 2445 | ||
2445 | /* In master functions, the communication channel must be initialized | 2446 | /* In master functions, the communication channel must be initialized |
2446 | * after obtaining its address from fw */ | 2447 | * after obtaining its address from fw */ |
diff --git a/drivers/net/ethernet/mellanox/mlx4/port.c b/drivers/net/ethernet/mellanox/mlx4/port.c index cfcad26ed40f..b5b3549b0c8d 100644 --- a/drivers/net/ethernet/mellanox/mlx4/port.c +++ b/drivers/net/ethernet/mellanox/mlx4/port.c | |||
@@ -1106,6 +1106,9 @@ int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid, | |||
1106 | } | 1106 | } |
1107 | 1107 | ||
1108 | if (found_ix >= 0) { | 1108 | if (found_ix >= 0) { |
1109 | /* Calculate a slave_gid which is the slave number in the gid | ||
1110 | * table and not a globally unique slave number. | ||
1111 | */ | ||
1109 | if (found_ix < MLX4_ROCE_PF_GIDS) | 1112 | if (found_ix < MLX4_ROCE_PF_GIDS) |
1110 | slave_gid = 0; | 1113 | slave_gid = 0; |
1111 | else if (found_ix < MLX4_ROCE_PF_GIDS + (vf_gids % num_vfs) * | 1114 | else if (found_ix < MLX4_ROCE_PF_GIDS + (vf_gids % num_vfs) * |
@@ -1118,41 +1121,43 @@ int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid, | |||
1118 | ((vf_gids % num_vfs) * ((vf_gids / num_vfs + 1)))) / | 1121 | ((vf_gids % num_vfs) * ((vf_gids / num_vfs + 1)))) / |
1119 | (vf_gids / num_vfs)) + vf_gids % num_vfs + 1; | 1122 | (vf_gids / num_vfs)) + vf_gids % num_vfs + 1; |
1120 | 1123 | ||
1124 | /* Calculate the globally unique slave id */ | ||
1121 | if (slave_gid) { | 1125 | if (slave_gid) { |
1122 | struct mlx4_active_ports exclusive_ports; | 1126 | struct mlx4_active_ports exclusive_ports; |
1123 | struct mlx4_active_ports actv_ports; | 1127 | struct mlx4_active_ports actv_ports; |
1124 | struct mlx4_slaves_pport slaves_pport_actv; | 1128 | struct mlx4_slaves_pport slaves_pport_actv; |
1125 | unsigned max_port_p_one; | 1129 | unsigned max_port_p_one; |
1126 | int num_slaves_before = 1; | 1130 | int num_vfs_before = 0; |
1131 | int candidate_slave_gid; | ||
1127 | 1132 | ||
1133 | /* Calculate how many VFs are on the previous port, if exists */ | ||
1128 | for (i = 1; i < port; i++) { | 1134 | for (i = 1; i < port; i++) { |
1129 | bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); | 1135 | bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); |
1130 | set_bit(i, exclusive_ports.ports); | 1136 | set_bit(i - 1, exclusive_ports.ports); |
1131 | slaves_pport_actv = | 1137 | slaves_pport_actv = |
1132 | mlx4_phys_to_slaves_pport_actv( | 1138 | mlx4_phys_to_slaves_pport_actv( |
1133 | dev, &exclusive_ports); | 1139 | dev, &exclusive_ports); |
1134 | num_slaves_before += bitmap_weight( | 1140 | num_vfs_before += bitmap_weight( |
1135 | slaves_pport_actv.slaves, | 1141 | slaves_pport_actv.slaves, |
1136 | dev->num_vfs + 1); | 1142 | dev->num_vfs + 1); |
1137 | } | 1143 | } |
1138 | 1144 | ||
1139 | if (slave_gid < num_slaves_before) { | 1145 | /* candidate_slave_gid isn't necessarily the correct slave, but |
1140 | bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); | 1146 | * it has the same number of ports and is assigned to the same |
1141 | set_bit(port - 1, exclusive_ports.ports); | 1147 | * ports as the real slave we're looking for. On dual port VF, |
1142 | slaves_pport_actv = | 1148 | * slave_gid = [single port VFs on port <port>] + |
1143 | mlx4_phys_to_slaves_pport_actv( | 1149 | * [offset of the current slave from the first dual port VF] + |
1144 | dev, &exclusive_ports); | 1150 | * 1 (for the PF). |
1145 | slave_gid += bitmap_weight( | 1151 | */ |
1146 | slaves_pport_actv.slaves, | 1152 | candidate_slave_gid = slave_gid + num_vfs_before; |
1147 | dev->num_vfs + 1) - | 1153 | |
1148 | num_slaves_before; | 1154 | actv_ports = mlx4_get_active_ports(dev, candidate_slave_gid); |
1149 | } | ||
1150 | actv_ports = mlx4_get_active_ports(dev, slave_gid); | ||
1151 | max_port_p_one = find_first_bit( | 1155 | max_port_p_one = find_first_bit( |
1152 | actv_ports.ports, dev->caps.num_ports) + | 1156 | actv_ports.ports, dev->caps.num_ports) + |
1153 | bitmap_weight(actv_ports.ports, | 1157 | bitmap_weight(actv_ports.ports, |
1154 | dev->caps.num_ports) + 1; | 1158 | dev->caps.num_ports) + 1; |
1155 | 1159 | ||
1160 | /* Calculate the real slave number */ | ||
1156 | for (i = 1; i < max_port_p_one; i++) { | 1161 | for (i = 1; i < max_port_p_one; i++) { |
1157 | if (i == port) | 1162 | if (i == port) |
1158 | continue; | 1163 | continue; |
diff --git a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c index 3b5f53ef29b2..1c3fdd4a1f7d 100644 --- a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c +++ b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c | |||
@@ -3733,6 +3733,25 @@ static int qp_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, | |||
3733 | } | 3733 | } |
3734 | } | 3734 | } |
3735 | 3735 | ||
3736 | static int mlx4_adjust_port(struct mlx4_dev *dev, int slave, | ||
3737 | u8 *gid, enum mlx4_protocol prot) | ||
3738 | { | ||
3739 | int real_port; | ||
3740 | |||
3741 | if (prot != MLX4_PROT_ETH) | ||
3742 | return 0; | ||
3743 | |||
3744 | if (dev->caps.steering_mode == MLX4_STEERING_MODE_B0 || | ||
3745 | dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) { | ||
3746 | real_port = mlx4_slave_convert_port(dev, slave, gid[5]); | ||
3747 | if (real_port < 0) | ||
3748 | return -EINVAL; | ||
3749 | gid[5] = real_port; | ||
3750 | } | ||
3751 | |||
3752 | return 0; | ||
3753 | } | ||
3754 | |||
3736 | int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, | 3755 | int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, |
3737 | struct mlx4_vhcr *vhcr, | 3756 | struct mlx4_vhcr *vhcr, |
3738 | struct mlx4_cmd_mailbox *inbox, | 3757 | struct mlx4_cmd_mailbox *inbox, |
@@ -3768,6 +3787,10 @@ int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, | |||
3768 | if (err) | 3787 | if (err) |
3769 | goto ex_detach; | 3788 | goto ex_detach; |
3770 | } else { | 3789 | } else { |
3790 | err = mlx4_adjust_port(dev, slave, gid, prot); | ||
3791 | if (err) | ||
3792 | goto ex_put; | ||
3793 | |||
3771 | err = rem_mcg_res(dev, slave, rqp, gid, prot, type, ®_id); | 3794 | err = rem_mcg_res(dev, slave, rqp, gid, prot, type, ®_id); |
3772 | if (err) | 3795 | if (err) |
3773 | goto ex_put; | 3796 | goto ex_put; |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c index dbf75393f758..0bc914859e38 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c | |||
@@ -2374,6 +2374,14 @@ void qlcnic_set_drv_version(struct qlcnic_adapter *adapter) | |||
2374 | qlcnic_fw_cmd_set_drv_version(adapter, fw_cmd); | 2374 | qlcnic_fw_cmd_set_drv_version(adapter, fw_cmd); |
2375 | } | 2375 | } |
2376 | 2376 | ||
2377 | /* Reset firmware API lock */ | ||
2378 | static void qlcnic_reset_api_lock(struct qlcnic_adapter *adapter) | ||
2379 | { | ||
2380 | qlcnic_api_lock(adapter); | ||
2381 | qlcnic_api_unlock(adapter); | ||
2382 | } | ||
2383 | |||
2384 | |||
2377 | static int | 2385 | static int |
2378 | qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | 2386 | qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
2379 | { | 2387 | { |
@@ -2476,6 +2484,7 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
2476 | if (qlcnic_82xx_check(adapter)) { | 2484 | if (qlcnic_82xx_check(adapter)) { |
2477 | qlcnic_check_vf(adapter, ent); | 2485 | qlcnic_check_vf(adapter, ent); |
2478 | adapter->portnum = adapter->ahw->pci_func; | 2486 | adapter->portnum = adapter->ahw->pci_func; |
2487 | qlcnic_reset_api_lock(adapter); | ||
2479 | err = qlcnic_start_firmware(adapter); | 2488 | err = qlcnic_start_firmware(adapter); |
2480 | if (err) { | 2489 | if (err) { |
2481 | dev_err(&pdev->dev, "Loading fw failed.Please Reboot\n" | 2490 | dev_err(&pdev->dev, "Loading fw failed.Please Reboot\n" |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c index 0638c1810d54..6afe9c1f5ab9 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c | |||
@@ -1370,7 +1370,7 @@ static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter, | |||
1370 | 1370 | ||
1371 | rsp = qlcnic_sriov_alloc_bc_trans(&trans); | 1371 | rsp = qlcnic_sriov_alloc_bc_trans(&trans); |
1372 | if (rsp) | 1372 | if (rsp) |
1373 | return rsp; | 1373 | goto free_cmd; |
1374 | 1374 | ||
1375 | rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND); | 1375 | rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND); |
1376 | if (rsp) | 1376 | if (rsp) |
@@ -1425,6 +1425,13 @@ err_out: | |||
1425 | 1425 | ||
1426 | cleanup_transaction: | 1426 | cleanup_transaction: |
1427 | qlcnic_sriov_cleanup_transaction(trans); | 1427 | qlcnic_sriov_cleanup_transaction(trans); |
1428 | |||
1429 | free_cmd: | ||
1430 | if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT) { | ||
1431 | qlcnic_free_mbx_args(cmd); | ||
1432 | kfree(cmd); | ||
1433 | } | ||
1434 | |||
1428 | return rsp; | 1435 | return rsp; |
1429 | } | 1436 | } |
1430 | 1437 | ||
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h index 6203c7d8550f..45019649bbbd 100644 --- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h +++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h | |||
@@ -358,6 +358,8 @@ struct sxgbe_core_ops { | |||
358 | /* Enable disable checksum offload operations */ | 358 | /* Enable disable checksum offload operations */ |
359 | void (*enable_rx_csum)(void __iomem *ioaddr); | 359 | void (*enable_rx_csum)(void __iomem *ioaddr); |
360 | void (*disable_rx_csum)(void __iomem *ioaddr); | 360 | void (*disable_rx_csum)(void __iomem *ioaddr); |
361 | void (*enable_rxqueue)(void __iomem *ioaddr, int queue_num); | ||
362 | void (*disable_rxqueue)(void __iomem *ioaddr, int queue_num); | ||
361 | }; | 363 | }; |
362 | 364 | ||
363 | const struct sxgbe_core_ops *sxgbe_get_core_ops(void); | 365 | const struct sxgbe_core_ops *sxgbe_get_core_ops(void); |
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c index c4da7a2b002a..58c35692560e 100644 --- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c +++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c | |||
@@ -165,6 +165,26 @@ static void sxgbe_core_set_speed(void __iomem *ioaddr, unsigned char speed) | |||
165 | writel(tx_cfg, ioaddr + SXGBE_CORE_TX_CONFIG_REG); | 165 | writel(tx_cfg, ioaddr + SXGBE_CORE_TX_CONFIG_REG); |
166 | } | 166 | } |
167 | 167 | ||
168 | static void sxgbe_core_enable_rxqueue(void __iomem *ioaddr, int queue_num) | ||
169 | { | ||
170 | u32 reg_val; | ||
171 | |||
172 | reg_val = readl(ioaddr + SXGBE_CORE_RX_CTL0_REG); | ||
173 | reg_val &= ~(SXGBE_CORE_RXQ_ENABLE_MASK << queue_num); | ||
174 | reg_val |= SXGBE_CORE_RXQ_ENABLE; | ||
175 | writel(reg_val, ioaddr + SXGBE_CORE_RX_CTL0_REG); | ||
176 | } | ||
177 | |||
178 | static void sxgbe_core_disable_rxqueue(void __iomem *ioaddr, int queue_num) | ||
179 | { | ||
180 | u32 reg_val; | ||
181 | |||
182 | reg_val = readl(ioaddr + SXGBE_CORE_RX_CTL0_REG); | ||
183 | reg_val &= ~(SXGBE_CORE_RXQ_ENABLE_MASK << queue_num); | ||
184 | reg_val |= SXGBE_CORE_RXQ_DISABLE; | ||
185 | writel(reg_val, ioaddr + SXGBE_CORE_RX_CTL0_REG); | ||
186 | } | ||
187 | |||
168 | static void sxgbe_set_eee_mode(void __iomem *ioaddr) | 188 | static void sxgbe_set_eee_mode(void __iomem *ioaddr) |
169 | { | 189 | { |
170 | u32 ctrl; | 190 | u32 ctrl; |
@@ -254,6 +274,8 @@ static const struct sxgbe_core_ops core_ops = { | |||
254 | .set_eee_pls = sxgbe_set_eee_pls, | 274 | .set_eee_pls = sxgbe_set_eee_pls, |
255 | .enable_rx_csum = sxgbe_enable_rx_csum, | 275 | .enable_rx_csum = sxgbe_enable_rx_csum, |
256 | .disable_rx_csum = sxgbe_disable_rx_csum, | 276 | .disable_rx_csum = sxgbe_disable_rx_csum, |
277 | .enable_rxqueue = sxgbe_core_enable_rxqueue, | ||
278 | .disable_rxqueue = sxgbe_core_disable_rxqueue, | ||
257 | }; | 279 | }; |
258 | 280 | ||
259 | const struct sxgbe_core_ops *sxgbe_get_core_ops(void) | 281 | const struct sxgbe_core_ops *sxgbe_get_core_ops(void) |
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c index e896dbbd2e15..2686bb5b6765 100644 --- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c +++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c | |||
@@ -45,10 +45,10 @@ static void sxgbe_prepare_tx_desc(struct sxgbe_tx_norm_desc *p, u8 is_fd, | |||
45 | p->tdes23.tx_rd_des23.first_desc = is_fd; | 45 | p->tdes23.tx_rd_des23.first_desc = is_fd; |
46 | p->tdes23.tx_rd_des23.buf1_size = buf1_len; | 46 | p->tdes23.tx_rd_des23.buf1_size = buf1_len; |
47 | 47 | ||
48 | p->tdes23.tx_rd_des23.tx_pkt_len.cksum_pktlen.total_pkt_len = pkt_len; | 48 | p->tdes23.tx_rd_des23.tx_pkt_len.pkt_len.total_pkt_len = pkt_len; |
49 | 49 | ||
50 | if (cksum) | 50 | if (cksum) |
51 | p->tdes23.tx_rd_des23.tx_pkt_len.cksum_pktlen.cksum_ctl = cic_full; | 51 | p->tdes23.tx_rd_des23.cksum_ctl = cic_full; |
52 | } | 52 | } |
53 | 53 | ||
54 | /* Set VLAN control information */ | 54 | /* Set VLAN control information */ |
@@ -233,6 +233,12 @@ static void sxgbe_set_rx_owner(struct sxgbe_rx_norm_desc *p) | |||
233 | p->rdes23.rx_rd_des23.own_bit = 1; | 233 | p->rdes23.rx_rd_des23.own_bit = 1; |
234 | } | 234 | } |
235 | 235 | ||
236 | /* Set Interrupt on completion bit */ | ||
237 | static void sxgbe_set_rx_int_on_com(struct sxgbe_rx_norm_desc *p) | ||
238 | { | ||
239 | p->rdes23.rx_rd_des23.int_on_com = 1; | ||
240 | } | ||
241 | |||
236 | /* Get the receive frame size */ | 242 | /* Get the receive frame size */ |
237 | static int sxgbe_get_rx_frame_len(struct sxgbe_rx_norm_desc *p) | 243 | static int sxgbe_get_rx_frame_len(struct sxgbe_rx_norm_desc *p) |
238 | { | 244 | { |
@@ -498,6 +504,7 @@ static const struct sxgbe_desc_ops desc_ops = { | |||
498 | .init_rx_desc = sxgbe_init_rx_desc, | 504 | .init_rx_desc = sxgbe_init_rx_desc, |
499 | .get_rx_owner = sxgbe_get_rx_owner, | 505 | .get_rx_owner = sxgbe_get_rx_owner, |
500 | .set_rx_owner = sxgbe_set_rx_owner, | 506 | .set_rx_owner = sxgbe_set_rx_owner, |
507 | .set_rx_int_on_com = sxgbe_set_rx_int_on_com, | ||
501 | .get_rx_frame_len = sxgbe_get_rx_frame_len, | 508 | .get_rx_frame_len = sxgbe_get_rx_frame_len, |
502 | .get_rx_fd_status = sxgbe_get_rx_fd_status, | 509 | .get_rx_fd_status = sxgbe_get_rx_fd_status, |
503 | .get_rx_ld_status = sxgbe_get_rx_ld_status, | 510 | .get_rx_ld_status = sxgbe_get_rx_ld_status, |
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h index 838cb9fb0ea9..18609324db72 100644 --- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h +++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h | |||
@@ -39,22 +39,22 @@ struct sxgbe_tx_norm_desc { | |||
39 | u32 int_on_com:1; | 39 | u32 int_on_com:1; |
40 | /* TDES3 */ | 40 | /* TDES3 */ |
41 | union { | 41 | union { |
42 | u32 tcp_payload_len:18; | 42 | u16 tcp_payload_len; |
43 | struct { | 43 | struct { |
44 | u32 total_pkt_len:15; | 44 | u32 total_pkt_len:15; |
45 | u32 reserved1:1; | 45 | u32 reserved1:1; |
46 | u32 cksum_ctl:2; | 46 | } pkt_len; |
47 | } cksum_pktlen; | ||
48 | } tx_pkt_len; | 47 | } tx_pkt_len; |
49 | 48 | ||
50 | u32 tse_bit:1; | 49 | u16 cksum_ctl:2; |
51 | u32 tcp_hdr_len:4; | 50 | u16 tse_bit:1; |
52 | u32 sa_insert_ctl:3; | 51 | u16 tcp_hdr_len:4; |
53 | u32 crc_pad_ctl:2; | 52 | u16 sa_insert_ctl:3; |
54 | u32 last_desc:1; | 53 | u16 crc_pad_ctl:2; |
55 | u32 first_desc:1; | 54 | u16 last_desc:1; |
56 | u32 ctxt_bit:1; | 55 | u16 first_desc:1; |
57 | u32 own_bit:1; | 56 | u16 ctxt_bit:1; |
57 | u16 own_bit:1; | ||
58 | } tx_rd_des23; | 58 | } tx_rd_des23; |
59 | 59 | ||
60 | /* tx write back Desc 2,3 */ | 60 | /* tx write back Desc 2,3 */ |
@@ -70,25 +70,20 @@ struct sxgbe_tx_norm_desc { | |||
70 | 70 | ||
71 | struct sxgbe_rx_norm_desc { | 71 | struct sxgbe_rx_norm_desc { |
72 | union { | 72 | union { |
73 | u32 rdes0; /* buf1 address */ | 73 | u64 rdes01; /* buf1 address */ |
74 | struct { | 74 | union { |
75 | u32 out_vlan_tag:16; | 75 | u32 out_vlan_tag:16; |
76 | u32 in_vlan_tag:16; | 76 | u32 in_vlan_tag:16; |
77 | } wb_rx_des0; | 77 | u32 rss_hash; |
78 | } rd_wb_des0; | 78 | } rx_wb_des01; |
79 | 79 | } rdes01; | |
80 | union { | ||
81 | u32 rdes1; /* buf2 address or buf1[63:32] */ | ||
82 | u32 rss_hash; /* Write-back RX */ | ||
83 | } rd_wb_des1; | ||
84 | 80 | ||
85 | union { | 81 | union { |
86 | /* RX Read format Desc 2,3 */ | 82 | /* RX Read format Desc 2,3 */ |
87 | struct{ | 83 | struct{ |
88 | /* RDES2 */ | 84 | /* RDES2 */ |
89 | u32 buf2_addr; | 85 | u64 buf2_addr:62; |
90 | /* RDES3 */ | 86 | /* RDES3 */ |
91 | u32 buf2_hi_addr:30; | ||
92 | u32 int_on_com:1; | 87 | u32 int_on_com:1; |
93 | u32 own_bit:1; | 88 | u32 own_bit:1; |
94 | } rx_rd_des23; | 89 | } rx_rd_des23; |
@@ -263,6 +258,9 @@ struct sxgbe_desc_ops { | |||
263 | /* Set own bit */ | 258 | /* Set own bit */ |
264 | void (*set_rx_owner)(struct sxgbe_rx_norm_desc *p); | 259 | void (*set_rx_owner)(struct sxgbe_rx_norm_desc *p); |
265 | 260 | ||
261 | /* Set Interrupt on completion bit */ | ||
262 | void (*set_rx_int_on_com)(struct sxgbe_rx_norm_desc *p); | ||
263 | |||
266 | /* Get the receive frame size */ | 264 | /* Get the receive frame size */ |
267 | int (*get_rx_frame_len)(struct sxgbe_rx_norm_desc *p); | 265 | int (*get_rx_frame_len)(struct sxgbe_rx_norm_desc *p); |
268 | 266 | ||
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c index 4d989ff6c978..bb9b5b8afc5f 100644 --- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c +++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c | |||
@@ -23,21 +23,8 @@ | |||
23 | /* DMA core initialization */ | 23 | /* DMA core initialization */ |
24 | static int sxgbe_dma_init(void __iomem *ioaddr, int fix_burst, int burst_map) | 24 | static int sxgbe_dma_init(void __iomem *ioaddr, int fix_burst, int burst_map) |
25 | { | 25 | { |
26 | int retry_count = 10; | ||
27 | u32 reg_val; | 26 | u32 reg_val; |
28 | 27 | ||
29 | /* reset the DMA */ | ||
30 | writel(SXGBE_DMA_SOFT_RESET, ioaddr + SXGBE_DMA_MODE_REG); | ||
31 | while (retry_count--) { | ||
32 | if (!(readl(ioaddr + SXGBE_DMA_MODE_REG) & | ||
33 | SXGBE_DMA_SOFT_RESET)) | ||
34 | break; | ||
35 | mdelay(10); | ||
36 | } | ||
37 | |||
38 | if (retry_count < 0) | ||
39 | return -EBUSY; | ||
40 | |||
41 | reg_val = readl(ioaddr + SXGBE_DMA_SYSBUS_MODE_REG); | 28 | reg_val = readl(ioaddr + SXGBE_DMA_SYSBUS_MODE_REG); |
42 | 29 | ||
43 | /* if fix_burst = 0, Set UNDEF = 1 of DMA_Sys_Mode Register. | 30 | /* if fix_burst = 0, Set UNDEF = 1 of DMA_Sys_Mode Register. |
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c index 27e8c824b204..82a9a983869f 100644 --- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c +++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c | |||
@@ -1076,6 +1076,9 @@ static int sxgbe_open(struct net_device *dev) | |||
1076 | 1076 | ||
1077 | /* Initialize the MAC Core */ | 1077 | /* Initialize the MAC Core */ |
1078 | priv->hw->mac->core_init(priv->ioaddr); | 1078 | priv->hw->mac->core_init(priv->ioaddr); |
1079 | SXGBE_FOR_EACH_QUEUE(SXGBE_RX_QUEUES, queue_num) { | ||
1080 | priv->hw->mac->enable_rxqueue(priv->ioaddr, queue_num); | ||
1081 | } | ||
1079 | 1082 | ||
1080 | /* Request the IRQ lines */ | 1083 | /* Request the IRQ lines */ |
1081 | ret = devm_request_irq(priv->device, priv->irq, sxgbe_common_interrupt, | 1084 | ret = devm_request_irq(priv->device, priv->irq, sxgbe_common_interrupt, |
@@ -1453,6 +1456,7 @@ static void sxgbe_rx_refill(struct sxgbe_priv_data *priv) | |||
1453 | /* Added memory barrier for RX descriptor modification */ | 1456 | /* Added memory barrier for RX descriptor modification */ |
1454 | wmb(); | 1457 | wmb(); |
1455 | priv->hw->desc->set_rx_owner(p); | 1458 | priv->hw->desc->set_rx_owner(p); |
1459 | priv->hw->desc->set_rx_int_on_com(p); | ||
1456 | /* Added memory barrier for RX descriptor modification */ | 1460 | /* Added memory barrier for RX descriptor modification */ |
1457 | wmb(); | 1461 | wmb(); |
1458 | } | 1462 | } |
@@ -2070,6 +2074,24 @@ static int sxgbe_hw_init(struct sxgbe_priv_data * const priv) | |||
2070 | return 0; | 2074 | return 0; |
2071 | } | 2075 | } |
2072 | 2076 | ||
2077 | static int sxgbe_sw_reset(void __iomem *addr) | ||
2078 | { | ||
2079 | int retry_count = 10; | ||
2080 | |||
2081 | writel(SXGBE_DMA_SOFT_RESET, addr + SXGBE_DMA_MODE_REG); | ||
2082 | while (retry_count--) { | ||
2083 | if (!(readl(addr + SXGBE_DMA_MODE_REG) & | ||
2084 | SXGBE_DMA_SOFT_RESET)) | ||
2085 | break; | ||
2086 | mdelay(10); | ||
2087 | } | ||
2088 | |||
2089 | if (retry_count < 0) | ||
2090 | return -EBUSY; | ||
2091 | |||
2092 | return 0; | ||
2093 | } | ||
2094 | |||
2073 | /** | 2095 | /** |
2074 | * sxgbe_drv_probe | 2096 | * sxgbe_drv_probe |
2075 | * @device: device pointer | 2097 | * @device: device pointer |
@@ -2102,6 +2124,10 @@ struct sxgbe_priv_data *sxgbe_drv_probe(struct device *device, | |||
2102 | priv->plat = plat_dat; | 2124 | priv->plat = plat_dat; |
2103 | priv->ioaddr = addr; | 2125 | priv->ioaddr = addr; |
2104 | 2126 | ||
2127 | ret = sxgbe_sw_reset(priv->ioaddr); | ||
2128 | if (ret) | ||
2129 | goto error_free_netdev; | ||
2130 | |||
2105 | /* Verify driver arguments */ | 2131 | /* Verify driver arguments */ |
2106 | sxgbe_verify_args(); | 2132 | sxgbe_verify_args(); |
2107 | 2133 | ||
@@ -2218,9 +2244,14 @@ error_free_netdev: | |||
2218 | int sxgbe_drv_remove(struct net_device *ndev) | 2244 | int sxgbe_drv_remove(struct net_device *ndev) |
2219 | { | 2245 | { |
2220 | struct sxgbe_priv_data *priv = netdev_priv(ndev); | 2246 | struct sxgbe_priv_data *priv = netdev_priv(ndev); |
2247 | u8 queue_num; | ||
2221 | 2248 | ||
2222 | netdev_info(ndev, "%s: removing driver\n", __func__); | 2249 | netdev_info(ndev, "%s: removing driver\n", __func__); |
2223 | 2250 | ||
2251 | SXGBE_FOR_EACH_QUEUE(SXGBE_RX_QUEUES, queue_num) { | ||
2252 | priv->hw->mac->disable_rxqueue(priv->ioaddr, queue_num); | ||
2253 | } | ||
2254 | |||
2224 | priv->hw->dma->stop_rx(priv->ioaddr, SXGBE_RX_QUEUES); | 2255 | priv->hw->dma->stop_rx(priv->ioaddr, SXGBE_RX_QUEUES); |
2225 | priv->hw->dma->stop_tx(priv->ioaddr, SXGBE_TX_QUEUES); | 2256 | priv->hw->dma->stop_tx(priv->ioaddr, SXGBE_TX_QUEUES); |
2226 | 2257 | ||
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c index 01af2cbb479d..43ccb4a6de15 100644 --- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c +++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c | |||
@@ -27,7 +27,7 @@ | |||
27 | #define SXGBE_SMA_PREAD_CMD 0x02 /* post read increament address */ | 27 | #define SXGBE_SMA_PREAD_CMD 0x02 /* post read increament address */ |
28 | #define SXGBE_SMA_READ_CMD 0x03 /* read command */ | 28 | #define SXGBE_SMA_READ_CMD 0x03 /* read command */ |
29 | #define SXGBE_SMA_SKIP_ADDRFRM 0x00040000 /* skip the address frame */ | 29 | #define SXGBE_SMA_SKIP_ADDRFRM 0x00040000 /* skip the address frame */ |
30 | #define SXGBE_MII_BUSY 0x00800000 /* mii busy */ | 30 | #define SXGBE_MII_BUSY 0x00400000 /* mii busy */ |
31 | 31 | ||
32 | static int sxgbe_mdio_busy_wait(void __iomem *ioaddr, unsigned int mii_data) | 32 | static int sxgbe_mdio_busy_wait(void __iomem *ioaddr, unsigned int mii_data) |
33 | { | 33 | { |
@@ -147,6 +147,7 @@ int sxgbe_mdio_register(struct net_device *ndev) | |||
147 | struct sxgbe_mdio_bus_data *mdio_data = priv->plat->mdio_bus_data; | 147 | struct sxgbe_mdio_bus_data *mdio_data = priv->plat->mdio_bus_data; |
148 | int err, phy_addr; | 148 | int err, phy_addr; |
149 | int *irqlist; | 149 | int *irqlist; |
150 | bool phy_found = false; | ||
150 | bool act; | 151 | bool act; |
151 | 152 | ||
152 | /* allocate the new mdio bus */ | 153 | /* allocate the new mdio bus */ |
@@ -162,7 +163,7 @@ int sxgbe_mdio_register(struct net_device *ndev) | |||
162 | irqlist = priv->mii_irq; | 163 | irqlist = priv->mii_irq; |
163 | 164 | ||
164 | /* assign mii bus fields */ | 165 | /* assign mii bus fields */ |
165 | mdio_bus->name = "samsxgbe"; | 166 | mdio_bus->name = "sxgbe"; |
166 | mdio_bus->read = &sxgbe_mdio_read; | 167 | mdio_bus->read = &sxgbe_mdio_read; |
167 | mdio_bus->write = &sxgbe_mdio_write; | 168 | mdio_bus->write = &sxgbe_mdio_write; |
168 | snprintf(mdio_bus->id, MII_BUS_ID_SIZE, "%s-%x", | 169 | snprintf(mdio_bus->id, MII_BUS_ID_SIZE, "%s-%x", |
@@ -216,13 +217,22 @@ int sxgbe_mdio_register(struct net_device *ndev) | |||
216 | netdev_info(ndev, "PHY ID %08x at %d IRQ %s (%s)%s\n", | 217 | netdev_info(ndev, "PHY ID %08x at %d IRQ %s (%s)%s\n", |
217 | phy->phy_id, phy_addr, irq_str, | 218 | phy->phy_id, phy_addr, irq_str, |
218 | dev_name(&phy->dev), act ? " active" : ""); | 219 | dev_name(&phy->dev), act ? " active" : ""); |
220 | phy_found = true; | ||
219 | } | 221 | } |
220 | } | 222 | } |
221 | 223 | ||
224 | if (!phy_found) { | ||
225 | netdev_err(ndev, "PHY not found\n"); | ||
226 | goto phyfound_err; | ||
227 | } | ||
228 | |||
222 | priv->mii = mdio_bus; | 229 | priv->mii = mdio_bus; |
223 | 230 | ||
224 | return 0; | 231 | return 0; |
225 | 232 | ||
233 | phyfound_err: | ||
234 | err = -ENODEV; | ||
235 | mdiobus_unregister(mdio_bus); | ||
226 | mdiobus_err: | 236 | mdiobus_err: |
227 | mdiobus_free(mdio_bus); | 237 | mdiobus_free(mdio_bus); |
228 | return err; | 238 | return err; |
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h b/drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h index 5a89acb4c505..56f8bf5a3f1b 100644 --- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h +++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h | |||
@@ -52,6 +52,10 @@ | |||
52 | #define SXGBE_CORE_RX_CTL2_REG 0x00A8 | 52 | #define SXGBE_CORE_RX_CTL2_REG 0x00A8 |
53 | #define SXGBE_CORE_RX_CTL3_REG 0x00AC | 53 | #define SXGBE_CORE_RX_CTL3_REG 0x00AC |
54 | 54 | ||
55 | #define SXGBE_CORE_RXQ_ENABLE_MASK 0x0003 | ||
56 | #define SXGBE_CORE_RXQ_ENABLE 0x0002 | ||
57 | #define SXGBE_CORE_RXQ_DISABLE 0x0000 | ||
58 | |||
55 | /* Interrupt Registers */ | 59 | /* Interrupt Registers */ |
56 | #define SXGBE_CORE_INT_STATUS_REG 0x00B0 | 60 | #define SXGBE_CORE_INT_STATUS_REG 0x00B0 |
57 | #define SXGBE_CORE_INT_ENABLE_REG 0x00B4 | 61 | #define SXGBE_CORE_INT_ENABLE_REG 0x00B4 |
diff --git a/drivers/net/ethernet/smsc/smc91x.c b/drivers/net/ethernet/smsc/smc91x.c index d1b4dca53a9d..bcaa41af1e62 100644 --- a/drivers/net/ethernet/smsc/smc91x.c +++ b/drivers/net/ethernet/smsc/smc91x.c | |||
@@ -147,18 +147,19 @@ MODULE_ALIAS("platform:smc91x"); | |||
147 | */ | 147 | */ |
148 | #define MII_DELAY 1 | 148 | #define MII_DELAY 1 |
149 | 149 | ||
150 | #if SMC_DEBUG > 0 | 150 | #define DBG(n, dev, fmt, ...) \ |
151 | #define DBG(n, dev, args...) \ | 151 | do { \ |
152 | do { \ | 152 | if (SMC_DEBUG >= (n)) \ |
153 | if (SMC_DEBUG >= (n)) \ | 153 | netdev_dbg(dev, fmt, ##__VA_ARGS__); \ |
154 | netdev_dbg(dev, args); \ | ||
155 | } while (0) | 154 | } while (0) |
156 | 155 | ||
157 | #define PRINTK(dev, args...) netdev_info(dev, args) | 156 | #define PRINTK(dev, fmt, ...) \ |
158 | #else | 157 | do { \ |
159 | #define DBG(n, dev, args...) do { } while (0) | 158 | if (SMC_DEBUG > 0) \ |
160 | #define PRINTK(dev, args...) netdev_dbg(dev, args) | 159 | netdev_info(dev, fmt, ##__VA_ARGS__); \ |
161 | #endif | 160 | else \ |
161 | netdev_dbg(dev, fmt, ##__VA_ARGS__); \ | ||
162 | } while (0) | ||
162 | 163 | ||
163 | #if SMC_DEBUG > 3 | 164 | #if SMC_DEBUG > 3 |
164 | static void PRINT_PKT(u_char *buf, int length) | 165 | static void PRINT_PKT(u_char *buf, int length) |
@@ -191,7 +192,7 @@ static void PRINT_PKT(u_char *buf, int length) | |||
191 | pr_cont("\n"); | 192 | pr_cont("\n"); |
192 | } | 193 | } |
193 | #else | 194 | #else |
194 | #define PRINT_PKT(x...) do { } while (0) | 195 | static inline void PRINT_PKT(u_char *buf, int length) { } |
195 | #endif | 196 | #endif |
196 | 197 | ||
197 | 198 | ||
@@ -1781,7 +1782,7 @@ static int smc_findirq(struct smc_local *lp) | |||
1781 | int timeout = 20; | 1782 | int timeout = 20; |
1782 | unsigned long cookie; | 1783 | unsigned long cookie; |
1783 | 1784 | ||
1784 | DBG(2, dev, "%s: %s\n", CARDNAME, __func__); | 1785 | DBG(2, lp->dev, "%s: %s\n", CARDNAME, __func__); |
1785 | 1786 | ||
1786 | cookie = probe_irq_on(); | 1787 | cookie = probe_irq_on(); |
1787 | 1788 | ||