diff options
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r-- | drivers/net/ethernet/intel/e1000/e1000_hw.c | 124 |
1 files changed, 0 insertions, 124 deletions
diff --git a/drivers/net/ethernet/intel/e1000/e1000_hw.c b/drivers/net/ethernet/intel/e1000/e1000_hw.c index 2879b9631e15..c1d3fdb296a0 100644 --- a/drivers/net/ethernet/intel/e1000/e1000_hw.c +++ b/drivers/net/ethernet/intel/e1000/e1000_hw.c | |||
@@ -115,8 +115,6 @@ static DEFINE_SPINLOCK(e1000_phy_lock); | |||
115 | */ | 115 | */ |
116 | static s32 e1000_set_phy_type(struct e1000_hw *hw) | 116 | static s32 e1000_set_phy_type(struct e1000_hw *hw) |
117 | { | 117 | { |
118 | e_dbg("e1000_set_phy_type"); | ||
119 | |||
120 | if (hw->mac_type == e1000_undefined) | 118 | if (hw->mac_type == e1000_undefined) |
121 | return -E1000_ERR_PHY_TYPE; | 119 | return -E1000_ERR_PHY_TYPE; |
122 | 120 | ||
@@ -159,8 +157,6 @@ static void e1000_phy_init_script(struct e1000_hw *hw) | |||
159 | u32 ret_val; | 157 | u32 ret_val; |
160 | u16 phy_saved_data; | 158 | u16 phy_saved_data; |
161 | 159 | ||
162 | e_dbg("e1000_phy_init_script"); | ||
163 | |||
164 | if (hw->phy_init_script) { | 160 | if (hw->phy_init_script) { |
165 | msleep(20); | 161 | msleep(20); |
166 | 162 | ||
@@ -253,8 +249,6 @@ static void e1000_phy_init_script(struct e1000_hw *hw) | |||
253 | */ | 249 | */ |
254 | s32 e1000_set_mac_type(struct e1000_hw *hw) | 250 | s32 e1000_set_mac_type(struct e1000_hw *hw) |
255 | { | 251 | { |
256 | e_dbg("e1000_set_mac_type"); | ||
257 | |||
258 | switch (hw->device_id) { | 252 | switch (hw->device_id) { |
259 | case E1000_DEV_ID_82542: | 253 | case E1000_DEV_ID_82542: |
260 | switch (hw->revision_id) { | 254 | switch (hw->revision_id) { |
@@ -365,8 +359,6 @@ void e1000_set_media_type(struct e1000_hw *hw) | |||
365 | { | 359 | { |
366 | u32 status; | 360 | u32 status; |
367 | 361 | ||
368 | e_dbg("e1000_set_media_type"); | ||
369 | |||
370 | if (hw->mac_type != e1000_82543) { | 362 | if (hw->mac_type != e1000_82543) { |
371 | /* tbi_compatibility is only valid on 82543 */ | 363 | /* tbi_compatibility is only valid on 82543 */ |
372 | hw->tbi_compatibility_en = false; | 364 | hw->tbi_compatibility_en = false; |
@@ -415,8 +407,6 @@ s32 e1000_reset_hw(struct e1000_hw *hw) | |||
415 | u32 led_ctrl; | 407 | u32 led_ctrl; |
416 | s32 ret_val; | 408 | s32 ret_val; |
417 | 409 | ||
418 | e_dbg("e1000_reset_hw"); | ||
419 | |||
420 | /* For 82542 (rev 2.0), disable MWI before issuing a device reset */ | 410 | /* For 82542 (rev 2.0), disable MWI before issuing a device reset */ |
421 | if (hw->mac_type == e1000_82542_rev2_0) { | 411 | if (hw->mac_type == e1000_82542_rev2_0) { |
422 | e_dbg("Disabling MWI on 82542 rev 2.0\n"); | 412 | e_dbg("Disabling MWI on 82542 rev 2.0\n"); |
@@ -566,8 +556,6 @@ s32 e1000_init_hw(struct e1000_hw *hw) | |||
566 | u32 mta_size; | 556 | u32 mta_size; |
567 | u32 ctrl_ext; | 557 | u32 ctrl_ext; |
568 | 558 | ||
569 | e_dbg("e1000_init_hw"); | ||
570 | |||
571 | /* Initialize Identification LED */ | 559 | /* Initialize Identification LED */ |
572 | ret_val = e1000_id_led_init(hw); | 560 | ret_val = e1000_id_led_init(hw); |
573 | if (ret_val) { | 561 | if (ret_val) { |
@@ -683,8 +671,6 @@ static s32 e1000_adjust_serdes_amplitude(struct e1000_hw *hw) | |||
683 | u16 eeprom_data; | 671 | u16 eeprom_data; |
684 | s32 ret_val; | 672 | s32 ret_val; |
685 | 673 | ||
686 | e_dbg("e1000_adjust_serdes_amplitude"); | ||
687 | |||
688 | if (hw->media_type != e1000_media_type_internal_serdes) | 674 | if (hw->media_type != e1000_media_type_internal_serdes) |
689 | return E1000_SUCCESS; | 675 | return E1000_SUCCESS; |
690 | 676 | ||
@@ -730,8 +716,6 @@ s32 e1000_setup_link(struct e1000_hw *hw) | |||
730 | s32 ret_val; | 716 | s32 ret_val; |
731 | u16 eeprom_data; | 717 | u16 eeprom_data; |
732 | 718 | ||
733 | e_dbg("e1000_setup_link"); | ||
734 | |||
735 | /* Read and store word 0x0F of the EEPROM. This word contains bits | 719 | /* Read and store word 0x0F of the EEPROM. This word contains bits |
736 | * that determine the hardware's default PAUSE (flow control) mode, | 720 | * that determine the hardware's default PAUSE (flow control) mode, |
737 | * a bit that determines whether the HW defaults to enabling or | 721 | * a bit that determines whether the HW defaults to enabling or |
@@ -848,8 +832,6 @@ static s32 e1000_setup_fiber_serdes_link(struct e1000_hw *hw) | |||
848 | u32 signal = 0; | 832 | u32 signal = 0; |
849 | s32 ret_val; | 833 | s32 ret_val; |
850 | 834 | ||
851 | e_dbg("e1000_setup_fiber_serdes_link"); | ||
852 | |||
853 | /* On adapters with a MAC newer than 82544, SWDP 1 will be | 835 | /* On adapters with a MAC newer than 82544, SWDP 1 will be |
854 | * set when the optics detect a signal. On older adapters, it will be | 836 | * set when the optics detect a signal. On older adapters, it will be |
855 | * cleared when there is a signal. This applies to fiber media only. | 837 | * cleared when there is a signal. This applies to fiber media only. |
@@ -1051,8 +1033,6 @@ static s32 e1000_copper_link_preconfig(struct e1000_hw *hw) | |||
1051 | s32 ret_val; | 1033 | s32 ret_val; |
1052 | u16 phy_data; | 1034 | u16 phy_data; |
1053 | 1035 | ||
1054 | e_dbg("e1000_copper_link_preconfig"); | ||
1055 | |||
1056 | ctrl = er32(CTRL); | 1036 | ctrl = er32(CTRL); |
1057 | /* With 82543, we need to force speed and duplex on the MAC equal to | 1037 | /* With 82543, we need to force speed and duplex on the MAC equal to |
1058 | * what the PHY speed and duplex configuration is. In addition, we need | 1038 | * what the PHY speed and duplex configuration is. In addition, we need |
@@ -1112,8 +1092,6 @@ static s32 e1000_copper_link_igp_setup(struct e1000_hw *hw) | |||
1112 | s32 ret_val; | 1092 | s32 ret_val; |
1113 | u16 phy_data; | 1093 | u16 phy_data; |
1114 | 1094 | ||
1115 | e_dbg("e1000_copper_link_igp_setup"); | ||
1116 | |||
1117 | if (hw->phy_reset_disable) | 1095 | if (hw->phy_reset_disable) |
1118 | return E1000_SUCCESS; | 1096 | return E1000_SUCCESS; |
1119 | 1097 | ||
@@ -1254,8 +1232,6 @@ static s32 e1000_copper_link_mgp_setup(struct e1000_hw *hw) | |||
1254 | s32 ret_val; | 1232 | s32 ret_val; |
1255 | u16 phy_data; | 1233 | u16 phy_data; |
1256 | 1234 | ||
1257 | e_dbg("e1000_copper_link_mgp_setup"); | ||
1258 | |||
1259 | if (hw->phy_reset_disable) | 1235 | if (hw->phy_reset_disable) |
1260 | return E1000_SUCCESS; | 1236 | return E1000_SUCCESS; |
1261 | 1237 | ||
@@ -1362,8 +1338,6 @@ static s32 e1000_copper_link_autoneg(struct e1000_hw *hw) | |||
1362 | s32 ret_val; | 1338 | s32 ret_val; |
1363 | u16 phy_data; | 1339 | u16 phy_data; |
1364 | 1340 | ||
1365 | e_dbg("e1000_copper_link_autoneg"); | ||
1366 | |||
1367 | /* Perform some bounds checking on the hw->autoneg_advertised | 1341 | /* Perform some bounds checking on the hw->autoneg_advertised |
1368 | * parameter. If this variable is zero, then set it to the default. | 1342 | * parameter. If this variable is zero, then set it to the default. |
1369 | */ | 1343 | */ |
@@ -1432,7 +1406,6 @@ static s32 e1000_copper_link_autoneg(struct e1000_hw *hw) | |||
1432 | static s32 e1000_copper_link_postconfig(struct e1000_hw *hw) | 1406 | static s32 e1000_copper_link_postconfig(struct e1000_hw *hw) |
1433 | { | 1407 | { |
1434 | s32 ret_val; | 1408 | s32 ret_val; |
1435 | e_dbg("e1000_copper_link_postconfig"); | ||
1436 | 1409 | ||
1437 | if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100)) { | 1410 | if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100)) { |
1438 | e1000_config_collision_dist(hw); | 1411 | e1000_config_collision_dist(hw); |
@@ -1473,8 +1446,6 @@ static s32 e1000_setup_copper_link(struct e1000_hw *hw) | |||
1473 | u16 i; | 1446 | u16 i; |
1474 | u16 phy_data; | 1447 | u16 phy_data; |
1475 | 1448 | ||
1476 | e_dbg("e1000_setup_copper_link"); | ||
1477 | |||
1478 | /* Check if it is a valid PHY and set PHY mode if necessary. */ | 1449 | /* Check if it is a valid PHY and set PHY mode if necessary. */ |
1479 | ret_val = e1000_copper_link_preconfig(hw); | 1450 | ret_val = e1000_copper_link_preconfig(hw); |
1480 | if (ret_val) | 1451 | if (ret_val) |
@@ -1554,8 +1525,6 @@ s32 e1000_phy_setup_autoneg(struct e1000_hw *hw) | |||
1554 | u16 mii_autoneg_adv_reg; | 1525 | u16 mii_autoneg_adv_reg; |
1555 | u16 mii_1000t_ctrl_reg; | 1526 | u16 mii_1000t_ctrl_reg; |
1556 | 1527 | ||
1557 | e_dbg("e1000_phy_setup_autoneg"); | ||
1558 | |||
1559 | /* Read the MII Auto-Neg Advertisement Register (Address 4). */ | 1528 | /* Read the MII Auto-Neg Advertisement Register (Address 4). */ |
1560 | ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg); | 1529 | ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg); |
1561 | if (ret_val) | 1530 | if (ret_val) |
@@ -1707,8 +1676,6 @@ static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw) | |||
1707 | u16 phy_data; | 1676 | u16 phy_data; |
1708 | u16 i; | 1677 | u16 i; |
1709 | 1678 | ||
1710 | e_dbg("e1000_phy_force_speed_duplex"); | ||
1711 | |||
1712 | /* Turn off Flow control if we are forcing speed and duplex. */ | 1679 | /* Turn off Flow control if we are forcing speed and duplex. */ |
1713 | hw->fc = E1000_FC_NONE; | 1680 | hw->fc = E1000_FC_NONE; |
1714 | 1681 | ||
@@ -1939,8 +1906,6 @@ void e1000_config_collision_dist(struct e1000_hw *hw) | |||
1939 | { | 1906 | { |
1940 | u32 tctl, coll_dist; | 1907 | u32 tctl, coll_dist; |
1941 | 1908 | ||
1942 | e_dbg("e1000_config_collision_dist"); | ||
1943 | |||
1944 | if (hw->mac_type < e1000_82543) | 1909 | if (hw->mac_type < e1000_82543) |
1945 | coll_dist = E1000_COLLISION_DISTANCE_82542; | 1910 | coll_dist = E1000_COLLISION_DISTANCE_82542; |
1946 | else | 1911 | else |
@@ -1970,8 +1935,6 @@ static s32 e1000_config_mac_to_phy(struct e1000_hw *hw) | |||
1970 | s32 ret_val; | 1935 | s32 ret_val; |
1971 | u16 phy_data; | 1936 | u16 phy_data; |
1972 | 1937 | ||
1973 | e_dbg("e1000_config_mac_to_phy"); | ||
1974 | |||
1975 | /* 82544 or newer MAC, Auto Speed Detection takes care of | 1938 | /* 82544 or newer MAC, Auto Speed Detection takes care of |
1976 | * MAC speed/duplex configuration. | 1939 | * MAC speed/duplex configuration. |
1977 | */ | 1940 | */ |
@@ -2049,8 +2012,6 @@ s32 e1000_force_mac_fc(struct e1000_hw *hw) | |||
2049 | { | 2012 | { |
2050 | u32 ctrl; | 2013 | u32 ctrl; |
2051 | 2014 | ||
2052 | e_dbg("e1000_force_mac_fc"); | ||
2053 | |||
2054 | /* Get the current configuration of the Device Control Register */ | 2015 | /* Get the current configuration of the Device Control Register */ |
2055 | ctrl = er32(CTRL); | 2016 | ctrl = er32(CTRL); |
2056 | 2017 | ||
@@ -2120,8 +2081,6 @@ static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2120 | u16 speed; | 2081 | u16 speed; |
2121 | u16 duplex; | 2082 | u16 duplex; |
2122 | 2083 | ||
2123 | e_dbg("e1000_config_fc_after_link_up"); | ||
2124 | |||
2125 | /* Check for the case where we have fiber media and auto-neg failed | 2084 | /* Check for the case where we have fiber media and auto-neg failed |
2126 | * so we had to force link. In this case, we need to force the | 2085 | * so we had to force link. In this case, we need to force the |
2127 | * configuration of the MAC to match the "fc" parameter. | 2086 | * configuration of the MAC to match the "fc" parameter. |
@@ -2337,8 +2296,6 @@ static s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw) | |||
2337 | u32 status; | 2296 | u32 status; |
2338 | s32 ret_val = E1000_SUCCESS; | 2297 | s32 ret_val = E1000_SUCCESS; |
2339 | 2298 | ||
2340 | e_dbg("e1000_check_for_serdes_link_generic"); | ||
2341 | |||
2342 | ctrl = er32(CTRL); | 2299 | ctrl = er32(CTRL); |
2343 | status = er32(STATUS); | 2300 | status = er32(STATUS); |
2344 | rxcw = er32(RXCW); | 2301 | rxcw = er32(RXCW); |
@@ -2449,8 +2406,6 @@ s32 e1000_check_for_link(struct e1000_hw *hw) | |||
2449 | s32 ret_val; | 2406 | s32 ret_val; |
2450 | u16 phy_data; | 2407 | u16 phy_data; |
2451 | 2408 | ||
2452 | e_dbg("e1000_check_for_link"); | ||
2453 | |||
2454 | ctrl = er32(CTRL); | 2409 | ctrl = er32(CTRL); |
2455 | status = er32(STATUS); | 2410 | status = er32(STATUS); |
2456 | 2411 | ||
@@ -2632,8 +2587,6 @@ s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex) | |||
2632 | s32 ret_val; | 2587 | s32 ret_val; |
2633 | u16 phy_data; | 2588 | u16 phy_data; |
2634 | 2589 | ||
2635 | e_dbg("e1000_get_speed_and_duplex"); | ||
2636 | |||
2637 | if (hw->mac_type >= e1000_82543) { | 2590 | if (hw->mac_type >= e1000_82543) { |
2638 | status = er32(STATUS); | 2591 | status = er32(STATUS); |
2639 | if (status & E1000_STATUS_SPEED_1000) { | 2592 | if (status & E1000_STATUS_SPEED_1000) { |
@@ -2699,7 +2652,6 @@ static s32 e1000_wait_autoneg(struct e1000_hw *hw) | |||
2699 | u16 i; | 2652 | u16 i; |
2700 | u16 phy_data; | 2653 | u16 phy_data; |
2701 | 2654 | ||
2702 | e_dbg("e1000_wait_autoneg"); | ||
2703 | e_dbg("Waiting for Auto-Neg to complete.\n"); | 2655 | e_dbg("Waiting for Auto-Neg to complete.\n"); |
2704 | 2656 | ||
2705 | /* We will wait for autoneg to complete or 4.5 seconds to expire. */ | 2657 | /* We will wait for autoneg to complete or 4.5 seconds to expire. */ |
@@ -2866,8 +2818,6 @@ s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data) | |||
2866 | u32 ret_val; | 2818 | u32 ret_val; |
2867 | unsigned long flags; | 2819 | unsigned long flags; |
2868 | 2820 | ||
2869 | e_dbg("e1000_read_phy_reg"); | ||
2870 | |||
2871 | spin_lock_irqsave(&e1000_phy_lock, flags); | 2821 | spin_lock_irqsave(&e1000_phy_lock, flags); |
2872 | 2822 | ||
2873 | if ((hw->phy_type == e1000_phy_igp) && | 2823 | if ((hw->phy_type == e1000_phy_igp) && |
@@ -2894,8 +2844,6 @@ static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr, | |||
2894 | u32 mdic = 0; | 2844 | u32 mdic = 0; |
2895 | const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1; | 2845 | const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1; |
2896 | 2846 | ||
2897 | e_dbg("e1000_read_phy_reg_ex"); | ||
2898 | |||
2899 | if (reg_addr > MAX_PHY_REG_ADDRESS) { | 2847 | if (reg_addr > MAX_PHY_REG_ADDRESS) { |
2900 | e_dbg("PHY Address %d is out of range\n", reg_addr); | 2848 | e_dbg("PHY Address %d is out of range\n", reg_addr); |
2901 | return -E1000_ERR_PARAM; | 2849 | return -E1000_ERR_PARAM; |
@@ -3008,8 +2956,6 @@ s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 phy_data) | |||
3008 | u32 ret_val; | 2956 | u32 ret_val; |
3009 | unsigned long flags; | 2957 | unsigned long flags; |
3010 | 2958 | ||
3011 | e_dbg("e1000_write_phy_reg"); | ||
3012 | |||
3013 | spin_lock_irqsave(&e1000_phy_lock, flags); | 2959 | spin_lock_irqsave(&e1000_phy_lock, flags); |
3014 | 2960 | ||
3015 | if ((hw->phy_type == e1000_phy_igp) && | 2961 | if ((hw->phy_type == e1000_phy_igp) && |
@@ -3036,8 +2982,6 @@ static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr, | |||
3036 | u32 mdic = 0; | 2982 | u32 mdic = 0; |
3037 | const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1; | 2983 | const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1; |
3038 | 2984 | ||
3039 | e_dbg("e1000_write_phy_reg_ex"); | ||
3040 | |||
3041 | if (reg_addr > MAX_PHY_REG_ADDRESS) { | 2985 | if (reg_addr > MAX_PHY_REG_ADDRESS) { |
3042 | e_dbg("PHY Address %d is out of range\n", reg_addr); | 2986 | e_dbg("PHY Address %d is out of range\n", reg_addr); |
3043 | return -E1000_ERR_PARAM; | 2987 | return -E1000_ERR_PARAM; |
@@ -3129,8 +3073,6 @@ s32 e1000_phy_hw_reset(struct e1000_hw *hw) | |||
3129 | u32 ctrl, ctrl_ext; | 3073 | u32 ctrl, ctrl_ext; |
3130 | u32 led_ctrl; | 3074 | u32 led_ctrl; |
3131 | 3075 | ||
3132 | e_dbg("e1000_phy_hw_reset"); | ||
3133 | |||
3134 | e_dbg("Resetting Phy...\n"); | 3076 | e_dbg("Resetting Phy...\n"); |
3135 | 3077 | ||
3136 | if (hw->mac_type > e1000_82543) { | 3078 | if (hw->mac_type > e1000_82543) { |
@@ -3189,8 +3131,6 @@ s32 e1000_phy_reset(struct e1000_hw *hw) | |||
3189 | s32 ret_val; | 3131 | s32 ret_val; |
3190 | u16 phy_data; | 3132 | u16 phy_data; |
3191 | 3133 | ||
3192 | e_dbg("e1000_phy_reset"); | ||
3193 | |||
3194 | switch (hw->phy_type) { | 3134 | switch (hw->phy_type) { |
3195 | case e1000_phy_igp: | 3135 | case e1000_phy_igp: |
3196 | ret_val = e1000_phy_hw_reset(hw); | 3136 | ret_val = e1000_phy_hw_reset(hw); |
@@ -3229,8 +3169,6 @@ static s32 e1000_detect_gig_phy(struct e1000_hw *hw) | |||
3229 | u16 phy_id_high, phy_id_low; | 3169 | u16 phy_id_high, phy_id_low; |
3230 | bool match = false; | 3170 | bool match = false; |
3231 | 3171 | ||
3232 | e_dbg("e1000_detect_gig_phy"); | ||
3233 | |||
3234 | if (hw->phy_id != 0) | 3172 | if (hw->phy_id != 0) |
3235 | return E1000_SUCCESS; | 3173 | return E1000_SUCCESS; |
3236 | 3174 | ||
@@ -3301,7 +3239,6 @@ static s32 e1000_detect_gig_phy(struct e1000_hw *hw) | |||
3301 | static s32 e1000_phy_reset_dsp(struct e1000_hw *hw) | 3239 | static s32 e1000_phy_reset_dsp(struct e1000_hw *hw) |
3302 | { | 3240 | { |
3303 | s32 ret_val; | 3241 | s32 ret_val; |
3304 | e_dbg("e1000_phy_reset_dsp"); | ||
3305 | 3242 | ||
3306 | do { | 3243 | do { |
3307 | ret_val = e1000_write_phy_reg(hw, 29, 0x001d); | 3244 | ret_val = e1000_write_phy_reg(hw, 29, 0x001d); |
@@ -3333,8 +3270,6 @@ static s32 e1000_phy_igp_get_info(struct e1000_hw *hw, | |||
3333 | u16 phy_data, min_length, max_length, average; | 3270 | u16 phy_data, min_length, max_length, average; |
3334 | e1000_rev_polarity polarity; | 3271 | e1000_rev_polarity polarity; |
3335 | 3272 | ||
3336 | e_dbg("e1000_phy_igp_get_info"); | ||
3337 | |||
3338 | /* The downshift status is checked only once, after link is established, | 3273 | /* The downshift status is checked only once, after link is established, |
3339 | * and it stored in the hw->speed_downgraded parameter. | 3274 | * and it stored in the hw->speed_downgraded parameter. |
3340 | */ | 3275 | */ |
@@ -3414,8 +3349,6 @@ static s32 e1000_phy_m88_get_info(struct e1000_hw *hw, | |||
3414 | u16 phy_data; | 3349 | u16 phy_data; |
3415 | e1000_rev_polarity polarity; | 3350 | e1000_rev_polarity polarity; |
3416 | 3351 | ||
3417 | e_dbg("e1000_phy_m88_get_info"); | ||
3418 | |||
3419 | /* The downshift status is checked only once, after link is established, | 3352 | /* The downshift status is checked only once, after link is established, |
3420 | * and it stored in the hw->speed_downgraded parameter. | 3353 | * and it stored in the hw->speed_downgraded parameter. |
3421 | */ | 3354 | */ |
@@ -3487,8 +3420,6 @@ s32 e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info) | |||
3487 | s32 ret_val; | 3420 | s32 ret_val; |
3488 | u16 phy_data; | 3421 | u16 phy_data; |
3489 | 3422 | ||
3490 | e_dbg("e1000_phy_get_info"); | ||
3491 | |||
3492 | phy_info->cable_length = e1000_cable_length_undefined; | 3423 | phy_info->cable_length = e1000_cable_length_undefined; |
3493 | phy_info->extended_10bt_distance = e1000_10bt_ext_dist_enable_undefined; | 3424 | phy_info->extended_10bt_distance = e1000_10bt_ext_dist_enable_undefined; |
3494 | phy_info->cable_polarity = e1000_rev_polarity_undefined; | 3425 | phy_info->cable_polarity = e1000_rev_polarity_undefined; |
@@ -3527,8 +3458,6 @@ s32 e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info) | |||
3527 | 3458 | ||
3528 | s32 e1000_validate_mdi_setting(struct e1000_hw *hw) | 3459 | s32 e1000_validate_mdi_setting(struct e1000_hw *hw) |
3529 | { | 3460 | { |
3530 | e_dbg("e1000_validate_mdi_settings"); | ||
3531 | |||
3532 | if (!hw->autoneg && (hw->mdix == 0 || hw->mdix == 3)) { | 3461 | if (!hw->autoneg && (hw->mdix == 0 || hw->mdix == 3)) { |
3533 | e_dbg("Invalid MDI setting detected\n"); | 3462 | e_dbg("Invalid MDI setting detected\n"); |
3534 | hw->mdix = 1; | 3463 | hw->mdix = 1; |
@@ -3551,8 +3480,6 @@ s32 e1000_init_eeprom_params(struct e1000_hw *hw) | |||
3551 | s32 ret_val = E1000_SUCCESS; | 3480 | s32 ret_val = E1000_SUCCESS; |
3552 | u16 eeprom_size; | 3481 | u16 eeprom_size; |
3553 | 3482 | ||
3554 | e_dbg("e1000_init_eeprom_params"); | ||
3555 | |||
3556 | switch (hw->mac_type) { | 3483 | switch (hw->mac_type) { |
3557 | case e1000_82542_rev2_0: | 3484 | case e1000_82542_rev2_0: |
3558 | case e1000_82542_rev2_1: | 3485 | case e1000_82542_rev2_1: |
@@ -3770,8 +3697,6 @@ static s32 e1000_acquire_eeprom(struct e1000_hw *hw) | |||
3770 | struct e1000_eeprom_info *eeprom = &hw->eeprom; | 3697 | struct e1000_eeprom_info *eeprom = &hw->eeprom; |
3771 | u32 eecd, i = 0; | 3698 | u32 eecd, i = 0; |
3772 | 3699 | ||
3773 | e_dbg("e1000_acquire_eeprom"); | ||
3774 | |||
3775 | eecd = er32(EECD); | 3700 | eecd = er32(EECD); |
3776 | 3701 | ||
3777 | /* Request EEPROM Access */ | 3702 | /* Request EEPROM Access */ |
@@ -3871,8 +3796,6 @@ static void e1000_release_eeprom(struct e1000_hw *hw) | |||
3871 | { | 3796 | { |
3872 | u32 eecd; | 3797 | u32 eecd; |
3873 | 3798 | ||
3874 | e_dbg("e1000_release_eeprom"); | ||
3875 | |||
3876 | eecd = er32(EECD); | 3799 | eecd = er32(EECD); |
3877 | 3800 | ||
3878 | if (hw->eeprom.type == e1000_eeprom_spi) { | 3801 | if (hw->eeprom.type == e1000_eeprom_spi) { |
@@ -3920,8 +3843,6 @@ static s32 e1000_spi_eeprom_ready(struct e1000_hw *hw) | |||
3920 | u16 retry_count = 0; | 3843 | u16 retry_count = 0; |
3921 | u8 spi_stat_reg; | 3844 | u8 spi_stat_reg; |
3922 | 3845 | ||
3923 | e_dbg("e1000_spi_eeprom_ready"); | ||
3924 | |||
3925 | /* Read "Status Register" repeatedly until the LSB is cleared. The | 3846 | /* Read "Status Register" repeatedly until the LSB is cleared. The |
3926 | * EEPROM will signal that the command has been completed by clearing | 3847 | * EEPROM will signal that the command has been completed by clearing |
3927 | * bit 0 of the internal status register. If it's not cleared within | 3848 | * bit 0 of the internal status register. If it's not cleared within |
@@ -3974,8 +3895,6 @@ static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words, | |||
3974 | struct e1000_eeprom_info *eeprom = &hw->eeprom; | 3895 | struct e1000_eeprom_info *eeprom = &hw->eeprom; |
3975 | u32 i = 0; | 3896 | u32 i = 0; |
3976 | 3897 | ||
3977 | e_dbg("e1000_read_eeprom"); | ||
3978 | |||
3979 | if (hw->mac_type == e1000_ce4100) { | 3898 | if (hw->mac_type == e1000_ce4100) { |
3980 | GBE_CONFIG_FLASH_READ(GBE_CONFIG_BASE_VIRT, offset, words, | 3899 | GBE_CONFIG_FLASH_READ(GBE_CONFIG_BASE_VIRT, offset, words, |
3981 | data); | 3900 | data); |
@@ -4076,8 +3995,6 @@ s32 e1000_validate_eeprom_checksum(struct e1000_hw *hw) | |||
4076 | u16 checksum = 0; | 3995 | u16 checksum = 0; |
4077 | u16 i, eeprom_data; | 3996 | u16 i, eeprom_data; |
4078 | 3997 | ||
4079 | e_dbg("e1000_validate_eeprom_checksum"); | ||
4080 | |||
4081 | for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) { | 3998 | for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) { |
4082 | if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) { | 3999 | if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) { |
4083 | e_dbg("EEPROM Read Error\n"); | 4000 | e_dbg("EEPROM Read Error\n"); |
@@ -4112,8 +4029,6 @@ s32 e1000_update_eeprom_checksum(struct e1000_hw *hw) | |||
4112 | u16 checksum = 0; | 4029 | u16 checksum = 0; |
4113 | u16 i, eeprom_data; | 4030 | u16 i, eeprom_data; |
4114 | 4031 | ||
4115 | e_dbg("e1000_update_eeprom_checksum"); | ||
4116 | |||
4117 | for (i = 0; i < EEPROM_CHECKSUM_REG; i++) { | 4032 | for (i = 0; i < EEPROM_CHECKSUM_REG; i++) { |
4118 | if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) { | 4033 | if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) { |
4119 | e_dbg("EEPROM Read Error\n"); | 4034 | e_dbg("EEPROM Read Error\n"); |
@@ -4154,8 +4069,6 @@ static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words, | |||
4154 | struct e1000_eeprom_info *eeprom = &hw->eeprom; | 4069 | struct e1000_eeprom_info *eeprom = &hw->eeprom; |
4155 | s32 status = 0; | 4070 | s32 status = 0; |
4156 | 4071 | ||
4157 | e_dbg("e1000_write_eeprom"); | ||
4158 | |||
4159 | if (hw->mac_type == e1000_ce4100) { | 4072 | if (hw->mac_type == e1000_ce4100) { |
4160 | GBE_CONFIG_FLASH_WRITE(GBE_CONFIG_BASE_VIRT, offset, words, | 4073 | GBE_CONFIG_FLASH_WRITE(GBE_CONFIG_BASE_VIRT, offset, words, |
4161 | data); | 4074 | data); |
@@ -4205,8 +4118,6 @@ static s32 e1000_write_eeprom_spi(struct e1000_hw *hw, u16 offset, u16 words, | |||
4205 | struct e1000_eeprom_info *eeprom = &hw->eeprom; | 4118 | struct e1000_eeprom_info *eeprom = &hw->eeprom; |
4206 | u16 widx = 0; | 4119 | u16 widx = 0; |
4207 | 4120 | ||
4208 | e_dbg("e1000_write_eeprom_spi"); | ||
4209 | |||
4210 | while (widx < words) { | 4121 | while (widx < words) { |
4211 | u8 write_opcode = EEPROM_WRITE_OPCODE_SPI; | 4122 | u8 write_opcode = EEPROM_WRITE_OPCODE_SPI; |
4212 | 4123 | ||
@@ -4274,8 +4185,6 @@ static s32 e1000_write_eeprom_microwire(struct e1000_hw *hw, u16 offset, | |||
4274 | u16 words_written = 0; | 4185 | u16 words_written = 0; |
4275 | u16 i = 0; | 4186 | u16 i = 0; |
4276 | 4187 | ||
4277 | e_dbg("e1000_write_eeprom_microwire"); | ||
4278 | |||
4279 | /* Send the write enable command to the EEPROM (3-bit opcode plus | 4188 | /* Send the write enable command to the EEPROM (3-bit opcode plus |
4280 | * 6/8-bit dummy address beginning with 11). It's less work to include | 4189 | * 6/8-bit dummy address beginning with 11). It's less work to include |
4281 | * the 11 of the dummy address as part of the opcode than it is to shift | 4190 | * the 11 of the dummy address as part of the opcode than it is to shift |
@@ -4354,8 +4263,6 @@ s32 e1000_read_mac_addr(struct e1000_hw *hw) | |||
4354 | u16 offset; | 4263 | u16 offset; |
4355 | u16 eeprom_data, i; | 4264 | u16 eeprom_data, i; |
4356 | 4265 | ||
4357 | e_dbg("e1000_read_mac_addr"); | ||
4358 | |||
4359 | for (i = 0; i < NODE_ADDRESS_SIZE; i += 2) { | 4266 | for (i = 0; i < NODE_ADDRESS_SIZE; i += 2) { |
4360 | offset = i >> 1; | 4267 | offset = i >> 1; |
4361 | if (e1000_read_eeprom(hw, offset, 1, &eeprom_data) < 0) { | 4268 | if (e1000_read_eeprom(hw, offset, 1, &eeprom_data) < 0) { |
@@ -4394,8 +4301,6 @@ static void e1000_init_rx_addrs(struct e1000_hw *hw) | |||
4394 | u32 i; | 4301 | u32 i; |
4395 | u32 rar_num; | 4302 | u32 rar_num; |
4396 | 4303 | ||
4397 | e_dbg("e1000_init_rx_addrs"); | ||
4398 | |||
4399 | /* Setup the receive address. */ | 4304 | /* Setup the receive address. */ |
4400 | e_dbg("Programming MAC Address into RAR[0]\n"); | 4305 | e_dbg("Programming MAC Address into RAR[0]\n"); |
4401 | 4306 | ||
@@ -4553,8 +4458,6 @@ static s32 e1000_id_led_init(struct e1000_hw *hw) | |||
4553 | u16 eeprom_data, i, temp; | 4458 | u16 eeprom_data, i, temp; |
4554 | const u16 led_mask = 0x0F; | 4459 | const u16 led_mask = 0x0F; |
4555 | 4460 | ||
4556 | e_dbg("e1000_id_led_init"); | ||
4557 | |||
4558 | if (hw->mac_type < e1000_82540) { | 4461 | if (hw->mac_type < e1000_82540) { |
4559 | /* Nothing to do */ | 4462 | /* Nothing to do */ |
4560 | return E1000_SUCCESS; | 4463 | return E1000_SUCCESS; |
@@ -4626,8 +4529,6 @@ s32 e1000_setup_led(struct e1000_hw *hw) | |||
4626 | u32 ledctl; | 4529 | u32 ledctl; |
4627 | s32 ret_val = E1000_SUCCESS; | 4530 | s32 ret_val = E1000_SUCCESS; |
4628 | 4531 | ||
4629 | e_dbg("e1000_setup_led"); | ||
4630 | |||
4631 | switch (hw->mac_type) { | 4532 | switch (hw->mac_type) { |
4632 | case e1000_82542_rev2_0: | 4533 | case e1000_82542_rev2_0: |
4633 | case e1000_82542_rev2_1: | 4534 | case e1000_82542_rev2_1: |
@@ -4678,8 +4579,6 @@ s32 e1000_cleanup_led(struct e1000_hw *hw) | |||
4678 | { | 4579 | { |
4679 | s32 ret_val = E1000_SUCCESS; | 4580 | s32 ret_val = E1000_SUCCESS; |
4680 | 4581 | ||
4681 | e_dbg("e1000_cleanup_led"); | ||
4682 | |||
4683 | switch (hw->mac_type) { | 4582 | switch (hw->mac_type) { |
4684 | case e1000_82542_rev2_0: | 4583 | case e1000_82542_rev2_0: |
4685 | case e1000_82542_rev2_1: | 4584 | case e1000_82542_rev2_1: |
@@ -4714,8 +4613,6 @@ s32 e1000_led_on(struct e1000_hw *hw) | |||
4714 | { | 4613 | { |
4715 | u32 ctrl = er32(CTRL); | 4614 | u32 ctrl = er32(CTRL); |
4716 | 4615 | ||
4717 | e_dbg("e1000_led_on"); | ||
4718 | |||
4719 | switch (hw->mac_type) { | 4616 | switch (hw->mac_type) { |
4720 | case e1000_82542_rev2_0: | 4617 | case e1000_82542_rev2_0: |
4721 | case e1000_82542_rev2_1: | 4618 | case e1000_82542_rev2_1: |
@@ -4760,8 +4657,6 @@ s32 e1000_led_off(struct e1000_hw *hw) | |||
4760 | { | 4657 | { |
4761 | u32 ctrl = er32(CTRL); | 4658 | u32 ctrl = er32(CTRL); |
4762 | 4659 | ||
4763 | e_dbg("e1000_led_off"); | ||
4764 | |||
4765 | switch (hw->mac_type) { | 4660 | switch (hw->mac_type) { |
4766 | case e1000_82542_rev2_0: | 4661 | case e1000_82542_rev2_0: |
4767 | case e1000_82542_rev2_1: | 4662 | case e1000_82542_rev2_1: |
@@ -4889,8 +4784,6 @@ static void e1000_clear_hw_cntrs(struct e1000_hw *hw) | |||
4889 | */ | 4784 | */ |
4890 | void e1000_reset_adaptive(struct e1000_hw *hw) | 4785 | void e1000_reset_adaptive(struct e1000_hw *hw) |
4891 | { | 4786 | { |
4892 | e_dbg("e1000_reset_adaptive"); | ||
4893 | |||
4894 | if (hw->adaptive_ifs) { | 4787 | if (hw->adaptive_ifs) { |
4895 | if (!hw->ifs_params_forced) { | 4788 | if (!hw->ifs_params_forced) { |
4896 | hw->current_ifs_val = 0; | 4789 | hw->current_ifs_val = 0; |
@@ -4917,8 +4810,6 @@ void e1000_reset_adaptive(struct e1000_hw *hw) | |||
4917 | */ | 4810 | */ |
4918 | void e1000_update_adaptive(struct e1000_hw *hw) | 4811 | void e1000_update_adaptive(struct e1000_hw *hw) |
4919 | { | 4812 | { |
4920 | e_dbg("e1000_update_adaptive"); | ||
4921 | |||
4922 | if (hw->adaptive_ifs) { | 4813 | if (hw->adaptive_ifs) { |
4923 | if ((hw->collision_delta *hw->ifs_ratio) > hw->tx_packet_delta) { | 4814 | if ((hw->collision_delta *hw->ifs_ratio) > hw->tx_packet_delta) { |
4924 | if (hw->tx_packet_delta > MIN_NUM_XMITS) { | 4815 | if (hw->tx_packet_delta > MIN_NUM_XMITS) { |
@@ -5114,8 +5005,6 @@ static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length, | |||
5114 | u16 i, phy_data; | 5005 | u16 i, phy_data; |
5115 | u16 cable_length; | 5006 | u16 cable_length; |
5116 | 5007 | ||
5117 | e_dbg("e1000_get_cable_length"); | ||
5118 | |||
5119 | *min_length = *max_length = 0; | 5008 | *min_length = *max_length = 0; |
5120 | 5009 | ||
5121 | /* Use old method for Phy older than IGP */ | 5010 | /* Use old method for Phy older than IGP */ |
@@ -5231,8 +5120,6 @@ static s32 e1000_check_polarity(struct e1000_hw *hw, | |||
5231 | s32 ret_val; | 5120 | s32 ret_val; |
5232 | u16 phy_data; | 5121 | u16 phy_data; |
5233 | 5122 | ||
5234 | e_dbg("e1000_check_polarity"); | ||
5235 | |||
5236 | if (hw->phy_type == e1000_phy_m88) { | 5123 | if (hw->phy_type == e1000_phy_m88) { |
5237 | /* return the Polarity bit in the Status register. */ | 5124 | /* return the Polarity bit in the Status register. */ |
5238 | ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, | 5125 | ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, |
@@ -5299,8 +5186,6 @@ static s32 e1000_check_downshift(struct e1000_hw *hw) | |||
5299 | s32 ret_val; | 5186 | s32 ret_val; |
5300 | u16 phy_data; | 5187 | u16 phy_data; |
5301 | 5188 | ||
5302 | e_dbg("e1000_check_downshift"); | ||
5303 | |||
5304 | if (hw->phy_type == e1000_phy_igp) { | 5189 | if (hw->phy_type == e1000_phy_igp) { |
5305 | ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH, | 5190 | ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH, |
5306 | &phy_data); | 5191 | &phy_data); |
@@ -5411,8 +5296,6 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up) | |||
5411 | s32 ret_val; | 5296 | s32 ret_val; |
5412 | u16 phy_data, phy_saved_data, speed, duplex, i; | 5297 | u16 phy_data, phy_saved_data, speed, duplex, i; |
5413 | 5298 | ||
5414 | e_dbg("e1000_config_dsp_after_link_change"); | ||
5415 | |||
5416 | if (hw->phy_type != e1000_phy_igp) | 5299 | if (hw->phy_type != e1000_phy_igp) |
5417 | return E1000_SUCCESS; | 5300 | return E1000_SUCCESS; |
5418 | 5301 | ||
@@ -5546,8 +5429,6 @@ static s32 e1000_set_phy_mode(struct e1000_hw *hw) | |||
5546 | s32 ret_val; | 5429 | s32 ret_val; |
5547 | u16 eeprom_data; | 5430 | u16 eeprom_data; |
5548 | 5431 | ||
5549 | e_dbg("e1000_set_phy_mode"); | ||
5550 | |||
5551 | if ((hw->mac_type == e1000_82545_rev_3) && | 5432 | if ((hw->mac_type == e1000_82545_rev_3) && |
5552 | (hw->media_type == e1000_media_type_copper)) { | 5433 | (hw->media_type == e1000_media_type_copper)) { |
5553 | ret_val = | 5434 | ret_val = |
@@ -5594,7 +5475,6 @@ static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active) | |||
5594 | { | 5475 | { |
5595 | s32 ret_val; | 5476 | s32 ret_val; |
5596 | u16 phy_data; | 5477 | u16 phy_data; |
5597 | e_dbg("e1000_set_d3_lplu_state"); | ||
5598 | 5478 | ||
5599 | if (hw->phy_type != e1000_phy_igp) | 5479 | if (hw->phy_type != e1000_phy_igp) |
5600 | return E1000_SUCCESS; | 5480 | return E1000_SUCCESS; |
@@ -5699,8 +5579,6 @@ static s32 e1000_set_vco_speed(struct e1000_hw *hw) | |||
5699 | u16 default_page = 0; | 5579 | u16 default_page = 0; |
5700 | u16 phy_data; | 5580 | u16 phy_data; |
5701 | 5581 | ||
5702 | e_dbg("e1000_set_vco_speed"); | ||
5703 | |||
5704 | switch (hw->mac_type) { | 5582 | switch (hw->mac_type) { |
5705 | case e1000_82545_rev_3: | 5583 | case e1000_82545_rev_3: |
5706 | case e1000_82546_rev_3: | 5584 | case e1000_82546_rev_3: |
@@ -5872,7 +5750,6 @@ static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw) | |||
5872 | */ | 5750 | */ |
5873 | static s32 e1000_get_auto_rd_done(struct e1000_hw *hw) | 5751 | static s32 e1000_get_auto_rd_done(struct e1000_hw *hw) |
5874 | { | 5752 | { |
5875 | e_dbg("e1000_get_auto_rd_done"); | ||
5876 | msleep(5); | 5753 | msleep(5); |
5877 | return E1000_SUCCESS; | 5754 | return E1000_SUCCESS; |
5878 | } | 5755 | } |
@@ -5887,7 +5764,6 @@ static s32 e1000_get_auto_rd_done(struct e1000_hw *hw) | |||
5887 | */ | 5764 | */ |
5888 | static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw) | 5765 | static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw) |
5889 | { | 5766 | { |
5890 | e_dbg("e1000_get_phy_cfg_done"); | ||
5891 | msleep(10); | 5767 | msleep(10); |
5892 | return E1000_SUCCESS; | 5768 | return E1000_SUCCESS; |
5893 | } | 5769 | } |