diff options
Diffstat (limited to 'drivers/net/ethernet/smsc/smc91x.h')
-rw-r--r-- | drivers/net/ethernet/smsc/smc91x.h | 114 |
1 files changed, 3 insertions, 111 deletions
diff --git a/drivers/net/ethernet/smsc/smc91x.h b/drivers/net/ethernet/smsc/smc91x.h index be67baf5f677..3a18501d1068 100644 --- a/drivers/net/ethernet/smsc/smc91x.h +++ b/drivers/net/ethernet/smsc/smc91x.h | |||
@@ -39,14 +39,7 @@ | |||
39 | * Define your architecture specific bus configuration parameters here. | 39 | * Define your architecture specific bus configuration parameters here. |
40 | */ | 40 | */ |
41 | 41 | ||
42 | #if defined(CONFIG_ARCH_LUBBOCK) ||\ | 42 | #if defined(CONFIG_ARM) |
43 | defined(CONFIG_MACH_MAINSTONE) ||\ | ||
44 | defined(CONFIG_MACH_ZYLONITE) ||\ | ||
45 | defined(CONFIG_MACH_LITTLETON) ||\ | ||
46 | defined(CONFIG_MACH_ZYLONITE2) ||\ | ||
47 | defined(CONFIG_ARCH_VIPER) ||\ | ||
48 | defined(CONFIG_MACH_STARGATE2) ||\ | ||
49 | defined(CONFIG_ARCH_VERSATILE) | ||
50 | 43 | ||
51 | #include <asm/mach-types.h> | 44 | #include <asm/mach-types.h> |
52 | 45 | ||
@@ -74,95 +67,8 @@ | |||
74 | /* We actually can't write halfwords properly if not word aligned */ | 67 | /* We actually can't write halfwords properly if not word aligned */ |
75 | static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg) | 68 | static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg) |
76 | { | 69 | { |
77 | if ((machine_is_mainstone() || machine_is_stargate2()) && reg & 2) { | 70 | if ((machine_is_mainstone() || machine_is_stargate2() || |
78 | unsigned int v = val << 16; | 71 | machine_is_pxa_idp()) && reg & 2) { |
79 | v |= readl(ioaddr + (reg & ~2)) & 0xffff; | ||
80 | writel(v, ioaddr + (reg & ~2)); | ||
81 | } else { | ||
82 | writew(val, ioaddr + reg); | ||
83 | } | ||
84 | } | ||
85 | |||
86 | #elif defined(CONFIG_SA1100_PLEB) | ||
87 | /* We can only do 16-bit reads and writes in the static memory space. */ | ||
88 | #define SMC_CAN_USE_8BIT 1 | ||
89 | #define SMC_CAN_USE_16BIT 1 | ||
90 | #define SMC_CAN_USE_32BIT 0 | ||
91 | #define SMC_IO_SHIFT 0 | ||
92 | #define SMC_NOWAIT 1 | ||
93 | |||
94 | #define SMC_inb(a, r) readb((a) + (r)) | ||
95 | #define SMC_insb(a, r, p, l) readsb((a) + (r), p, (l)) | ||
96 | #define SMC_inw(a, r) readw((a) + (r)) | ||
97 | #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) | ||
98 | #define SMC_outb(v, a, r) writeb(v, (a) + (r)) | ||
99 | #define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l)) | ||
100 | #define SMC_outw(v, a, r) writew(v, (a) + (r)) | ||
101 | #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) | ||
102 | |||
103 | #define SMC_IRQ_FLAGS (-1) | ||
104 | |||
105 | #elif defined(CONFIG_SA1100_ASSABET) | ||
106 | |||
107 | #include <mach/neponset.h> | ||
108 | |||
109 | /* We can only do 8-bit reads and writes in the static memory space. */ | ||
110 | #define SMC_CAN_USE_8BIT 1 | ||
111 | #define SMC_CAN_USE_16BIT 0 | ||
112 | #define SMC_CAN_USE_32BIT 0 | ||
113 | #define SMC_NOWAIT 1 | ||
114 | |||
115 | /* The first two address lines aren't connected... */ | ||
116 | #define SMC_IO_SHIFT 2 | ||
117 | |||
118 | #define SMC_inb(a, r) readb((a) + (r)) | ||
119 | #define SMC_outb(v, a, r) writeb(v, (a) + (r)) | ||
120 | #define SMC_insb(a, r, p, l) readsb((a) + (r), p, (l)) | ||
121 | #define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l)) | ||
122 | #define SMC_IRQ_FLAGS (-1) /* from resource */ | ||
123 | |||
124 | #elif defined(CONFIG_MACH_LOGICPD_PXA270) || \ | ||
125 | defined(CONFIG_MACH_NOMADIK_8815NHK) | ||
126 | |||
127 | #define SMC_CAN_USE_8BIT 0 | ||
128 | #define SMC_CAN_USE_16BIT 1 | ||
129 | #define SMC_CAN_USE_32BIT 0 | ||
130 | #define SMC_IO_SHIFT 0 | ||
131 | #define SMC_NOWAIT 1 | ||
132 | |||
133 | #define SMC_inw(a, r) readw((a) + (r)) | ||
134 | #define SMC_outw(v, a, r) writew(v, (a) + (r)) | ||
135 | #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) | ||
136 | #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) | ||
137 | |||
138 | #elif defined(CONFIG_ARCH_INNOKOM) || \ | ||
139 | defined(CONFIG_ARCH_PXA_IDP) || \ | ||
140 | defined(CONFIG_ARCH_RAMSES) || \ | ||
141 | defined(CONFIG_ARCH_PCM027) | ||
142 | |||
143 | #define SMC_CAN_USE_8BIT 1 | ||
144 | #define SMC_CAN_USE_16BIT 1 | ||
145 | #define SMC_CAN_USE_32BIT 1 | ||
146 | #define SMC_IO_SHIFT 0 | ||
147 | #define SMC_NOWAIT 1 | ||
148 | #define SMC_USE_PXA_DMA 1 | ||
149 | |||
150 | #define SMC_inb(a, r) readb((a) + (r)) | ||
151 | #define SMC_inw(a, r) readw((a) + (r)) | ||
152 | #define SMC_inl(a, r) readl((a) + (r)) | ||
153 | #define SMC_outb(v, a, r) writeb(v, (a) + (r)) | ||
154 | #define SMC_outl(v, a, r) writel(v, (a) + (r)) | ||
155 | #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l) | ||
156 | #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) | ||
157 | #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) | ||
158 | #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) | ||
159 | #define SMC_IRQ_FLAGS (-1) /* from resource */ | ||
160 | |||
161 | /* We actually can't write halfwords properly if not word aligned */ | ||
162 | static inline void | ||
163 | SMC_outw(u16 val, void __iomem *ioaddr, int reg) | ||
164 | { | ||
165 | if (reg & 2) { | ||
166 | unsigned int v = val << 16; | 72 | unsigned int v = val << 16; |
167 | v |= readl(ioaddr + (reg & ~2)) & 0xffff; | 73 | v |= readl(ioaddr + (reg & ~2)) & 0xffff; |
168 | writel(v, ioaddr + (reg & ~2)); | 74 | writel(v, ioaddr + (reg & ~2)); |
@@ -237,20 +143,6 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg) | |||
237 | #define RPC_LSA_DEFAULT RPC_LED_100_10 | 143 | #define RPC_LSA_DEFAULT RPC_LED_100_10 |
238 | #define RPC_LSB_DEFAULT RPC_LED_TX_RX | 144 | #define RPC_LSB_DEFAULT RPC_LED_TX_RX |
239 | 145 | ||
240 | #elif defined(CONFIG_ARCH_MSM) | ||
241 | |||
242 | #define SMC_CAN_USE_8BIT 0 | ||
243 | #define SMC_CAN_USE_16BIT 1 | ||
244 | #define SMC_CAN_USE_32BIT 0 | ||
245 | #define SMC_NOWAIT 1 | ||
246 | |||
247 | #define SMC_inw(a, r) readw((a) + (r)) | ||
248 | #define SMC_outw(v, a, r) writew(v, (a) + (r)) | ||
249 | #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) | ||
250 | #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) | ||
251 | |||
252 | #define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH | ||
253 | |||
254 | #elif defined(CONFIG_COLDFIRE) | 146 | #elif defined(CONFIG_COLDFIRE) |
255 | 147 | ||
256 | #define SMC_CAN_USE_8BIT 0 | 148 | #define SMC_CAN_USE_8BIT 0 |