1 files changed, 17 insertions, 10 deletions

diff --git a/drivers/net/ethernet/sfc/ef10.c b/drivers/net/ethernet/sfc/ef10.c
index 174a92f5fe51..21c20ea0dad0 100644
--- a/drivers/net/ethernet/sfc/ef10.c
+++ b/drivers/net/ethernet/sfc/ef10.c
@@ -162,8 +162,8 @@ static int efx_ef10_get_mac_address(struct efx_nic *efx, u8 *mac_address)
         if (outlen < MC_CMD_GET_MAC_ADDRESSES_OUT_LEN)
                 return -EIO;
 
-        memcpy(mac_address,
-               MCDI_PTR(outbuf, GET_MAC_ADDRESSES_OUT_MAC_ADDR_BASE), ETH_ALEN);
+        ether_addr_copy(mac_address,
+                        MCDI_PTR(outbuf, GET_MAC_ADDRESSES_OUT_MAC_ADDR_BASE));
         return 0;
 }
 
@@ -172,8 +172,8 @@ static int efx_ef10_probe(struct efx_nic *efx)
         struct efx_ef10_nic_data *nic_data;
         int i, rc;
 
-        /* We can have one VI for each 8K region.  However we need
-         * multiple TX queues per channel.
+        /* We can have one VI for each 8K region.  However, until we
+         * use TX option descriptors we need two TX queues per channel.
          */
         efx->max_channels =
                 min_t(unsigned int,
@@ -565,10 +565,17 @@ static int efx_ef10_dimension_resources(struct efx_nic *efx)
          * several of each (in fact that's the only option if host
          * page size is >4K).  So we may allocate some extra VIs just
          * for writing PIO buffers through.
+         *
+         * The UC mapping contains (min_vis - 1) complete VIs and the
+         * first half of the next VI.  Then the WC mapping begins with
+         * the second half of this last VI.
          */
         uc_mem_map_size = PAGE_ALIGN((min_vis - 1) * EFX_VI_PAGE_SIZE +
                                      ER_DZ_TX_PIOBUF);
         if (nic_data->n_piobufs) {
+                /* pio_write_vi_base rounds down to give the number of complete
+                 * VIs inside the UC mapping.
+                 */
                 pio_write_vi_base = uc_mem_map_size / EFX_VI_PAGE_SIZE;
                 wc_mem_map_size = (PAGE_ALIGN((pio_write_vi_base +
                                                nic_data->n_piobufs) *
@@ -1955,6 +1962,9 @@ static int efx_ef10_ev_process(struct efx_channel *channel, int quota)
         int tx_descs = 0;
         int spent = 0;
 
+        if (quota <= 0)
+                return spent;
+
         read_ptr = channel->eventq_read_ptr;
 
         for (;;) {
@@ -3145,12 +3155,10 @@ static void efx_ef10_filter_sync_rx_mode(struct efx_nic *efx)
                 table->dev_uc_count = -1;
         } else {
                 table->dev_uc_count = 1 + netdev_uc_count(net_dev);
-                memcpy(table->dev_uc_list[0].addr, net_dev->dev_addr,
-                       ETH_ALEN);
+                ether_addr_copy(table->dev_uc_list[0].addr, net_dev->dev_addr);
                 i = 1;
                 netdev_for_each_uc_addr(uc, net_dev) {
-                        memcpy(table->dev_uc_list[i].addr,
-                               uc->addr, ETH_ALEN);
+                        ether_addr_copy(table->dev_uc_list[i].addr, uc->addr);
                         i++;
                 }
         }
@@ -3162,8 +3170,7 @@ static void efx_ef10_filter_sync_rx_mode(struct efx_nic *efx)
                 eth_broadcast_addr(table->dev_mc_list[0].addr);
                 i = 1;
                 netdev_for_each_mc_addr(mc, net_dev) {
-                        memcpy(table->dev_mc_list[i].addr,
-                               mc->addr, ETH_ALEN);
+                        ether_addr_copy(table->dev_mc_list[i].addr, mc->addr);
                         i++;
                 }
         }