diff options
Diffstat (limited to 'drivers/net/ethernet/intel/i40evf')
-rw-r--r-- | drivers/net/ethernet/intel/i40evf/i40e_adminq.c | 6 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/i40evf/i40e_adminq.h | 36 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/i40evf/i40e_type.h | 58 |
3 files changed, 94 insertions, 6 deletions
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq.c b/drivers/net/ethernet/intel/i40evf/i40e_adminq.c index 8330744b02f1..ee3a934043bb 100644 --- a/drivers/net/ethernet/intel/i40evf/i40e_adminq.c +++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq.c | |||
@@ -708,12 +708,6 @@ i40e_status i40evf_asq_send_command(struct i40e_hw *hw, | |||
708 | goto asq_send_command_exit; | 708 | goto asq_send_command_exit; |
709 | } | 709 | } |
710 | 710 | ||
711 | if (i40e_is_nvm_update_op(desc) && hw->aq.nvm_busy) { | ||
712 | i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, "AQTX: NVM busy.\n"); | ||
713 | status = I40E_ERR_NVM; | ||
714 | goto asq_send_command_exit; | ||
715 | } | ||
716 | |||
717 | details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); | 711 | details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); |
718 | if (cmd_details) { | 712 | if (cmd_details) { |
719 | *details = *cmd_details; | 713 | *details = *cmd_details; |
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq.h b/drivers/net/ethernet/intel/i40evf/i40e_adminq.h index 162845589bf7..91a5c5bd80f3 100644 --- a/drivers/net/ethernet/intel/i40evf/i40e_adminq.h +++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq.h | |||
@@ -94,6 +94,7 @@ struct i40e_adminq_info { | |||
94 | u16 api_maj_ver; /* api major version */ | 94 | u16 api_maj_ver; /* api major version */ |
95 | u16 api_min_ver; /* api minor version */ | 95 | u16 api_min_ver; /* api minor version */ |
96 | bool nvm_busy; | 96 | bool nvm_busy; |
97 | bool nvm_release_on_done; | ||
97 | 98 | ||
98 | struct mutex asq_mutex; /* Send queue lock */ | 99 | struct mutex asq_mutex; /* Send queue lock */ |
99 | struct mutex arq_mutex; /* Receive queue lock */ | 100 | struct mutex arq_mutex; /* Receive queue lock */ |
@@ -103,6 +104,41 @@ struct i40e_adminq_info { | |||
103 | enum i40e_admin_queue_err arq_last_status; | 104 | enum i40e_admin_queue_err arq_last_status; |
104 | }; | 105 | }; |
105 | 106 | ||
107 | /** | ||
108 | * i40e_aq_rc_to_posix - convert errors to user-land codes | ||
109 | * aq_rc: AdminQ error code to convert | ||
110 | **/ | ||
111 | static inline int i40e_aq_rc_to_posix(u16 aq_rc) | ||
112 | { | ||
113 | int aq_to_posix[] = { | ||
114 | 0, /* I40E_AQ_RC_OK */ | ||
115 | -EPERM, /* I40E_AQ_RC_EPERM */ | ||
116 | -ENOENT, /* I40E_AQ_RC_ENOENT */ | ||
117 | -ESRCH, /* I40E_AQ_RC_ESRCH */ | ||
118 | -EINTR, /* I40E_AQ_RC_EINTR */ | ||
119 | -EIO, /* I40E_AQ_RC_EIO */ | ||
120 | -ENXIO, /* I40E_AQ_RC_ENXIO */ | ||
121 | -E2BIG, /* I40E_AQ_RC_E2BIG */ | ||
122 | -EAGAIN, /* I40E_AQ_RC_EAGAIN */ | ||
123 | -ENOMEM, /* I40E_AQ_RC_ENOMEM */ | ||
124 | -EACCES, /* I40E_AQ_RC_EACCES */ | ||
125 | -EFAULT, /* I40E_AQ_RC_EFAULT */ | ||
126 | -EBUSY, /* I40E_AQ_RC_EBUSY */ | ||
127 | -EEXIST, /* I40E_AQ_RC_EEXIST */ | ||
128 | -EINVAL, /* I40E_AQ_RC_EINVAL */ | ||
129 | -ENOTTY, /* I40E_AQ_RC_ENOTTY */ | ||
130 | -ENOSPC, /* I40E_AQ_RC_ENOSPC */ | ||
131 | -ENOSYS, /* I40E_AQ_RC_ENOSYS */ | ||
132 | -ERANGE, /* I40E_AQ_RC_ERANGE */ | ||
133 | -EPIPE, /* I40E_AQ_RC_EFLUSHED */ | ||
134 | -ESPIPE, /* I40E_AQ_RC_BAD_ADDR */ | ||
135 | -EROFS, /* I40E_AQ_RC_EMODE */ | ||
136 | -EFBIG, /* I40E_AQ_RC_EFBIG */ | ||
137 | }; | ||
138 | |||
139 | return aq_to_posix[aq_rc]; | ||
140 | } | ||
141 | |||
106 | /* general information */ | 142 | /* general information */ |
107 | #define I40E_AQ_LARGE_BUF 512 | 143 | #define I40E_AQ_LARGE_BUF 512 |
108 | #define I40E_ASQ_CMD_TIMEOUT 100000 /* usecs */ | 144 | #define I40E_ASQ_CMD_TIMEOUT 100000 /* usecs */ |
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_type.h b/drivers/net/ethernet/intel/i40evf/i40e_type.h index 6dd72ad58e7d..15376436cead 100644 --- a/drivers/net/ethernet/intel/i40evf/i40e_type.h +++ b/drivers/net/ethernet/intel/i40evf/i40e_type.h | |||
@@ -268,6 +268,61 @@ struct i40e_nvm_info { | |||
268 | u32 eetrack; /* NVM data version */ | 268 | u32 eetrack; /* NVM data version */ |
269 | }; | 269 | }; |
270 | 270 | ||
271 | /* definitions used in NVM update support */ | ||
272 | |||
273 | enum i40e_nvmupd_cmd { | ||
274 | I40E_NVMUPD_INVALID, | ||
275 | I40E_NVMUPD_READ_CON, | ||
276 | I40E_NVMUPD_READ_SNT, | ||
277 | I40E_NVMUPD_READ_LCB, | ||
278 | I40E_NVMUPD_READ_SA, | ||
279 | I40E_NVMUPD_WRITE_ERA, | ||
280 | I40E_NVMUPD_WRITE_CON, | ||
281 | I40E_NVMUPD_WRITE_SNT, | ||
282 | I40E_NVMUPD_WRITE_LCB, | ||
283 | I40E_NVMUPD_WRITE_SA, | ||
284 | I40E_NVMUPD_CSUM_CON, | ||
285 | I40E_NVMUPD_CSUM_SA, | ||
286 | I40E_NVMUPD_CSUM_LCB, | ||
287 | }; | ||
288 | |||
289 | enum i40e_nvmupd_state { | ||
290 | I40E_NVMUPD_STATE_INIT, | ||
291 | I40E_NVMUPD_STATE_READING, | ||
292 | I40E_NVMUPD_STATE_WRITING | ||
293 | }; | ||
294 | |||
295 | /* nvm_access definition and its masks/shifts need to be accessible to | ||
296 | * application, core driver, and shared code. Where is the right file? | ||
297 | */ | ||
298 | #define I40E_NVM_READ 0xB | ||
299 | #define I40E_NVM_WRITE 0xC | ||
300 | |||
301 | #define I40E_NVM_MOD_PNT_MASK 0xFF | ||
302 | |||
303 | #define I40E_NVM_TRANS_SHIFT 8 | ||
304 | #define I40E_NVM_TRANS_MASK (0xf << I40E_NVM_TRANS_SHIFT) | ||
305 | #define I40E_NVM_CON 0x0 | ||
306 | #define I40E_NVM_SNT 0x1 | ||
307 | #define I40E_NVM_LCB 0x2 | ||
308 | #define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB) | ||
309 | #define I40E_NVM_ERA 0x4 | ||
310 | #define I40E_NVM_CSUM 0x8 | ||
311 | |||
312 | #define I40E_NVM_ADAPT_SHIFT 16 | ||
313 | #define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT) | ||
314 | |||
315 | #define I40E_NVMUPD_MAX_DATA 4096 | ||
316 | #define I40E_NVMUPD_IFACE_TIMEOUT 2 /* seconds */ | ||
317 | |||
318 | struct i40e_nvm_access { | ||
319 | u32 command; | ||
320 | u32 config; | ||
321 | u32 offset; /* in bytes */ | ||
322 | u32 data_size; /* in bytes */ | ||
323 | u8 data[1]; | ||
324 | }; | ||
325 | |||
271 | /* PCI bus types */ | 326 | /* PCI bus types */ |
272 | enum i40e_bus_type { | 327 | enum i40e_bus_type { |
273 | i40e_bus_type_unknown = 0, | 328 | i40e_bus_type_unknown = 0, |
@@ -403,6 +458,9 @@ struct i40e_hw { | |||
403 | /* Admin Queue info */ | 458 | /* Admin Queue info */ |
404 | struct i40e_adminq_info aq; | 459 | struct i40e_adminq_info aq; |
405 | 460 | ||
461 | /* state of nvm update process */ | ||
462 | enum i40e_nvmupd_state nvmupd_state; | ||
463 | |||
406 | /* HMC info */ | 464 | /* HMC info */ |
407 | struct i40e_hmc_info hmc; /* HMC info struct */ | 465 | struct i40e_hmc_info hmc; /* HMC info struct */ |
408 | 466 | ||