diff options
Diffstat (limited to 'drivers/net/ethernet/freescale/gianfar.c')
-rw-r--r-- | drivers/net/ethernet/freescale/gianfar.c | 38 |
1 files changed, 28 insertions, 10 deletions
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index 186dc4a489a4..d6d810cb97c7 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c | |||
@@ -88,6 +88,7 @@ | |||
88 | 88 | ||
89 | #include <asm/io.h> | 89 | #include <asm/io.h> |
90 | #include <asm/reg.h> | 90 | #include <asm/reg.h> |
91 | #include <asm/mpc85xx.h> | ||
91 | #include <asm/irq.h> | 92 | #include <asm/irq.h> |
92 | #include <asm/uaccess.h> | 93 | #include <asm/uaccess.h> |
93 | #include <linux/module.h> | 94 | #include <linux/module.h> |
@@ -939,9 +940,8 @@ static void gfar_init_filer_table(struct gfar_private *priv) | |||
939 | } | 940 | } |
940 | } | 941 | } |
941 | 942 | ||
942 | static void gfar_detect_errata(struct gfar_private *priv) | 943 | static void __gfar_detect_errata_83xx(struct gfar_private *priv) |
943 | { | 944 | { |
944 | struct device *dev = &priv->ofdev->dev; | ||
945 | unsigned int pvr = mfspr(SPRN_PVR); | 945 | unsigned int pvr = mfspr(SPRN_PVR); |
946 | unsigned int svr = mfspr(SPRN_SVR); | 946 | unsigned int svr = mfspr(SPRN_SVR); |
947 | unsigned int mod = (svr >> 16) & 0xfff6; /* w/o E suffix */ | 947 | unsigned int mod = (svr >> 16) & 0xfff6; /* w/o E suffix */ |
@@ -957,15 +957,33 @@ static void gfar_detect_errata(struct gfar_private *priv) | |||
957 | (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0)) | 957 | (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0)) |
958 | priv->errata |= GFAR_ERRATA_76; | 958 | priv->errata |= GFAR_ERRATA_76; |
959 | 959 | ||
960 | /* MPC8313 and MPC837x all rev */ | 960 | /* MPC8313 Rev < 2.0 */ |
961 | if ((pvr == 0x80850010 && mod == 0x80b0) || | 961 | if (pvr == 0x80850010 && mod == 0x80b0 && rev < 0x0020) |
962 | (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0)) | 962 | priv->errata |= GFAR_ERRATA_12; |
963 | priv->errata |= GFAR_ERRATA_A002; | 963 | } |
964 | 964 | ||
965 | /* MPC8313 Rev < 2.0, MPC8548 rev 2.0 */ | 965 | static void __gfar_detect_errata_85xx(struct gfar_private *priv) |
966 | if ((pvr == 0x80850010 && mod == 0x80b0 && rev < 0x0020) || | 966 | { |
967 | (pvr == 0x80210020 && mod == 0x8030 && rev == 0x0020)) | 967 | unsigned int svr = mfspr(SPRN_SVR); |
968 | |||
969 | if ((SVR_SOC_VER(svr) == SVR_8548) && (SVR_REV(svr) == 0x20)) | ||
968 | priv->errata |= GFAR_ERRATA_12; | 970 | priv->errata |= GFAR_ERRATA_12; |
971 | if (((SVR_SOC_VER(svr) == SVR_P2020) && (SVR_REV(svr) < 0x20)) || | ||
972 | ((SVR_SOC_VER(svr) == SVR_P2010) && (SVR_REV(svr) < 0x20))) | ||
973 | priv->errata |= GFAR_ERRATA_76; /* aka eTSEC 20 */ | ||
974 | } | ||
975 | |||
976 | static void gfar_detect_errata(struct gfar_private *priv) | ||
977 | { | ||
978 | struct device *dev = &priv->ofdev->dev; | ||
979 | |||
980 | /* no plans to fix */ | ||
981 | priv->errata |= GFAR_ERRATA_A002; | ||
982 | |||
983 | if (pvr_version_is(PVR_VER_E500V1) || pvr_version_is(PVR_VER_E500V2)) | ||
984 | __gfar_detect_errata_85xx(priv); | ||
985 | else /* non-mpc85xx parts, i.e. e300 core based */ | ||
986 | __gfar_detect_errata_83xx(priv); | ||
969 | 987 | ||
970 | if (priv->errata) | 988 | if (priv->errata) |
971 | dev_info(dev, "enabled errata workarounds, flags: 0x%x\n", | 989 | dev_info(dev, "enabled errata workarounds, flags: 0x%x\n", |
@@ -1599,7 +1617,7 @@ static int __gfar_is_rx_idle(struct gfar_private *priv) | |||
1599 | /* Normaly TSEC should not hang on GRS commands, so we should | 1617 | /* Normaly TSEC should not hang on GRS commands, so we should |
1600 | * actually wait for IEVENT_GRSC flag. | 1618 | * actually wait for IEVENT_GRSC flag. |
1601 | */ | 1619 | */ |
1602 | if (likely(!gfar_has_errata(priv, GFAR_ERRATA_A002))) | 1620 | if (!gfar_has_errata(priv, GFAR_ERRATA_A002)) |
1603 | return 0; | 1621 | return 0; |
1604 | 1622 | ||
1605 | /* Read the eTSEC register at offset 0xD1C. If bits 7-14 are | 1623 | /* Read the eTSEC register at offset 0xD1C. If bits 7-14 are |