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path: root/drivers/net/ethernet/freescale/fec.h
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-rw-r--r--drivers/net/ethernet/freescale/fec.h81
1 files changed, 81 insertions, 0 deletions
diff --git a/drivers/net/ethernet/freescale/fec.h b/drivers/net/ethernet/freescale/fec.h
index 8408c627b195..e803812975df 100644
--- a/drivers/net/ethernet/freescale/fec.h
+++ b/drivers/net/ethernet/freescale/fec.h
@@ -147,6 +147,87 @@ struct bufdesc {
147#define BD_ENET_TX_CSL ((ushort)0x0001) 147#define BD_ENET_TX_CSL ((ushort)0x0001)
148#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */ 148#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */
149 149
150/*enhanced buffer desciptor control/status used by Ethernet transmit*/
151#define BD_ENET_TX_INT 0x40000000
152#define BD_ENET_TX_TS 0x20000000
153
154
155/* This device has up to three irqs on some platforms */
156#define FEC_IRQ_NUM 3
157
158/* The number of Tx and Rx buffers. These are allocated from the page
159 * pool. The code may assume these are power of two, so it it best
160 * to keep them that size.
161 * We don't need to allocate pages for the transmitter. We just use
162 * the skbuffer directly.
163 */
164
165#define FEC_ENET_RX_PAGES 8
166#define FEC_ENET_RX_FRSIZE 2048
167#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE)
168#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)
169#define FEC_ENET_TX_FRSIZE 2048
170#define FEC_ENET_TX_FRPPG (PAGE_SIZE / FEC_ENET_TX_FRSIZE)
171#define TX_RING_SIZE 16 /* Must be power of two */
172#define TX_RING_MOD_MASK 15 /* for this to work */
173
174#define BD_ENET_RX_INT 0x00800000
175#define BD_ENET_RX_PTP ((ushort)0x0400)
176
177/* The FEC buffer descriptors track the ring buffers. The rx_bd_base and
178 * tx_bd_base always point to the base of the buffer descriptors. The
179 * cur_rx and cur_tx point to the currently available buffer.
180 * The dirty_tx tracks the current buffer that is being sent by the
181 * controller. The cur_tx and dirty_tx are equal under both completely
182 * empty and completely full conditions. The empty/ready indicator in
183 * the buffer descriptor determines the actual condition.
184 */
185struct fec_enet_private {
186 /* Hardware registers of the FEC device */
187 void __iomem *hwp;
188
189 struct net_device *netdev;
190
191 struct clk *clk_ipg;
192 struct clk *clk_ahb;
193
194 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
195 unsigned char *tx_bounce[TX_RING_SIZE];
196 struct sk_buff *tx_skbuff[TX_RING_SIZE];
197 struct sk_buff *rx_skbuff[RX_RING_SIZE];
198 ushort skb_cur;
199 ushort skb_dirty;
200
201 /* CPM dual port RAM relative addresses */
202 dma_addr_t bd_dma;
203 /* Address of Rx and Tx buffers */
204 struct bufdesc *rx_bd_base;
205 struct bufdesc *tx_bd_base;
206 /* The next free ring entry */
207 struct bufdesc *cur_rx, *cur_tx;
208 /* The ring entries to be free()ed */
209 struct bufdesc *dirty_tx;
210
211 uint tx_full;
212 /* hold while accessing the HW like ringbuffer for tx/rx but not MAC */
213 spinlock_t hw_lock;
214
215 struct platform_device *pdev;
216
217 int opened;
218 int dev_id;
219
220 /* Phylib and MDIO interface */
221 struct mii_bus *mii_bus;
222 struct phy_device *phy_dev;
223 int mii_timeout;
224 uint phy_speed;
225 phy_interface_t phy_interface;
226 int link;
227 int full_duplex;
228 struct completion mdio_done;
229 int irq[FEC_IRQ_NUM];
230};
150 231
151/****************************************************************************/ 232/****************************************************************************/
152#endif /* FEC_H */ 233#endif /* FEC_H */