aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/chelsio/cxgb4
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4')
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4.h82
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c278
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/sge.c12
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/t4_hw.c230
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/t4_regs.h14
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h7
6 files changed, 367 insertions, 256 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
index ecd2fb3ef695..6c9308850453 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
@@ -49,13 +49,15 @@
49#include <asm/io.h> 49#include <asm/io.h>
50#include "cxgb4_uld.h" 50#include "cxgb4_uld.h"
51 51
52#define FW_VERSION_MAJOR 1 52#define T4FW_VERSION_MAJOR 0x01
53#define FW_VERSION_MINOR 4 53#define T4FW_VERSION_MINOR 0x06
54#define FW_VERSION_MICRO 0 54#define T4FW_VERSION_MICRO 0x18
55#define T4FW_VERSION_BUILD 0x00
55 56
56#define FW_VERSION_MAJOR_T5 0 57#define T5FW_VERSION_MAJOR 0x01
57#define FW_VERSION_MINOR_T5 0 58#define T5FW_VERSION_MINOR 0x08
58#define FW_VERSION_MICRO_T5 0 59#define T5FW_VERSION_MICRO 0x1C
60#define T5FW_VERSION_BUILD 0x00
59 61
60#define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__) 62#define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__)
61 63
@@ -240,6 +242,26 @@ struct pci_params {
240 unsigned char width; 242 unsigned char width;
241}; 243};
242 244
245#define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
246#define CHELSIO_CHIP_FPGA 0x100
247#define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf)
248#define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
249
250#define CHELSIO_T4 0x4
251#define CHELSIO_T5 0x5
252
253enum chip_type {
254 T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
255 T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
256 T4_FIRST_REV = T4_A1,
257 T4_LAST_REV = T4_A2,
258
259 T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
260 T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
261 T5_FIRST_REV = T5_A0,
262 T5_LAST_REV = T5_A1,
263};
264
243struct adapter_params { 265struct adapter_params {
244 struct tp_params tp; 266 struct tp_params tp;
245 struct vpd_params vpd; 267 struct vpd_params vpd;
@@ -259,7 +281,7 @@ struct adapter_params {
259 281
260 unsigned char nports; /* # of ethernet ports */ 282 unsigned char nports; /* # of ethernet ports */
261 unsigned char portvec; 283 unsigned char portvec;
262 unsigned char rev; /* chip revision */ 284 enum chip_type chip; /* chip code */
263 unsigned char offload; 285 unsigned char offload;
264 286
265 unsigned char bypass; 287 unsigned char bypass;
@@ -267,6 +289,23 @@ struct adapter_params {
267 unsigned int ofldq_wr_cred; 289 unsigned int ofldq_wr_cred;
268}; 290};
269 291
292#include "t4fw_api.h"
293
294#define FW_VERSION(chip) ( \
295 FW_HDR_FW_VER_MAJOR_GET(chip##FW_VERSION_MAJOR) | \
296 FW_HDR_FW_VER_MINOR_GET(chip##FW_VERSION_MINOR) | \
297 FW_HDR_FW_VER_MICRO_GET(chip##FW_VERSION_MICRO) | \
298 FW_HDR_FW_VER_BUILD_GET(chip##FW_VERSION_BUILD))
299#define FW_INTFVER(chip, intf) (FW_HDR_INTFVER_##intf)
300
301struct fw_info {
302 u8 chip;
303 char *fs_name;
304 char *fw_mod_name;
305 struct fw_hdr fw_hdr;
306};
307
308
270struct trace_params { 309struct trace_params {
271 u32 data[TRACE_LEN / 4]; 310 u32 data[TRACE_LEN / 4];
272 u32 mask[TRACE_LEN / 4]; 311 u32 mask[TRACE_LEN / 4];
@@ -512,25 +551,6 @@ struct sge {
512 551
513struct l2t_data; 552struct l2t_data;
514 553
515#define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
516#define CHELSIO_CHIP_VERSION(code) ((code) >> 4)
517#define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
518
519#define CHELSIO_T4 0x4
520#define CHELSIO_T5 0x5
521
522enum chip_type {
523 T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 0),
524 T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
525 T4_A3 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
526 T4_FIRST_REV = T4_A1,
527 T4_LAST_REV = T4_A3,
528
529 T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
530 T5_FIRST_REV = T5_A1,
531 T5_LAST_REV = T5_A1,
532};
533
534#ifdef CONFIG_PCI_IOV 554#ifdef CONFIG_PCI_IOV
535 555
536/* T4 supports SRIOV on PF0-3 and T5 on PF0-7. However, the Serial 556/* T4 supports SRIOV on PF0-3 and T5 on PF0-7. However, the Serial
@@ -715,12 +735,12 @@ enum {
715 735
716static inline int is_t5(enum chip_type chip) 736static inline int is_t5(enum chip_type chip)
717{ 737{
718 return (chip >= T5_FIRST_REV && chip <= T5_LAST_REV); 738 return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5;
719} 739}
720 740
721static inline int is_t4(enum chip_type chip) 741static inline int is_t4(enum chip_type chip)
722{ 742{
723 return (chip >= T4_FIRST_REV && chip <= T4_LAST_REV); 743 return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4;
724} 744}
725 745
726static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr) 746static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr)
@@ -900,7 +920,11 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p);
900int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); 920int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
901unsigned int t4_flash_cfg_addr(struct adapter *adapter); 921unsigned int t4_flash_cfg_addr(struct adapter *adapter);
902int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); 922int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size);
903int t4_check_fw_version(struct adapter *adapter); 923int t4_get_fw_version(struct adapter *adapter, u32 *vers);
924int t4_get_tp_version(struct adapter *adapter, u32 *vers);
925int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info,
926 const u8 *fw_data, unsigned int fw_size,
927 struct fw_hdr *card_fw, enum dev_state state, int *reset);
904int t4_prep_adapter(struct adapter *adapter); 928int t4_prep_adapter(struct adapter *adapter);
905int t4_port_init(struct adapter *adap, int mbox, int pf, int vf); 929int t4_port_init(struct adapter *adap, int mbox, int pf, int vf);
906void t4_fatal_err(struct adapter *adapter); 930void t4_fatal_err(struct adapter *adapter);
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 8b929eeecd2d..d6b12e035a7d 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -276,9 +276,9 @@ static DEFINE_PCI_DEVICE_TABLE(cxgb4_pci_tbl) = {
276 { 0, } 276 { 0, }
277}; 277};
278 278
279#define FW_FNAME "cxgb4/t4fw.bin" 279#define FW4_FNAME "cxgb4/t4fw.bin"
280#define FW5_FNAME "cxgb4/t5fw.bin" 280#define FW5_FNAME "cxgb4/t5fw.bin"
281#define FW_CFNAME "cxgb4/t4-config.txt" 281#define FW4_CFNAME "cxgb4/t4-config.txt"
282#define FW5_CFNAME "cxgb4/t5-config.txt" 282#define FW5_CFNAME "cxgb4/t5-config.txt"
283 283
284MODULE_DESCRIPTION(DRV_DESC); 284MODULE_DESCRIPTION(DRV_DESC);
@@ -286,7 +286,7 @@ MODULE_AUTHOR("Chelsio Communications");
286MODULE_LICENSE("Dual BSD/GPL"); 286MODULE_LICENSE("Dual BSD/GPL");
287MODULE_VERSION(DRV_VERSION); 287MODULE_VERSION(DRV_VERSION);
288MODULE_DEVICE_TABLE(pci, cxgb4_pci_tbl); 288MODULE_DEVICE_TABLE(pci, cxgb4_pci_tbl);
289MODULE_FIRMWARE(FW_FNAME); 289MODULE_FIRMWARE(FW4_FNAME);
290MODULE_FIRMWARE(FW5_FNAME); 290MODULE_FIRMWARE(FW5_FNAME);
291 291
292/* 292/*
@@ -1071,72 +1071,6 @@ freeout: t4_free_sge_resources(adap);
1071} 1071}
1072 1072
1073/* 1073/*
1074 * Returns 0 if new FW was successfully loaded, a positive errno if a load was
1075 * started but failed, and a negative errno if flash load couldn't start.
1076 */
1077static int upgrade_fw(struct adapter *adap)
1078{
1079 int ret;
1080 u32 vers, exp_major;
1081 const struct fw_hdr *hdr;
1082 const struct firmware *fw;
1083 struct device *dev = adap->pdev_dev;
1084 char *fw_file_name;
1085
1086 switch (CHELSIO_CHIP_VERSION(adap->chip)) {
1087 case CHELSIO_T4:
1088 fw_file_name = FW_FNAME;
1089 exp_major = FW_VERSION_MAJOR;
1090 break;
1091 case CHELSIO_T5:
1092 fw_file_name = FW5_FNAME;
1093 exp_major = FW_VERSION_MAJOR_T5;
1094 break;
1095 default:
1096 dev_err(dev, "Unsupported chip type, %x\n", adap->chip);
1097 return -EINVAL;
1098 }
1099
1100 ret = request_firmware(&fw, fw_file_name, dev);
1101 if (ret < 0) {
1102 dev_err(dev, "unable to load firmware image %s, error %d\n",
1103 fw_file_name, ret);
1104 return ret;
1105 }
1106
1107 hdr = (const struct fw_hdr *)fw->data;
1108 vers = ntohl(hdr->fw_ver);
1109 if (FW_HDR_FW_VER_MAJOR_GET(vers) != exp_major) {
1110 ret = -EINVAL; /* wrong major version, won't do */
1111 goto out;
1112 }
1113
1114 /*
1115 * If the flash FW is unusable or we found something newer, load it.
1116 */
1117 if (FW_HDR_FW_VER_MAJOR_GET(adap->params.fw_vers) != exp_major ||
1118 vers > adap->params.fw_vers) {
1119 dev_info(dev, "upgrading firmware ...\n");
1120 ret = t4_fw_upgrade(adap, adap->mbox, fw->data, fw->size,
1121 /*force=*/false);
1122 if (!ret)
1123 dev_info(dev,
1124 "firmware upgraded to version %pI4 from %s\n",
1125 &hdr->fw_ver, fw_file_name);
1126 else
1127 dev_err(dev, "firmware upgrade failed! err=%d\n", -ret);
1128 } else {
1129 /*
1130 * Tell our caller that we didn't upgrade the firmware.
1131 */
1132 ret = -EINVAL;
1133 }
1134
1135out: release_firmware(fw);
1136 return ret;
1137}
1138
1139/*
1140 * Allocate a chunk of memory using kmalloc or, if that fails, vmalloc. 1074 * Allocate a chunk of memory using kmalloc or, if that fails, vmalloc.
1141 * The allocated memory is cleared. 1075 * The allocated memory is cleared.
1142 */ 1076 */
@@ -1415,7 +1349,7 @@ static int get_sset_count(struct net_device *dev, int sset)
1415static int get_regs_len(struct net_device *dev) 1349static int get_regs_len(struct net_device *dev)
1416{ 1350{
1417 struct adapter *adap = netdev2adap(dev); 1351 struct adapter *adap = netdev2adap(dev);
1418 if (is_t4(adap->chip)) 1352 if (is_t4(adap->params.chip))
1419 return T4_REGMAP_SIZE; 1353 return T4_REGMAP_SIZE;
1420 else 1354 else
1421 return T5_REGMAP_SIZE; 1355 return T5_REGMAP_SIZE;
@@ -1499,7 +1433,7 @@ static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
1499 data += sizeof(struct port_stats) / sizeof(u64); 1433 data += sizeof(struct port_stats) / sizeof(u64);
1500 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data); 1434 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data);
1501 data += sizeof(struct queue_port_stats) / sizeof(u64); 1435 data += sizeof(struct queue_port_stats) / sizeof(u64);
1502 if (!is_t4(adapter->chip)) { 1436 if (!is_t4(adapter->params.chip)) {
1503 t4_write_reg(adapter, SGE_STAT_CFG, STATSOURCE_T5(7)); 1437 t4_write_reg(adapter, SGE_STAT_CFG, STATSOURCE_T5(7));
1504 val1 = t4_read_reg(adapter, SGE_STAT_TOTAL); 1438 val1 = t4_read_reg(adapter, SGE_STAT_TOTAL);
1505 val2 = t4_read_reg(adapter, SGE_STAT_MATCH); 1439 val2 = t4_read_reg(adapter, SGE_STAT_MATCH);
@@ -1521,8 +1455,8 @@ static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
1521 */ 1455 */
1522static inline unsigned int mk_adap_vers(const struct adapter *ap) 1456static inline unsigned int mk_adap_vers(const struct adapter *ap)
1523{ 1457{
1524 return CHELSIO_CHIP_VERSION(ap->chip) | 1458 return CHELSIO_CHIP_VERSION(ap->params.chip) |
1525 (CHELSIO_CHIP_RELEASE(ap->chip) << 10) | (1 << 16); 1459 (CHELSIO_CHIP_RELEASE(ap->params.chip) << 10) | (1 << 16);
1526} 1460}
1527 1461
1528static void reg_block_dump(struct adapter *ap, void *buf, unsigned int start, 1462static void reg_block_dump(struct adapter *ap, void *buf, unsigned int start,
@@ -2189,7 +2123,7 @@ static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
2189 static const unsigned int *reg_ranges; 2123 static const unsigned int *reg_ranges;
2190 int arr_size = 0, buf_size = 0; 2124 int arr_size = 0, buf_size = 0;
2191 2125
2192 if (is_t4(ap->chip)) { 2126 if (is_t4(ap->params.chip)) {
2193 reg_ranges = &t4_reg_ranges[0]; 2127 reg_ranges = &t4_reg_ranges[0];
2194 arr_size = ARRAY_SIZE(t4_reg_ranges); 2128 arr_size = ARRAY_SIZE(t4_reg_ranges);
2195 buf_size = T4_REGMAP_SIZE; 2129 buf_size = T4_REGMAP_SIZE;
@@ -2967,7 +2901,7 @@ static int setup_debugfs(struct adapter *adap)
2967 size = t4_read_reg(adap, MA_EDRAM1_BAR); 2901 size = t4_read_reg(adap, MA_EDRAM1_BAR);
2968 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM_SIZE_GET(size)); 2902 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM_SIZE_GET(size));
2969 } 2903 }
2970 if (is_t4(adap->chip)) { 2904 if (is_t4(adap->params.chip)) {
2971 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR); 2905 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR);
2972 if (i & EXT_MEM_ENABLE) 2906 if (i & EXT_MEM_ENABLE)
2973 add_debugfs_mem(adap, "mc", MEM_MC, 2907 add_debugfs_mem(adap, "mc", MEM_MC,
@@ -3419,7 +3353,7 @@ unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo)
3419 3353
3420 v1 = t4_read_reg(adap, A_SGE_DBFIFO_STATUS); 3354 v1 = t4_read_reg(adap, A_SGE_DBFIFO_STATUS);
3421 v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2); 3355 v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2);
3422 if (is_t4(adap->chip)) { 3356 if (is_t4(adap->params.chip)) {
3423 lp_count = G_LP_COUNT(v1); 3357 lp_count = G_LP_COUNT(v1);
3424 hp_count = G_HP_COUNT(v1); 3358 hp_count = G_HP_COUNT(v1);
3425 } else { 3359 } else {
@@ -3588,7 +3522,7 @@ static void drain_db_fifo(struct adapter *adap, int usecs)
3588 do { 3522 do {
3589 v1 = t4_read_reg(adap, A_SGE_DBFIFO_STATUS); 3523 v1 = t4_read_reg(adap, A_SGE_DBFIFO_STATUS);
3590 v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2); 3524 v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2);
3591 if (is_t4(adap->chip)) { 3525 if (is_t4(adap->params.chip)) {
3592 lp_count = G_LP_COUNT(v1); 3526 lp_count = G_LP_COUNT(v1);
3593 hp_count = G_HP_COUNT(v1); 3527 hp_count = G_HP_COUNT(v1);
3594 } else { 3528 } else {
@@ -3708,7 +3642,7 @@ static void process_db_drop(struct work_struct *work)
3708 3642
3709 adap = container_of(work, struct adapter, db_drop_task); 3643 adap = container_of(work, struct adapter, db_drop_task);
3710 3644
3711 if (is_t4(adap->chip)) { 3645 if (is_t4(adap->params.chip)) {
3712 disable_dbs(adap); 3646 disable_dbs(adap);
3713 notify_rdma_uld(adap, CXGB4_CONTROL_DB_DROP); 3647 notify_rdma_uld(adap, CXGB4_CONTROL_DB_DROP);
3714 drain_db_fifo(adap, 1); 3648 drain_db_fifo(adap, 1);
@@ -3753,7 +3687,7 @@ static void process_db_drop(struct work_struct *work)
3753 3687
3754void t4_db_full(struct adapter *adap) 3688void t4_db_full(struct adapter *adap)
3755{ 3689{
3756 if (is_t4(adap->chip)) { 3690 if (is_t4(adap->params.chip)) {
3757 t4_set_reg_field(adap, SGE_INT_ENABLE3, 3691 t4_set_reg_field(adap, SGE_INT_ENABLE3,
3758 DBFIFO_HP_INT | DBFIFO_LP_INT, 0); 3692 DBFIFO_HP_INT | DBFIFO_LP_INT, 0);
3759 queue_work(workq, &adap->db_full_task); 3693 queue_work(workq, &adap->db_full_task);
@@ -3762,7 +3696,7 @@ void t4_db_full(struct adapter *adap)
3762 3696
3763void t4_db_dropped(struct adapter *adap) 3697void t4_db_dropped(struct adapter *adap)
3764{ 3698{
3765 if (is_t4(adap->chip)) 3699 if (is_t4(adap->params.chip))
3766 queue_work(workq, &adap->db_drop_task); 3700 queue_work(workq, &adap->db_drop_task);
3767} 3701}
3768 3702
@@ -3789,7 +3723,7 @@ static void uld_attach(struct adapter *adap, unsigned int uld)
3789 lli.nchan = adap->params.nports; 3723 lli.nchan = adap->params.nports;
3790 lli.nports = adap->params.nports; 3724 lli.nports = adap->params.nports;
3791 lli.wr_cred = adap->params.ofldq_wr_cred; 3725 lli.wr_cred = adap->params.ofldq_wr_cred;
3792 lli.adapter_type = adap->params.rev; 3726 lli.adapter_type = adap->params.chip;
3793 lli.iscsi_iolen = MAXRXDATA_GET(t4_read_reg(adap, TP_PARA_REG2)); 3727 lli.iscsi_iolen = MAXRXDATA_GET(t4_read_reg(adap, TP_PARA_REG2));
3794 lli.udb_density = 1 << QUEUESPERPAGEPF0_GET( 3728 lli.udb_density = 1 << QUEUESPERPAGEPF0_GET(
3795 t4_read_reg(adap, SGE_EGRESS_QUEUES_PER_PAGE_PF) >> 3729 t4_read_reg(adap, SGE_EGRESS_QUEUES_PER_PAGE_PF) >>
@@ -4483,7 +4417,7 @@ static void setup_memwin(struct adapter *adap)
4483 u32 bar0, mem_win0_base, mem_win1_base, mem_win2_base; 4417 u32 bar0, mem_win0_base, mem_win1_base, mem_win2_base;
4484 4418
4485 bar0 = pci_resource_start(adap->pdev, 0); /* truncation intentional */ 4419 bar0 = pci_resource_start(adap->pdev, 0); /* truncation intentional */
4486 if (is_t4(adap->chip)) { 4420 if (is_t4(adap->params.chip)) {
4487 mem_win0_base = bar0 + MEMWIN0_BASE; 4421 mem_win0_base = bar0 + MEMWIN0_BASE;
4488 mem_win1_base = bar0 + MEMWIN1_BASE; 4422 mem_win1_base = bar0 + MEMWIN1_BASE;
4489 mem_win2_base = bar0 + MEMWIN2_BASE; 4423 mem_win2_base = bar0 + MEMWIN2_BASE;
@@ -4668,8 +4602,10 @@ static int adap_init0_config(struct adapter *adapter, int reset)
4668 const struct firmware *cf; 4602 const struct firmware *cf;
4669 unsigned long mtype = 0, maddr = 0; 4603 unsigned long mtype = 0, maddr = 0;
4670 u32 finiver, finicsum, cfcsum; 4604 u32 finiver, finicsum, cfcsum;
4671 int ret, using_flash; 4605 int ret;
4606 int config_issued = 0;
4672 char *fw_config_file, fw_config_file_path[256]; 4607 char *fw_config_file, fw_config_file_path[256];
4608 char *config_name = NULL;
4673 4609
4674 /* 4610 /*
4675 * Reset device if necessary. 4611 * Reset device if necessary.
@@ -4686,9 +4622,9 @@ static int adap_init0_config(struct adapter *adapter, int reset)
4686 * then use that. Otherwise, use the configuration file stored 4622 * then use that. Otherwise, use the configuration file stored
4687 * in the adapter flash ... 4623 * in the adapter flash ...
4688 */ 4624 */
4689 switch (CHELSIO_CHIP_VERSION(adapter->chip)) { 4625 switch (CHELSIO_CHIP_VERSION(adapter->params.chip)) {
4690 case CHELSIO_T4: 4626 case CHELSIO_T4:
4691 fw_config_file = FW_CFNAME; 4627 fw_config_file = FW4_CFNAME;
4692 break; 4628 break;
4693 case CHELSIO_T5: 4629 case CHELSIO_T5:
4694 fw_config_file = FW5_CFNAME; 4630 fw_config_file = FW5_CFNAME;
@@ -4702,13 +4638,16 @@ static int adap_init0_config(struct adapter *adapter, int reset)
4702 4638
4703 ret = request_firmware(&cf, fw_config_file, adapter->pdev_dev); 4639 ret = request_firmware(&cf, fw_config_file, adapter->pdev_dev);
4704 if (ret < 0) { 4640 if (ret < 0) {
4705 using_flash = 1; 4641 config_name = "On FLASH";
4706 mtype = FW_MEMTYPE_CF_FLASH; 4642 mtype = FW_MEMTYPE_CF_FLASH;
4707 maddr = t4_flash_cfg_addr(adapter); 4643 maddr = t4_flash_cfg_addr(adapter);
4708 } else { 4644 } else {
4709 u32 params[7], val[7]; 4645 u32 params[7], val[7];
4710 4646
4711 using_flash = 0; 4647 sprintf(fw_config_file_path,
4648 "/lib/firmware/%s", fw_config_file);
4649 config_name = fw_config_file_path;
4650
4712 if (cf->size >= FLASH_CFG_MAX_SIZE) 4651 if (cf->size >= FLASH_CFG_MAX_SIZE)
4713 ret = -ENOMEM; 4652 ret = -ENOMEM;
4714 else { 4653 else {
@@ -4776,6 +4715,26 @@ static int adap_init0_config(struct adapter *adapter, int reset)
4776 FW_LEN16(caps_cmd)); 4715 FW_LEN16(caps_cmd));
4777 ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), 4716 ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd),
4778 &caps_cmd); 4717 &caps_cmd);
4718
4719 /* If the CAPS_CONFIG failed with an ENOENT (for a Firmware
4720 * Configuration File in FLASH), our last gasp effort is to use the
4721 * Firmware Configuration File which is embedded in the firmware. A
4722 * very few early versions of the firmware didn't have one embedded
4723 * but we can ignore those.
4724 */
4725 if (ret == -ENOENT) {
4726 memset(&caps_cmd, 0, sizeof(caps_cmd));
4727 caps_cmd.op_to_write =
4728 htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) |
4729 FW_CMD_REQUEST |
4730 FW_CMD_READ);
4731 caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd));
4732 ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd,
4733 sizeof(caps_cmd), &caps_cmd);
4734 config_name = "Firmware Default";
4735 }
4736
4737 config_issued = 1;
4779 if (ret < 0) 4738 if (ret < 0)
4780 goto bye; 4739 goto bye;
4781 4740
@@ -4816,7 +4775,6 @@ static int adap_init0_config(struct adapter *adapter, int reset)
4816 if (ret < 0) 4775 if (ret < 0)
4817 goto bye; 4776 goto bye;
4818 4777
4819 sprintf(fw_config_file_path, "/lib/firmware/%s", fw_config_file);
4820 /* 4778 /*
4821 * Return successfully and note that we're operating with parameters 4779 * Return successfully and note that we're operating with parameters
4822 * not supplied by the driver, rather than from hard-wired 4780 * not supplied by the driver, rather than from hard-wired
@@ -4824,11 +4782,8 @@ static int adap_init0_config(struct adapter *adapter, int reset)
4824 */ 4782 */
4825 adapter->flags |= USING_SOFT_PARAMS; 4783 adapter->flags |= USING_SOFT_PARAMS;
4826 dev_info(adapter->pdev_dev, "Successfully configured using Firmware "\ 4784 dev_info(adapter->pdev_dev, "Successfully configured using Firmware "\
4827 "Configuration File %s, version %#x, computed checksum %#x\n", 4785 "Configuration File \"%s\", version %#x, computed checksum %#x\n",
4828 (using_flash 4786 config_name, finiver, cfcsum);
4829 ? "in device FLASH"
4830 : fw_config_file_path),
4831 finiver, cfcsum);
4832 return 0; 4787 return 0;
4833 4788
4834 /* 4789 /*
@@ -4837,9 +4792,9 @@ static int adap_init0_config(struct adapter *adapter, int reset)
4837 * want to issue a warning since this is fairly common.) 4792 * want to issue a warning since this is fairly common.)
4838 */ 4793 */
4839bye: 4794bye:
4840 if (ret != -ENOENT) 4795 if (config_issued && ret != -ENOENT)
4841 dev_warn(adapter->pdev_dev, "Configuration file error %d\n", 4796 dev_warn(adapter->pdev_dev, "\"%s\" configuration file error %d\n",
4842 -ret); 4797 config_name, -ret);
4843 return ret; 4798 return ret;
4844} 4799}
4845 4800
@@ -5086,6 +5041,47 @@ bye:
5086 return ret; 5041 return ret;
5087} 5042}
5088 5043
5044static struct fw_info fw_info_array[] = {
5045 {
5046 .chip = CHELSIO_T4,
5047 .fs_name = FW4_CFNAME,
5048 .fw_mod_name = FW4_FNAME,
5049 .fw_hdr = {
5050 .chip = FW_HDR_CHIP_T4,
5051 .fw_ver = __cpu_to_be32(FW_VERSION(T4)),
5052 .intfver_nic = FW_INTFVER(T4, NIC),
5053 .intfver_vnic = FW_INTFVER(T4, VNIC),
5054 .intfver_ri = FW_INTFVER(T4, RI),
5055 .intfver_iscsi = FW_INTFVER(T4, ISCSI),
5056 .intfver_fcoe = FW_INTFVER(T4, FCOE),
5057 },
5058 }, {
5059 .chip = CHELSIO_T5,
5060 .fs_name = FW5_CFNAME,
5061 .fw_mod_name = FW5_FNAME,
5062 .fw_hdr = {
5063 .chip = FW_HDR_CHIP_T5,
5064 .fw_ver = __cpu_to_be32(FW_VERSION(T5)),
5065 .intfver_nic = FW_INTFVER(T5, NIC),
5066 .intfver_vnic = FW_INTFVER(T5, VNIC),
5067 .intfver_ri = FW_INTFVER(T5, RI),
5068 .intfver_iscsi = FW_INTFVER(T5, ISCSI),
5069 .intfver_fcoe = FW_INTFVER(T5, FCOE),
5070 },
5071 }
5072};
5073
5074static struct fw_info *find_fw_info(int chip)
5075{
5076 int i;
5077
5078 for (i = 0; i < ARRAY_SIZE(fw_info_array); i++) {
5079 if (fw_info_array[i].chip == chip)
5080 return &fw_info_array[i];
5081 }
5082 return NULL;
5083}
5084
5089/* 5085/*
5090 * Phase 0 of initialization: contact FW, obtain config, perform basic init. 5086 * Phase 0 of initialization: contact FW, obtain config, perform basic init.
5091 */ 5087 */
@@ -5123,44 +5119,54 @@ static int adap_init0(struct adapter *adap)
5123 * later reporting and B. to warn if the currently loaded firmware 5119 * later reporting and B. to warn if the currently loaded firmware
5124 * is excessively mismatched relative to the driver.) 5120 * is excessively mismatched relative to the driver.)
5125 */ 5121 */
5126 ret = t4_check_fw_version(adap); 5122 t4_get_fw_version(adap, &adap->params.fw_vers);
5127 5123 t4_get_tp_version(adap, &adap->params.tp_vers);
5128 /* The error code -EFAULT is returned by t4_check_fw_version() if
5129 * firmware on adapter < supported firmware. If firmware on adapter
5130 * is too old (not supported by driver) and we're the MASTER_PF set
5131 * adapter state to DEV_STATE_UNINIT to force firmware upgrade
5132 * and reinitialization.
5133 */
5134 if ((adap->flags & MASTER_PF) && ret == -EFAULT)
5135 state = DEV_STATE_UNINIT;
5136 if ((adap->flags & MASTER_PF) && state != DEV_STATE_INIT) { 5124 if ((adap->flags & MASTER_PF) && state != DEV_STATE_INIT) {
5137 if (ret == -EINVAL || ret == -EFAULT || ret > 0) { 5125 struct fw_info *fw_info;
5138 if (upgrade_fw(adap) >= 0) { 5126 struct fw_hdr *card_fw;
5139 /* 5127 const struct firmware *fw;
5140 * Note that the chip was reset as part of the 5128 const u8 *fw_data = NULL;
5141 * firmware upgrade so we don't reset it again 5129 unsigned int fw_size = 0;
5142 * below and grab the new firmware version. 5130
5143 */ 5131 /* This is the firmware whose headers the driver was compiled
5144 reset = 0; 5132 * against
5145 ret = t4_check_fw_version(adap); 5133 */
5146 } else 5134 fw_info = find_fw_info(CHELSIO_CHIP_VERSION(adap->params.chip));
5147 if (ret == -EFAULT) { 5135 if (fw_info == NULL) {
5148 /* 5136 dev_err(adap->pdev_dev,
5149 * Firmware is old but still might 5137 "unable to get firmware info for chip %d.\n",
5150 * work if we force reinitialization 5138 CHELSIO_CHIP_VERSION(adap->params.chip));
5151 * of the adapter. Ignoring FW upgrade 5139 return -EINVAL;
5152 * failure.
5153 */
5154 dev_warn(adap->pdev_dev,
5155 "Ignoring firmware upgrade "
5156 "failure, and forcing driver "
5157 "to reinitialize the "
5158 "adapter.\n");
5159 ret = 0;
5160 }
5161 } 5140 }
5141
5142 /* allocate memory to read the header of the firmware on the
5143 * card
5144 */
5145 card_fw = t4_alloc_mem(sizeof(*card_fw));
5146
5147 /* Get FW from from /lib/firmware/ */
5148 ret = request_firmware(&fw, fw_info->fw_mod_name,
5149 adap->pdev_dev);
5150 if (ret < 0) {
5151 dev_err(adap->pdev_dev,
5152 "unable to load firmware image %s, error %d\n",
5153 fw_info->fw_mod_name, ret);
5154 } else {
5155 fw_data = fw->data;
5156 fw_size = fw->size;
5157 }
5158
5159 /* upgrade FW logic */
5160 ret = t4_prep_fw(adap, fw_info, fw_data, fw_size, card_fw,
5161 state, &reset);
5162
5163 /* Cleaning up */
5164 if (fw != NULL)
5165 release_firmware(fw);
5166 t4_free_mem(card_fw);
5167
5162 if (ret < 0) 5168 if (ret < 0)
5163 return ret; 5169 goto bye;
5164 } 5170 }
5165 5171
5166 /* 5172 /*
@@ -5245,7 +5251,7 @@ static int adap_init0(struct adapter *adap)
5245 if (ret == -ENOENT) { 5251 if (ret == -ENOENT) {
5246 dev_info(adap->pdev_dev, 5252 dev_info(adap->pdev_dev,
5247 "No Configuration File present " 5253 "No Configuration File present "
5248 "on adapter. Using hard-wired " 5254 "on adapter. Using hard-wired "
5249 "configuration parameters.\n"); 5255 "configuration parameters.\n");
5250 ret = adap_init0_no_config(adap, reset); 5256 ret = adap_init0_no_config(adap, reset);
5251 } 5257 }
@@ -5787,7 +5793,7 @@ static void print_port_info(const struct net_device *dev)
5787 5793
5788 netdev_info(dev, "Chelsio %s rev %d %s %sNIC PCIe x%d%s%s\n", 5794 netdev_info(dev, "Chelsio %s rev %d %s %sNIC PCIe x%d%s%s\n",
5789 adap->params.vpd.id, 5795 adap->params.vpd.id,
5790 CHELSIO_CHIP_RELEASE(adap->params.rev), buf, 5796 CHELSIO_CHIP_RELEASE(adap->params.chip), buf,
5791 is_offload(adap) ? "R" : "", adap->params.pci.width, spd, 5797 is_offload(adap) ? "R" : "", adap->params.pci.width, spd,
5792 (adap->flags & USING_MSIX) ? " MSI-X" : 5798 (adap->flags & USING_MSIX) ? " MSI-X" :
5793 (adap->flags & USING_MSI) ? " MSI" : ""); 5799 (adap->flags & USING_MSI) ? " MSI" : "");
@@ -5910,7 +5916,7 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
5910 if (err) 5916 if (err)
5911 goto out_unmap_bar0; 5917 goto out_unmap_bar0;
5912 5918
5913 if (!is_t4(adapter->chip)) { 5919 if (!is_t4(adapter->params.chip)) {
5914 s_qpp = QUEUESPERPAGEPF1 * adapter->fn; 5920 s_qpp = QUEUESPERPAGEPF1 * adapter->fn;
5915 qpp = 1 << QUEUESPERPAGEPF0_GET(t4_read_reg(adapter, 5921 qpp = 1 << QUEUESPERPAGEPF0_GET(t4_read_reg(adapter,
5916 SGE_EGRESS_QUEUES_PER_PAGE_PF) >> s_qpp); 5922 SGE_EGRESS_QUEUES_PER_PAGE_PF) >> s_qpp);
@@ -6064,7 +6070,7 @@ sriov:
6064 out_free_dev: 6070 out_free_dev:
6065 free_some_resources(adapter); 6071 free_some_resources(adapter);
6066 out_unmap_bar: 6072 out_unmap_bar:
6067 if (!is_t4(adapter->chip)) 6073 if (!is_t4(adapter->params.chip))
6068 iounmap(adapter->bar2); 6074 iounmap(adapter->bar2);
6069 out_unmap_bar0: 6075 out_unmap_bar0:
6070 iounmap(adapter->regs); 6076 iounmap(adapter->regs);
@@ -6116,7 +6122,7 @@ static void remove_one(struct pci_dev *pdev)
6116 6122
6117 free_some_resources(adapter); 6123 free_some_resources(adapter);
6118 iounmap(adapter->regs); 6124 iounmap(adapter->regs);
6119 if (!is_t4(adapter->chip)) 6125 if (!is_t4(adapter->params.chip))
6120 iounmap(adapter->bar2); 6126 iounmap(adapter->bar2);
6121 kfree(adapter); 6127 kfree(adapter);
6122 pci_disable_pcie_error_reporting(pdev); 6128 pci_disable_pcie_error_reporting(pdev);
diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c
index ac311f5f3eb9..cc380c36e1a8 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/sge.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/sge.c
@@ -509,7 +509,7 @@ static inline void ring_fl_db(struct adapter *adap, struct sge_fl *q)
509 u32 val; 509 u32 val;
510 if (q->pend_cred >= 8) { 510 if (q->pend_cred >= 8) {
511 val = PIDX(q->pend_cred / 8); 511 val = PIDX(q->pend_cred / 8);
512 if (!is_t4(adap->chip)) 512 if (!is_t4(adap->params.chip))
513 val |= DBTYPE(1); 513 val |= DBTYPE(1);
514 wmb(); 514 wmb();
515 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL), DBPRIO(1) | 515 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL), DBPRIO(1) |
@@ -847,7 +847,7 @@ static inline void ring_tx_db(struct adapter *adap, struct sge_txq *q, int n)
847 wmb(); /* write descriptors before telling HW */ 847 wmb(); /* write descriptors before telling HW */
848 spin_lock(&q->db_lock); 848 spin_lock(&q->db_lock);
849 if (!q->db_disabled) { 849 if (!q->db_disabled) {
850 if (is_t4(adap->chip)) { 850 if (is_t4(adap->params.chip)) {
851 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL), 851 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL),
852 QID(q->cntxt_id) | PIDX(n)); 852 QID(q->cntxt_id) | PIDX(n));
853 } else { 853 } else {
@@ -1596,7 +1596,7 @@ static noinline int handle_trace_pkt(struct adapter *adap,
1596 return 0; 1596 return 0;
1597 } 1597 }
1598 1598
1599 if (is_t4(adap->chip)) 1599 if (is_t4(adap->params.chip))
1600 __skb_pull(skb, sizeof(struct cpl_trace_pkt)); 1600 __skb_pull(skb, sizeof(struct cpl_trace_pkt));
1601 else 1601 else
1602 __skb_pull(skb, sizeof(struct cpl_t5_trace_pkt)); 1602 __skb_pull(skb, sizeof(struct cpl_t5_trace_pkt));
@@ -1661,7 +1661,7 @@ int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp,
1661 const struct cpl_rx_pkt *pkt; 1661 const struct cpl_rx_pkt *pkt;
1662 struct sge_eth_rxq *rxq = container_of(q, struct sge_eth_rxq, rspq); 1662 struct sge_eth_rxq *rxq = container_of(q, struct sge_eth_rxq, rspq);
1663 struct sge *s = &q->adap->sge; 1663 struct sge *s = &q->adap->sge;
1664 int cpl_trace_pkt = is_t4(q->adap->chip) ? 1664 int cpl_trace_pkt = is_t4(q->adap->params.chip) ?
1665 CPL_TRACE_PKT : CPL_TRACE_PKT_T5; 1665 CPL_TRACE_PKT : CPL_TRACE_PKT_T5;
1666 1666
1667 if (unlikely(*(u8 *)rsp == cpl_trace_pkt)) 1667 if (unlikely(*(u8 *)rsp == cpl_trace_pkt))
@@ -2182,7 +2182,7 @@ err:
2182static void init_txq(struct adapter *adap, struct sge_txq *q, unsigned int id) 2182static void init_txq(struct adapter *adap, struct sge_txq *q, unsigned int id)
2183{ 2183{
2184 q->cntxt_id = id; 2184 q->cntxt_id = id;
2185 if (!is_t4(adap->chip)) { 2185 if (!is_t4(adap->params.chip)) {
2186 unsigned int s_qpp; 2186 unsigned int s_qpp;
2187 unsigned short udb_density; 2187 unsigned short udb_density;
2188 unsigned long qpshift; 2188 unsigned long qpshift;
@@ -2641,7 +2641,7 @@ static int t4_sge_init_hard(struct adapter *adap)
2641 * Set up to drop DOORBELL writes when the DOORBELL FIFO overflows 2641 * Set up to drop DOORBELL writes when the DOORBELL FIFO overflows
2642 * and generate an interrupt when this occurs so we can recover. 2642 * and generate an interrupt when this occurs so we can recover.
2643 */ 2643 */
2644 if (is_t4(adap->chip)) { 2644 if (is_t4(adap->params.chip)) {
2645 t4_set_reg_field(adap, A_SGE_DBFIFO_STATUS, 2645 t4_set_reg_field(adap, A_SGE_DBFIFO_STATUS,
2646 V_HP_INT_THRESH(M_HP_INT_THRESH) | 2646 V_HP_INT_THRESH(M_HP_INT_THRESH) |
2647 V_LP_INT_THRESH(M_LP_INT_THRESH), 2647 V_LP_INT_THRESH(M_LP_INT_THRESH),
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index 4cbb2f9850be..74a6fce5a15a 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -296,7 +296,7 @@ int t4_mc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc)
296 u32 mc_bist_cmd, mc_bist_cmd_addr, mc_bist_cmd_len; 296 u32 mc_bist_cmd, mc_bist_cmd_addr, mc_bist_cmd_len;
297 u32 mc_bist_status_rdata, mc_bist_data_pattern; 297 u32 mc_bist_status_rdata, mc_bist_data_pattern;
298 298
299 if (is_t4(adap->chip)) { 299 if (is_t4(adap->params.chip)) {
300 mc_bist_cmd = MC_BIST_CMD; 300 mc_bist_cmd = MC_BIST_CMD;
301 mc_bist_cmd_addr = MC_BIST_CMD_ADDR; 301 mc_bist_cmd_addr = MC_BIST_CMD_ADDR;
302 mc_bist_cmd_len = MC_BIST_CMD_LEN; 302 mc_bist_cmd_len = MC_BIST_CMD_LEN;
@@ -349,7 +349,7 @@ int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc)
349 u32 edc_bist_cmd, edc_bist_cmd_addr, edc_bist_cmd_len; 349 u32 edc_bist_cmd, edc_bist_cmd_addr, edc_bist_cmd_len;
350 u32 edc_bist_cmd_data_pattern, edc_bist_status_rdata; 350 u32 edc_bist_cmd_data_pattern, edc_bist_status_rdata;
351 351
352 if (is_t4(adap->chip)) { 352 if (is_t4(adap->params.chip)) {
353 edc_bist_cmd = EDC_REG(EDC_BIST_CMD, idx); 353 edc_bist_cmd = EDC_REG(EDC_BIST_CMD, idx);
354 edc_bist_cmd_addr = EDC_REG(EDC_BIST_CMD_ADDR, idx); 354 edc_bist_cmd_addr = EDC_REG(EDC_BIST_CMD_ADDR, idx);
355 edc_bist_cmd_len = EDC_REG(EDC_BIST_CMD_LEN, idx); 355 edc_bist_cmd_len = EDC_REG(EDC_BIST_CMD_LEN, idx);
@@ -402,7 +402,7 @@ int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc)
402static int t4_mem_win_rw(struct adapter *adap, u32 addr, __be32 *data, int dir) 402static int t4_mem_win_rw(struct adapter *adap, u32 addr, __be32 *data, int dir)
403{ 403{
404 int i; 404 int i;
405 u32 win_pf = is_t4(adap->chip) ? 0 : V_PFNUM(adap->fn); 405 u32 win_pf = is_t4(adap->params.chip) ? 0 : V_PFNUM(adap->fn);
406 406
407 /* 407 /*
408 * Setup offset into PCIE memory window. Address must be a 408 * Setup offset into PCIE memory window. Address must be a
@@ -863,104 +863,169 @@ unlock:
863} 863}
864 864
865/** 865/**
866 * get_fw_version - read the firmware version 866 * t4_get_fw_version - read the firmware version
867 * @adapter: the adapter 867 * @adapter: the adapter
868 * @vers: where to place the version 868 * @vers: where to place the version
869 * 869 *
870 * Reads the FW version from flash. 870 * Reads the FW version from flash.
871 */ 871 */
872static int get_fw_version(struct adapter *adapter, u32 *vers) 872int t4_get_fw_version(struct adapter *adapter, u32 *vers)
873{ 873{
874 return t4_read_flash(adapter, adapter->params.sf_fw_start + 874 return t4_read_flash(adapter, FLASH_FW_START +
875 offsetof(struct fw_hdr, fw_ver), 1, vers, 0); 875 offsetof(struct fw_hdr, fw_ver), 1,
876 vers, 0);
876} 877}
877 878
878/** 879/**
879 * get_tp_version - read the TP microcode version 880 * t4_get_tp_version - read the TP microcode version
880 * @adapter: the adapter 881 * @adapter: the adapter
881 * @vers: where to place the version 882 * @vers: where to place the version
882 * 883 *
883 * Reads the TP microcode version from flash. 884 * Reads the TP microcode version from flash.
884 */ 885 */
885static int get_tp_version(struct adapter *adapter, u32 *vers) 886int t4_get_tp_version(struct adapter *adapter, u32 *vers)
886{ 887{
887 return t4_read_flash(adapter, adapter->params.sf_fw_start + 888 return t4_read_flash(adapter, FLASH_FW_START +
888 offsetof(struct fw_hdr, tp_microcode_ver), 889 offsetof(struct fw_hdr, tp_microcode_ver),
889 1, vers, 0); 890 1, vers, 0);
890} 891}
891 892
892/** 893/* Is the given firmware API compatible with the one the driver was compiled
893 * t4_check_fw_version - check if the FW is compatible with this driver 894 * with?
894 * @adapter: the adapter
895 *
896 * Checks if an adapter's FW is compatible with the driver. Returns 0
897 * if there's exact match, a negative error if the version could not be
898 * read or there's a major version mismatch, and a positive value if the
899 * expected major version is found but there's a minor version mismatch.
900 */ 895 */
901int t4_check_fw_version(struct adapter *adapter) 896static int fw_compatible(const struct fw_hdr *hdr1, const struct fw_hdr *hdr2)
902{ 897{
903 u32 api_vers[2];
904 int ret, major, minor, micro;
905 int exp_major, exp_minor, exp_micro;
906 898
907 ret = get_fw_version(adapter, &adapter->params.fw_vers); 899 /* short circuit if it's the exact same firmware version */
908 if (!ret) 900 if (hdr1->chip == hdr2->chip && hdr1->fw_ver == hdr2->fw_ver)
909 ret = get_tp_version(adapter, &adapter->params.tp_vers); 901 return 1;
910 if (!ret)
911 ret = t4_read_flash(adapter, adapter->params.sf_fw_start +
912 offsetof(struct fw_hdr, intfver_nic),
913 2, api_vers, 1);
914 if (ret)
915 return ret;
916 902
917 major = FW_HDR_FW_VER_MAJOR_GET(adapter->params.fw_vers); 903#define SAME_INTF(x) (hdr1->intfver_##x == hdr2->intfver_##x)
918 minor = FW_HDR_FW_VER_MINOR_GET(adapter->params.fw_vers); 904 if (hdr1->chip == hdr2->chip && SAME_INTF(nic) && SAME_INTF(vnic) &&
919 micro = FW_HDR_FW_VER_MICRO_GET(adapter->params.fw_vers); 905 SAME_INTF(ri) && SAME_INTF(iscsi) && SAME_INTF(fcoe))
906 return 1;
907#undef SAME_INTF
920 908
921 switch (CHELSIO_CHIP_VERSION(adapter->chip)) { 909 return 0;
922 case CHELSIO_T4: 910}
923 exp_major = FW_VERSION_MAJOR;
924 exp_minor = FW_VERSION_MINOR;
925 exp_micro = FW_VERSION_MICRO;
926 break;
927 case CHELSIO_T5:
928 exp_major = FW_VERSION_MAJOR_T5;
929 exp_minor = FW_VERSION_MINOR_T5;
930 exp_micro = FW_VERSION_MICRO_T5;
931 break;
932 default:
933 dev_err(adapter->pdev_dev, "Unsupported chip type, %x\n",
934 adapter->chip);
935 return -EINVAL;
936 }
937 911
938 memcpy(adapter->params.api_vers, api_vers, 912/* The firmware in the filesystem is usable, but should it be installed?
939 sizeof(adapter->params.api_vers)); 913 * This routine explains itself in detail if it indicates the filesystem
914 * firmware should be installed.
915 */
916static int should_install_fs_fw(struct adapter *adap, int card_fw_usable,
917 int k, int c)
918{
919 const char *reason;
940 920
941 if (major < exp_major || (major == exp_major && minor < exp_minor) || 921 if (!card_fw_usable) {
942 (major == exp_major && minor == exp_minor && micro < exp_micro)) { 922 reason = "incompatible or unusable";
943 dev_err(adapter->pdev_dev, 923 goto install;
944 "Card has firmware version %u.%u.%u, minimum "
945 "supported firmware is %u.%u.%u.\n", major, minor,
946 micro, exp_major, exp_minor, exp_micro);
947 return -EFAULT;
948 } 924 }
949 925
950 if (major != exp_major) { /* major mismatch - fail */ 926 if (k > c) {
951 dev_err(adapter->pdev_dev, 927 reason = "older than the version supported with this driver";
952 "card FW has major version %u, driver wants %u\n", 928 goto install;
953 major, exp_major);
954 return -EINVAL;
955 } 929 }
956 930
957 if (minor == exp_minor && micro == exp_micro) 931 return 0;
958 return 0; /* perfect match */ 932
933install:
934 dev_err(adap->pdev_dev, "firmware on card (%u.%u.%u.%u) is %s, "
935 "installing firmware %u.%u.%u.%u on card.\n",
936 FW_HDR_FW_VER_MAJOR_GET(c), FW_HDR_FW_VER_MINOR_GET(c),
937 FW_HDR_FW_VER_MICRO_GET(c), FW_HDR_FW_VER_BUILD_GET(c), reason,
938 FW_HDR_FW_VER_MAJOR_GET(k), FW_HDR_FW_VER_MINOR_GET(k),
939 FW_HDR_FW_VER_MICRO_GET(k), FW_HDR_FW_VER_BUILD_GET(k));
959 940
960 /* Minor/micro version mismatch. Report it but often it's OK. */
961 return 1; 941 return 1;
962} 942}
963 943
944int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info,
945 const u8 *fw_data, unsigned int fw_size,
946 struct fw_hdr *card_fw, enum dev_state state,
947 int *reset)
948{
949 int ret, card_fw_usable, fs_fw_usable;
950 const struct fw_hdr *fs_fw;
951 const struct fw_hdr *drv_fw;
952
953 drv_fw = &fw_info->fw_hdr;
954
955 /* Read the header of the firmware on the card */
956 ret = -t4_read_flash(adap, FLASH_FW_START,
957 sizeof(*card_fw) / sizeof(uint32_t),
958 (uint32_t *)card_fw, 1);
959 if (ret == 0) {
960 card_fw_usable = fw_compatible(drv_fw, (const void *)card_fw);
961 } else {
962 dev_err(adap->pdev_dev,
963 "Unable to read card's firmware header: %d\n", ret);
964 card_fw_usable = 0;
965 }
966
967 if (fw_data != NULL) {
968 fs_fw = (const void *)fw_data;
969 fs_fw_usable = fw_compatible(drv_fw, fs_fw);
970 } else {
971 fs_fw = NULL;
972 fs_fw_usable = 0;
973 }
974
975 if (card_fw_usable && card_fw->fw_ver == drv_fw->fw_ver &&
976 (!fs_fw_usable || fs_fw->fw_ver == drv_fw->fw_ver)) {
977 /* Common case: the firmware on the card is an exact match and
978 * the filesystem one is an exact match too, or the filesystem
979 * one is absent/incompatible.
980 */
981 } else if (fs_fw_usable && state == DEV_STATE_UNINIT &&
982 should_install_fs_fw(adap, card_fw_usable,
983 be32_to_cpu(fs_fw->fw_ver),
984 be32_to_cpu(card_fw->fw_ver))) {
985 ret = -t4_fw_upgrade(adap, adap->mbox, fw_data,
986 fw_size, 0);
987 if (ret != 0) {
988 dev_err(adap->pdev_dev,
989 "failed to install firmware: %d\n", ret);
990 goto bye;
991 }
992
993 /* Installed successfully, update the cached header too. */
994 memcpy(card_fw, fs_fw, sizeof(*card_fw));
995 card_fw_usable = 1;
996 *reset = 0; /* already reset as part of load_fw */
997 }
998
999 if (!card_fw_usable) {
1000 uint32_t d, c, k;
1001
1002 d = be32_to_cpu(drv_fw->fw_ver);
1003 c = be32_to_cpu(card_fw->fw_ver);
1004 k = fs_fw ? be32_to_cpu(fs_fw->fw_ver) : 0;
1005
1006 dev_err(adap->pdev_dev, "Cannot find a usable firmware: "
1007 "chip state %d, "
1008 "driver compiled with %d.%d.%d.%d, "
1009 "card has %d.%d.%d.%d, filesystem has %d.%d.%d.%d\n",
1010 state,
1011 FW_HDR_FW_VER_MAJOR_GET(d), FW_HDR_FW_VER_MINOR_GET(d),
1012 FW_HDR_FW_VER_MICRO_GET(d), FW_HDR_FW_VER_BUILD_GET(d),
1013 FW_HDR_FW_VER_MAJOR_GET(c), FW_HDR_FW_VER_MINOR_GET(c),
1014 FW_HDR_FW_VER_MICRO_GET(c), FW_HDR_FW_VER_BUILD_GET(c),
1015 FW_HDR_FW_VER_MAJOR_GET(k), FW_HDR_FW_VER_MINOR_GET(k),
1016 FW_HDR_FW_VER_MICRO_GET(k), FW_HDR_FW_VER_BUILD_GET(k));
1017 ret = EINVAL;
1018 goto bye;
1019 }
1020
1021 /* We're using whatever's on the card and it's known to be good. */
1022 adap->params.fw_vers = be32_to_cpu(card_fw->fw_ver);
1023 adap->params.tp_vers = be32_to_cpu(card_fw->tp_microcode_ver);
1024
1025bye:
1026 return ret;
1027}
1028
964/** 1029/**
965 * t4_flash_erase_sectors - erase a range of flash sectors 1030 * t4_flash_erase_sectors - erase a range of flash sectors
966 * @adapter: the adapter 1031 * @adapter: the adapter
@@ -1368,7 +1433,7 @@ static void pcie_intr_handler(struct adapter *adapter)
1368 PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS, 1433 PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS,
1369 pcie_port_intr_info) + 1434 pcie_port_intr_info) +
1370 t4_handle_intr_status(adapter, PCIE_INT_CAUSE, 1435 t4_handle_intr_status(adapter, PCIE_INT_CAUSE,
1371 is_t4(adapter->chip) ? 1436 is_t4(adapter->params.chip) ?
1372 pcie_intr_info : t5_pcie_intr_info); 1437 pcie_intr_info : t5_pcie_intr_info);
1373 1438
1374 if (fat) 1439 if (fat)
@@ -1782,7 +1847,7 @@ static void xgmac_intr_handler(struct adapter *adap, int port)
1782{ 1847{
1783 u32 v, int_cause_reg; 1848 u32 v, int_cause_reg;
1784 1849
1785 if (is_t4(adap->chip)) 1850 if (is_t4(adap->params.chip))
1786 int_cause_reg = PORT_REG(port, XGMAC_PORT_INT_CAUSE); 1851 int_cause_reg = PORT_REG(port, XGMAC_PORT_INT_CAUSE);
1787 else 1852 else
1788 int_cause_reg = T5_PORT_REG(port, MAC_PORT_INT_CAUSE); 1853 int_cause_reg = T5_PORT_REG(port, MAC_PORT_INT_CAUSE);
@@ -2250,7 +2315,7 @@ void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p)
2250 2315
2251#define GET_STAT(name) \ 2316#define GET_STAT(name) \
2252 t4_read_reg64(adap, \ 2317 t4_read_reg64(adap, \
2253 (is_t4(adap->chip) ? PORT_REG(idx, MPS_PORT_STAT_##name##_L) : \ 2318 (is_t4(adap->params.chip) ? PORT_REG(idx, MPS_PORT_STAT_##name##_L) : \
2254 T5_PORT_REG(idx, MPS_PORT_STAT_##name##_L))) 2319 T5_PORT_REG(idx, MPS_PORT_STAT_##name##_L)))
2255#define GET_STAT_COM(name) t4_read_reg64(adap, MPS_STAT_##name##_L) 2320#define GET_STAT_COM(name) t4_read_reg64(adap, MPS_STAT_##name##_L)
2256 2321
@@ -2332,7 +2397,7 @@ void t4_wol_magic_enable(struct adapter *adap, unsigned int port,
2332{ 2397{
2333 u32 mag_id_reg_l, mag_id_reg_h, port_cfg_reg; 2398 u32 mag_id_reg_l, mag_id_reg_h, port_cfg_reg;
2334 2399
2335 if (is_t4(adap->chip)) { 2400 if (is_t4(adap->params.chip)) {
2336 mag_id_reg_l = PORT_REG(port, XGMAC_PORT_MAGIC_MACID_LO); 2401 mag_id_reg_l = PORT_REG(port, XGMAC_PORT_MAGIC_MACID_LO);
2337 mag_id_reg_h = PORT_REG(port, XGMAC_PORT_MAGIC_MACID_HI); 2402 mag_id_reg_h = PORT_REG(port, XGMAC_PORT_MAGIC_MACID_HI);
2338 port_cfg_reg = PORT_REG(port, XGMAC_PORT_CFG2); 2403 port_cfg_reg = PORT_REG(port, XGMAC_PORT_CFG2);
@@ -2374,7 +2439,7 @@ int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
2374 int i; 2439 int i;
2375 u32 port_cfg_reg; 2440 u32 port_cfg_reg;
2376 2441
2377 if (is_t4(adap->chip)) 2442 if (is_t4(adap->params.chip))
2378 port_cfg_reg = PORT_REG(port, XGMAC_PORT_CFG2); 2443 port_cfg_reg = PORT_REG(port, XGMAC_PORT_CFG2);
2379 else 2444 else
2380 port_cfg_reg = T5_PORT_REG(port, MAC_PORT_CFG2); 2445 port_cfg_reg = T5_PORT_REG(port, MAC_PORT_CFG2);
@@ -2387,7 +2452,7 @@ int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
2387 return -EINVAL; 2452 return -EINVAL;
2388 2453
2389#define EPIO_REG(name) \ 2454#define EPIO_REG(name) \
2390 (is_t4(adap->chip) ? PORT_REG(port, XGMAC_PORT_EPIO_##name) : \ 2455 (is_t4(adap->params.chip) ? PORT_REG(port, XGMAC_PORT_EPIO_##name) : \
2391 T5_PORT_REG(port, MAC_PORT_EPIO_##name)) 2456 T5_PORT_REG(port, MAC_PORT_EPIO_##name))
2392 2457
2393 t4_write_reg(adap, EPIO_REG(DATA1), mask0 >> 32); 2458 t4_write_reg(adap, EPIO_REG(DATA1), mask0 >> 32);
@@ -2474,7 +2539,7 @@ int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox,
2474int t4_mem_win_read_len(struct adapter *adap, u32 addr, __be32 *data, int len) 2539int t4_mem_win_read_len(struct adapter *adap, u32 addr, __be32 *data, int len)
2475{ 2540{
2476 int i, off; 2541 int i, off;
2477 u32 win_pf = is_t4(adap->chip) ? 0 : V_PFNUM(adap->fn); 2542 u32 win_pf = is_t4(adap->params.chip) ? 0 : V_PFNUM(adap->fn);
2478 2543
2479 /* Align on a 2KB boundary. 2544 /* Align on a 2KB boundary.
2480 */ 2545 */
@@ -3306,7 +3371,7 @@ int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox,
3306 int i, ret; 3371 int i, ret;
3307 struct fw_vi_mac_cmd c; 3372 struct fw_vi_mac_cmd c;
3308 struct fw_vi_mac_exact *p; 3373 struct fw_vi_mac_exact *p;
3309 unsigned int max_naddr = is_t4(adap->chip) ? 3374 unsigned int max_naddr = is_t4(adap->params.chip) ?
3310 NUM_MPS_CLS_SRAM_L_INSTANCES : 3375 NUM_MPS_CLS_SRAM_L_INSTANCES :
3311 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 3376 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
3312 3377
@@ -3368,7 +3433,7 @@ int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
3368 int ret, mode; 3433 int ret, mode;
3369 struct fw_vi_mac_cmd c; 3434 struct fw_vi_mac_cmd c;
3370 struct fw_vi_mac_exact *p = c.u.exact; 3435 struct fw_vi_mac_exact *p = c.u.exact;
3371 unsigned int max_mac_addr = is_t4(adap->chip) ? 3436 unsigned int max_mac_addr = is_t4(adap->params.chip) ?
3372 NUM_MPS_CLS_SRAM_L_INSTANCES : 3437 NUM_MPS_CLS_SRAM_L_INSTANCES :
3373 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 3438 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
3374 3439
@@ -3699,13 +3764,14 @@ int t4_prep_adapter(struct adapter *adapter)
3699{ 3764{
3700 int ret, ver; 3765 int ret, ver;
3701 uint16_t device_id; 3766 uint16_t device_id;
3767 u32 pl_rev;
3702 3768
3703 ret = t4_wait_dev_ready(adapter); 3769 ret = t4_wait_dev_ready(adapter);
3704 if (ret < 0) 3770 if (ret < 0)
3705 return ret; 3771 return ret;
3706 3772
3707 get_pci_mode(adapter, &adapter->params.pci); 3773 get_pci_mode(adapter, &adapter->params.pci);
3708 adapter->params.rev = t4_read_reg(adapter, PL_REV); 3774 pl_rev = G_REV(t4_read_reg(adapter, PL_REV));
3709 3775
3710 ret = get_flash_params(adapter); 3776 ret = get_flash_params(adapter);
3711 if (ret < 0) { 3777 if (ret < 0) {
@@ -3717,14 +3783,13 @@ int t4_prep_adapter(struct adapter *adapter)
3717 */ 3783 */
3718 pci_read_config_word(adapter->pdev, PCI_DEVICE_ID, &device_id); 3784 pci_read_config_word(adapter->pdev, PCI_DEVICE_ID, &device_id);
3719 ver = device_id >> 12; 3785 ver = device_id >> 12;
3786 adapter->params.chip = 0;
3720 switch (ver) { 3787 switch (ver) {
3721 case CHELSIO_T4: 3788 case CHELSIO_T4:
3722 adapter->chip = CHELSIO_CHIP_CODE(CHELSIO_T4, 3789 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, pl_rev);
3723 adapter->params.rev);
3724 break; 3790 break;
3725 case CHELSIO_T5: 3791 case CHELSIO_T5:
3726 adapter->chip = CHELSIO_CHIP_CODE(CHELSIO_T5, 3792 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, pl_rev);
3727 adapter->params.rev);
3728 break; 3793 break;
3729 default: 3794 default:
3730 dev_err(adapter->pdev_dev, "Device %d is not supported\n", 3795 dev_err(adapter->pdev_dev, "Device %d is not supported\n",
@@ -3732,9 +3797,6 @@ int t4_prep_adapter(struct adapter *adapter)
3732 return -EINVAL; 3797 return -EINVAL;
3733 } 3798 }
3734 3799
3735 /* Reassign the updated revision field */
3736 adapter->params.rev = adapter->chip;
3737
3738 init_cong_ctrl(adapter->params.a_wnd, adapter->params.b_wnd); 3800 init_cong_ctrl(adapter->params.a_wnd, adapter->params.b_wnd);
3739 3801
3740 /* 3802 /*
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
index ef146c0ba481..0a8205d69d2c 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
@@ -1092,6 +1092,11 @@
1092 1092
1093#define PL_REV 0x1943c 1093#define PL_REV 0x1943c
1094 1094
1095#define S_REV 0
1096#define M_REV 0xfU
1097#define V_REV(x) ((x) << S_REV)
1098#define G_REV(x) (((x) >> S_REV) & M_REV)
1099
1095#define LE_DB_CONFIG 0x19c04 1100#define LE_DB_CONFIG 0x19c04
1096#define HASHEN 0x00100000U 1101#define HASHEN 0x00100000U
1097 1102
@@ -1199,4 +1204,13 @@
1199#define EDC_STRIDE_T5 (EDC_T51_BASE_ADDR - EDC_T50_BASE_ADDR) 1204#define EDC_STRIDE_T5 (EDC_T51_BASE_ADDR - EDC_T50_BASE_ADDR)
1200#define EDC_REG_T5(reg, idx) (reg + EDC_STRIDE_T5 * idx) 1205#define EDC_REG_T5(reg, idx) (reg + EDC_STRIDE_T5 * idx)
1201 1206
1207#define A_PL_VF_REV 0x4
1208#define A_PL_VF_WHOAMI 0x0
1209#define A_PL_VF_REVISION 0x8
1210
1211#define S_CHIPID 4
1212#define M_CHIPID 0xfU
1213#define V_CHIPID(x) ((x) << S_CHIPID)
1214#define G_CHIPID(x) (((x) >> S_CHIPID) & M_CHIPID)
1215
1202#endif /* __T4_REGS_H */ 1216#endif /* __T4_REGS_H */
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
index 6f77ac487743..74fea74ce0aa 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
@@ -2157,7 +2157,7 @@ struct fw_debug_cmd {
2157 2157
2158struct fw_hdr { 2158struct fw_hdr {
2159 u8 ver; 2159 u8 ver;
2160 u8 reserved1; 2160 u8 chip; /* terminator chip type */
2161 __be16 len512; /* bin length in units of 512-bytes */ 2161 __be16 len512; /* bin length in units of 512-bytes */
2162 __be32 fw_ver; /* firmware version */ 2162 __be32 fw_ver; /* firmware version */
2163 __be32 tp_microcode_ver; 2163 __be32 tp_microcode_ver;
@@ -2176,6 +2176,11 @@ struct fw_hdr {
2176 __be32 reserved6[23]; 2176 __be32 reserved6[23];
2177}; 2177};
2178 2178
2179enum fw_hdr_chip {
2180 FW_HDR_CHIP_T4,
2181 FW_HDR_CHIP_T5
2182};
2183
2179#define FW_HDR_FW_VER_MAJOR_GET(x) (((x) >> 24) & 0xff) 2184#define FW_HDR_FW_VER_MAJOR_GET(x) (((x) >> 24) & 0xff)
2180#define FW_HDR_FW_VER_MINOR_GET(x) (((x) >> 16) & 0xff) 2185#define FW_HDR_FW_VER_MINOR_GET(x) (((x) >> 16) & 0xff)
2181#define FW_HDR_FW_VER_MICRO_GET(x) (((x) >> 8) & 0xff) 2186#define FW_HDR_FW_VER_MICRO_GET(x) (((x) >> 8) & 0xff)