diff options
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/cxgb4.h')
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 82 |
1 files changed, 53 insertions, 29 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h index ecd2fb3ef695..6c9308850453 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | |||
@@ -49,13 +49,15 @@ | |||
49 | #include <asm/io.h> | 49 | #include <asm/io.h> |
50 | #include "cxgb4_uld.h" | 50 | #include "cxgb4_uld.h" |
51 | 51 | ||
52 | #define FW_VERSION_MAJOR 1 | 52 | #define T4FW_VERSION_MAJOR 0x01 |
53 | #define FW_VERSION_MINOR 4 | 53 | #define T4FW_VERSION_MINOR 0x06 |
54 | #define FW_VERSION_MICRO 0 | 54 | #define T4FW_VERSION_MICRO 0x18 |
55 | #define T4FW_VERSION_BUILD 0x00 | ||
55 | 56 | ||
56 | #define FW_VERSION_MAJOR_T5 0 | 57 | #define T5FW_VERSION_MAJOR 0x01 |
57 | #define FW_VERSION_MINOR_T5 0 | 58 | #define T5FW_VERSION_MINOR 0x08 |
58 | #define FW_VERSION_MICRO_T5 0 | 59 | #define T5FW_VERSION_MICRO 0x1C |
60 | #define T5FW_VERSION_BUILD 0x00 | ||
59 | 61 | ||
60 | #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__) | 62 | #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__) |
61 | 63 | ||
@@ -240,6 +242,26 @@ struct pci_params { | |||
240 | unsigned char width; | 242 | unsigned char width; |
241 | }; | 243 | }; |
242 | 244 | ||
245 | #define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision)) | ||
246 | #define CHELSIO_CHIP_FPGA 0x100 | ||
247 | #define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf) | ||
248 | #define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf) | ||
249 | |||
250 | #define CHELSIO_T4 0x4 | ||
251 | #define CHELSIO_T5 0x5 | ||
252 | |||
253 | enum chip_type { | ||
254 | T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1), | ||
255 | T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2), | ||
256 | T4_FIRST_REV = T4_A1, | ||
257 | T4_LAST_REV = T4_A2, | ||
258 | |||
259 | T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0), | ||
260 | T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1), | ||
261 | T5_FIRST_REV = T5_A0, | ||
262 | T5_LAST_REV = T5_A1, | ||
263 | }; | ||
264 | |||
243 | struct adapter_params { | 265 | struct adapter_params { |
244 | struct tp_params tp; | 266 | struct tp_params tp; |
245 | struct vpd_params vpd; | 267 | struct vpd_params vpd; |
@@ -259,7 +281,7 @@ struct adapter_params { | |||
259 | 281 | ||
260 | unsigned char nports; /* # of ethernet ports */ | 282 | unsigned char nports; /* # of ethernet ports */ |
261 | unsigned char portvec; | 283 | unsigned char portvec; |
262 | unsigned char rev; /* chip revision */ | 284 | enum chip_type chip; /* chip code */ |
263 | unsigned char offload; | 285 | unsigned char offload; |
264 | 286 | ||
265 | unsigned char bypass; | 287 | unsigned char bypass; |
@@ -267,6 +289,23 @@ struct adapter_params { | |||
267 | unsigned int ofldq_wr_cred; | 289 | unsigned int ofldq_wr_cred; |
268 | }; | 290 | }; |
269 | 291 | ||
292 | #include "t4fw_api.h" | ||
293 | |||
294 | #define FW_VERSION(chip) ( \ | ||
295 | FW_HDR_FW_VER_MAJOR_GET(chip##FW_VERSION_MAJOR) | \ | ||
296 | FW_HDR_FW_VER_MINOR_GET(chip##FW_VERSION_MINOR) | \ | ||
297 | FW_HDR_FW_VER_MICRO_GET(chip##FW_VERSION_MICRO) | \ | ||
298 | FW_HDR_FW_VER_BUILD_GET(chip##FW_VERSION_BUILD)) | ||
299 | #define FW_INTFVER(chip, intf) (FW_HDR_INTFVER_##intf) | ||
300 | |||
301 | struct fw_info { | ||
302 | u8 chip; | ||
303 | char *fs_name; | ||
304 | char *fw_mod_name; | ||
305 | struct fw_hdr fw_hdr; | ||
306 | }; | ||
307 | |||
308 | |||
270 | struct trace_params { | 309 | struct trace_params { |
271 | u32 data[TRACE_LEN / 4]; | 310 | u32 data[TRACE_LEN / 4]; |
272 | u32 mask[TRACE_LEN / 4]; | 311 | u32 mask[TRACE_LEN / 4]; |
@@ -512,25 +551,6 @@ struct sge { | |||
512 | 551 | ||
513 | struct l2t_data; | 552 | struct l2t_data; |
514 | 553 | ||
515 | #define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision)) | ||
516 | #define CHELSIO_CHIP_VERSION(code) ((code) >> 4) | ||
517 | #define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf) | ||
518 | |||
519 | #define CHELSIO_T4 0x4 | ||
520 | #define CHELSIO_T5 0x5 | ||
521 | |||
522 | enum chip_type { | ||
523 | T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 0), | ||
524 | T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1), | ||
525 | T4_A3 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2), | ||
526 | T4_FIRST_REV = T4_A1, | ||
527 | T4_LAST_REV = T4_A3, | ||
528 | |||
529 | T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0), | ||
530 | T5_FIRST_REV = T5_A1, | ||
531 | T5_LAST_REV = T5_A1, | ||
532 | }; | ||
533 | |||
534 | #ifdef CONFIG_PCI_IOV | 554 | #ifdef CONFIG_PCI_IOV |
535 | 555 | ||
536 | /* T4 supports SRIOV on PF0-3 and T5 on PF0-7. However, the Serial | 556 | /* T4 supports SRIOV on PF0-3 and T5 on PF0-7. However, the Serial |
@@ -715,12 +735,12 @@ enum { | |||
715 | 735 | ||
716 | static inline int is_t5(enum chip_type chip) | 736 | static inline int is_t5(enum chip_type chip) |
717 | { | 737 | { |
718 | return (chip >= T5_FIRST_REV && chip <= T5_LAST_REV); | 738 | return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5; |
719 | } | 739 | } |
720 | 740 | ||
721 | static inline int is_t4(enum chip_type chip) | 741 | static inline int is_t4(enum chip_type chip) |
722 | { | 742 | { |
723 | return (chip >= T4_FIRST_REV && chip <= T4_LAST_REV); | 743 | return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4; |
724 | } | 744 | } |
725 | 745 | ||
726 | static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr) | 746 | static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr) |
@@ -900,7 +920,11 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p); | |||
900 | int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); | 920 | int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); |
901 | unsigned int t4_flash_cfg_addr(struct adapter *adapter); | 921 | unsigned int t4_flash_cfg_addr(struct adapter *adapter); |
902 | int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); | 922 | int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); |
903 | int t4_check_fw_version(struct adapter *adapter); | 923 | int t4_get_fw_version(struct adapter *adapter, u32 *vers); |
924 | int t4_get_tp_version(struct adapter *adapter, u32 *vers); | ||
925 | int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, | ||
926 | const u8 *fw_data, unsigned int fw_size, | ||
927 | struct fw_hdr *card_fw, enum dev_state state, int *reset); | ||
904 | int t4_prep_adapter(struct adapter *adapter); | 928 | int t4_prep_adapter(struct adapter *adapter); |
905 | int t4_port_init(struct adapter *adap, int mbox, int pf, int vf); | 929 | int t4_port_init(struct adapter *adap, int mbox, int pf, int vf); |
906 | void t4_fatal_err(struct adapter *adapter); | 930 | void t4_fatal_err(struct adapter *adapter); |