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path: root/drivers/net/ethernet/cadence/macb.c
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Diffstat (limited to 'drivers/net/ethernet/cadence/macb.c')
-rw-r--r--drivers/net/ethernet/cadence/macb.c269
1 files changed, 228 insertions, 41 deletions
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index aa1d597091a8..f3d5c65d99cf 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Atmel MACB Ethernet Controller driver 2 * Cadence MACB/GEM Ethernet Controller driver
3 * 3 *
4 * Copyright (C) 2004-2006 Atmel Corporation 4 * Copyright (C) 2004-2006 Atmel Corporation
5 * 5 *
@@ -23,6 +23,9 @@
23#include <linux/platform_data/macb.h> 23#include <linux/platform_data/macb.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/phy.h> 25#include <linux/phy.h>
26#include <linux/of.h>
27#include <linux/of_device.h>
28#include <linux/of_net.h>
26 29
27#include "macb.h" 30#include "macb.h"
28 31
@@ -59,9 +62,9 @@ static void __macb_set_hwaddr(struct macb *bp)
59 u16 top; 62 u16 top;
60 63
61 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr)); 64 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr));
62 macb_writel(bp, SA1B, bottom); 65 macb_or_gem_writel(bp, SA1B, bottom);
63 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); 66 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4)));
64 macb_writel(bp, SA1T, top); 67 macb_or_gem_writel(bp, SA1T, top);
65} 68}
66 69
67static void __init macb_get_hwaddr(struct macb *bp) 70static void __init macb_get_hwaddr(struct macb *bp)
@@ -70,8 +73,8 @@ static void __init macb_get_hwaddr(struct macb *bp)
70 u16 top; 73 u16 top;
71 u8 addr[6]; 74 u8 addr[6];
72 75
73 bottom = macb_readl(bp, SA1B); 76 bottom = macb_or_gem_readl(bp, SA1B);
74 top = macb_readl(bp, SA1T); 77 top = macb_or_gem_readl(bp, SA1T);
75 78
76 addr[0] = bottom & 0xff; 79 addr[0] = bottom & 0xff;
77 addr[1] = (bottom >> 8) & 0xff; 80 addr[1] = (bottom >> 8) & 0xff;
@@ -191,7 +194,6 @@ static int macb_mii_probe(struct net_device *dev)
191{ 194{
192 struct macb *bp = netdev_priv(dev); 195 struct macb *bp = netdev_priv(dev);
193 struct phy_device *phydev; 196 struct phy_device *phydev;
194 struct macb_platform_data *pdata;
195 int ret; 197 int ret;
196 198
197 phydev = phy_find_first(bp->mii_bus); 199 phydev = phy_find_first(bp->mii_bus);
@@ -200,14 +202,11 @@ static int macb_mii_probe(struct net_device *dev)
200 return -1; 202 return -1;
201 } 203 }
202 204
203 pdata = bp->pdev->dev.platform_data;
204 /* TODO : add pin_irq */ 205 /* TODO : add pin_irq */
205 206
206 /* attach the mac to the phy */ 207 /* attach the mac to the phy */
207 ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0, 208 ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0,
208 pdata && pdata->is_rmii ? 209 bp->phy_interface);
209 PHY_INTERFACE_MODE_RMII :
210 PHY_INTERFACE_MODE_MII);
211 if (ret) { 210 if (ret) {
212 netdev_err(dev, "Could not attach to PHY\n"); 211 netdev_err(dev, "Could not attach to PHY\n");
213 return ret; 212 return ret;
@@ -285,8 +284,8 @@ err_out:
285static void macb_update_stats(struct macb *bp) 284static void macb_update_stats(struct macb *bp)
286{ 285{
287 u32 __iomem *reg = bp->regs + MACB_PFR; 286 u32 __iomem *reg = bp->regs + MACB_PFR;
288 u32 *p = &bp->hw_stats.rx_pause_frames; 287 u32 *p = &bp->hw_stats.macb.rx_pause_frames;
289 u32 *end = &bp->hw_stats.tx_pause_frames + 1; 288 u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1;
290 289
291 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); 290 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
292 291
@@ -580,7 +579,10 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
580 579
581 if (status & MACB_BIT(ISR_ROVR)) { 580 if (status & MACB_BIT(ISR_ROVR)) {
582 /* We missed at least one packet */ 581 /* We missed at least one packet */
583 bp->hw_stats.rx_overruns++; 582 if (macb_is_gem(bp))
583 bp->hw_stats.gem.rx_overruns++;
584 else
585 bp->hw_stats.macb.rx_overruns++;
584 } 586 }
585 587
586 if (status & MACB_BIT(HRESP)) { 588 if (status & MACB_BIT(HRESP)) {
@@ -790,6 +792,84 @@ static void macb_reset_hw(struct macb *bp)
790 macb_readl(bp, ISR); 792 macb_readl(bp, ISR);
791} 793}
792 794
795static u32 gem_mdc_clk_div(struct macb *bp)
796{
797 u32 config;
798 unsigned long pclk_hz = clk_get_rate(bp->pclk);
799
800 if (pclk_hz <= 20000000)
801 config = GEM_BF(CLK, GEM_CLK_DIV8);
802 else if (pclk_hz <= 40000000)
803 config = GEM_BF(CLK, GEM_CLK_DIV16);
804 else if (pclk_hz <= 80000000)
805 config = GEM_BF(CLK, GEM_CLK_DIV32);
806 else if (pclk_hz <= 120000000)
807 config = GEM_BF(CLK, GEM_CLK_DIV48);
808 else if (pclk_hz <= 160000000)
809 config = GEM_BF(CLK, GEM_CLK_DIV64);
810 else
811 config = GEM_BF(CLK, GEM_CLK_DIV96);
812
813 return config;
814}
815
816static u32 macb_mdc_clk_div(struct macb *bp)
817{
818 u32 config;
819 unsigned long pclk_hz;
820
821 if (macb_is_gem(bp))
822 return gem_mdc_clk_div(bp);
823
824 pclk_hz = clk_get_rate(bp->pclk);
825 if (pclk_hz <= 20000000)
826 config = MACB_BF(CLK, MACB_CLK_DIV8);
827 else if (pclk_hz <= 40000000)
828 config = MACB_BF(CLK, MACB_CLK_DIV16);
829 else if (pclk_hz <= 80000000)
830 config = MACB_BF(CLK, MACB_CLK_DIV32);
831 else
832 config = MACB_BF(CLK, MACB_CLK_DIV64);
833
834 return config;
835}
836
837/*
838 * Get the DMA bus width field of the network configuration register that we
839 * should program. We find the width from decoding the design configuration
840 * register to find the maximum supported data bus width.
841 */
842static u32 macb_dbw(struct macb *bp)
843{
844 if (!macb_is_gem(bp))
845 return 0;
846
847 switch (GEM_BFEXT(DBWDEF, gem_readl(bp, DCFG1))) {
848 case 4:
849 return GEM_BF(DBW, GEM_DBW128);
850 case 2:
851 return GEM_BF(DBW, GEM_DBW64);
852 case 1:
853 default:
854 return GEM_BF(DBW, GEM_DBW32);
855 }
856}
857
858/*
859 * Configure the receive DMA engine to use the correct receive buffer size.
860 * This is a configurable parameter for GEM.
861 */
862static void macb_configure_dma(struct macb *bp)
863{
864 u32 dmacfg;
865
866 if (macb_is_gem(bp)) {
867 dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
868 dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64);
869 gem_writel(bp, DMACFG, dmacfg);
870 }
871}
872
793static void macb_init_hw(struct macb *bp) 873static void macb_init_hw(struct macb *bp)
794{ 874{
795 u32 config; 875 u32 config;
@@ -797,7 +877,7 @@ static void macb_init_hw(struct macb *bp)
797 macb_reset_hw(bp); 877 macb_reset_hw(bp);
798 __macb_set_hwaddr(bp); 878 __macb_set_hwaddr(bp);
799 879
800 config = macb_readl(bp, NCFGR) & MACB_BF(CLK, -1L); 880 config = macb_mdc_clk_div(bp);
801 config |= MACB_BIT(PAE); /* PAuse Enable */ 881 config |= MACB_BIT(PAE); /* PAuse Enable */
802 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */ 882 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */
803 config |= MACB_BIT(BIG); /* Receive oversized frames */ 883 config |= MACB_BIT(BIG); /* Receive oversized frames */
@@ -805,8 +885,11 @@ static void macb_init_hw(struct macb *bp)
805 config |= MACB_BIT(CAF); /* Copy All Frames */ 885 config |= MACB_BIT(CAF); /* Copy All Frames */
806 if (!(bp->dev->flags & IFF_BROADCAST)) 886 if (!(bp->dev->flags & IFF_BROADCAST))
807 config |= MACB_BIT(NBC); /* No BroadCast */ 887 config |= MACB_BIT(NBC); /* No BroadCast */
888 config |= macb_dbw(bp);
808 macb_writel(bp, NCFGR, config); 889 macb_writel(bp, NCFGR, config);
809 890
891 macb_configure_dma(bp);
892
810 /* Initialize TX and RX buffers */ 893 /* Initialize TX and RX buffers */
811 macb_writel(bp, RBQP, bp->rx_ring_dma); 894 macb_writel(bp, RBQP, bp->rx_ring_dma);
812 macb_writel(bp, TBQP, bp->tx_ring_dma); 895 macb_writel(bp, TBQP, bp->tx_ring_dma);
@@ -902,8 +985,8 @@ static void macb_sethashtable(struct net_device *dev)
902 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); 985 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
903 } 986 }
904 987
905 macb_writel(bp, HRB, mc_filter[0]); 988 macb_or_gem_writel(bp, HRB, mc_filter[0]);
906 macb_writel(bp, HRT, mc_filter[1]); 989 macb_or_gem_writel(bp, HRT, mc_filter[1]);
907} 990}
908 991
909/* 992/*
@@ -925,8 +1008,8 @@ static void macb_set_rx_mode(struct net_device *dev)
925 1008
926 if (dev->flags & IFF_ALLMULTI) { 1009 if (dev->flags & IFF_ALLMULTI) {
927 /* Enable all multicast mode */ 1010 /* Enable all multicast mode */
928 macb_writel(bp, HRB, -1); 1011 macb_or_gem_writel(bp, HRB, -1);
929 macb_writel(bp, HRT, -1); 1012 macb_or_gem_writel(bp, HRT, -1);
930 cfg |= MACB_BIT(NCFGR_MTI); 1013 cfg |= MACB_BIT(NCFGR_MTI);
931 } else if (!netdev_mc_empty(dev)) { 1014 } else if (!netdev_mc_empty(dev)) {
932 /* Enable specific multicasts */ 1015 /* Enable specific multicasts */
@@ -934,8 +1017,8 @@ static void macb_set_rx_mode(struct net_device *dev)
934 cfg |= MACB_BIT(NCFGR_MTI); 1017 cfg |= MACB_BIT(NCFGR_MTI);
935 } else if (dev->flags & (~IFF_ALLMULTI)) { 1018 } else if (dev->flags & (~IFF_ALLMULTI)) {
936 /* Disable all multicast mode */ 1019 /* Disable all multicast mode */
937 macb_writel(bp, HRB, 0); 1020 macb_or_gem_writel(bp, HRB, 0);
938 macb_writel(bp, HRT, 0); 1021 macb_or_gem_writel(bp, HRT, 0);
939 cfg &= ~MACB_BIT(NCFGR_MTI); 1022 cfg &= ~MACB_BIT(NCFGR_MTI);
940 } 1023 }
941 1024
@@ -997,11 +1080,62 @@ static int macb_close(struct net_device *dev)
997 return 0; 1080 return 0;
998} 1081}
999 1082
1083static void gem_update_stats(struct macb *bp)
1084{
1085 u32 __iomem *reg = bp->regs + GEM_OTX;
1086 u32 *p = &bp->hw_stats.gem.tx_octets_31_0;
1087 u32 *end = &bp->hw_stats.gem.rx_udp_checksum_errors + 1;
1088
1089 for (; p < end; p++, reg++)
1090 *p += __raw_readl(reg);
1091}
1092
1093static struct net_device_stats *gem_get_stats(struct macb *bp)
1094{
1095 struct gem_stats *hwstat = &bp->hw_stats.gem;
1096 struct net_device_stats *nstat = &bp->stats;
1097
1098 gem_update_stats(bp);
1099
1100 nstat->rx_errors = (hwstat->rx_frame_check_sequence_errors +
1101 hwstat->rx_alignment_errors +
1102 hwstat->rx_resource_errors +
1103 hwstat->rx_overruns +
1104 hwstat->rx_oversize_frames +
1105 hwstat->rx_jabbers +
1106 hwstat->rx_undersized_frames +
1107 hwstat->rx_length_field_frame_errors);
1108 nstat->tx_errors = (hwstat->tx_late_collisions +
1109 hwstat->tx_excessive_collisions +
1110 hwstat->tx_underrun +
1111 hwstat->tx_carrier_sense_errors);
1112 nstat->multicast = hwstat->rx_multicast_frames;
1113 nstat->collisions = (hwstat->tx_single_collision_frames +
1114 hwstat->tx_multiple_collision_frames +
1115 hwstat->tx_excessive_collisions);
1116 nstat->rx_length_errors = (hwstat->rx_oversize_frames +
1117 hwstat->rx_jabbers +
1118 hwstat->rx_undersized_frames +
1119 hwstat->rx_length_field_frame_errors);
1120 nstat->rx_over_errors = hwstat->rx_resource_errors;
1121 nstat->rx_crc_errors = hwstat->rx_frame_check_sequence_errors;
1122 nstat->rx_frame_errors = hwstat->rx_alignment_errors;
1123 nstat->rx_fifo_errors = hwstat->rx_overruns;
1124 nstat->tx_aborted_errors = hwstat->tx_excessive_collisions;
1125 nstat->tx_carrier_errors = hwstat->tx_carrier_sense_errors;
1126 nstat->tx_fifo_errors = hwstat->tx_underrun;
1127
1128 return nstat;
1129}
1130
1000static struct net_device_stats *macb_get_stats(struct net_device *dev) 1131static struct net_device_stats *macb_get_stats(struct net_device *dev)
1001{ 1132{
1002 struct macb *bp = netdev_priv(dev); 1133 struct macb *bp = netdev_priv(dev);
1003 struct net_device_stats *nstat = &bp->stats; 1134 struct net_device_stats *nstat = &bp->stats;
1004 struct macb_stats *hwstat = &bp->hw_stats; 1135 struct macb_stats *hwstat = &bp->hw_stats.macb;
1136
1137 if (macb_is_gem(bp))
1138 return gem_get_stats(bp);
1005 1139
1006 /* read stats from hardware */ 1140 /* read stats from hardware */
1007 macb_update_stats(bp); 1141 macb_update_stats(bp);
@@ -1109,6 +1243,52 @@ static const struct net_device_ops macb_netdev_ops = {
1109#endif 1243#endif
1110}; 1244};
1111 1245
1246#if defined(CONFIG_OF)
1247static const struct of_device_id macb_dt_ids[] = {
1248 { .compatible = "cdns,at32ap7000-macb" },
1249 { .compatible = "cdns,at91sam9260-macb" },
1250 { .compatible = "cdns,macb" },
1251 { .compatible = "cdns,pc302-gem" },
1252 { .compatible = "cdns,gem" },
1253 { /* sentinel */ }
1254};
1255
1256MODULE_DEVICE_TABLE(of, macb_dt_ids);
1257
1258static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev)
1259{
1260 struct device_node *np = pdev->dev.of_node;
1261
1262 if (np)
1263 return of_get_phy_mode(np);
1264
1265 return -ENODEV;
1266}
1267
1268static int __devinit macb_get_hwaddr_dt(struct macb *bp)
1269{
1270 struct device_node *np = bp->pdev->dev.of_node;
1271 if (np) {
1272 const char *mac = of_get_mac_address(np);
1273 if (mac) {
1274 memcpy(bp->dev->dev_addr, mac, ETH_ALEN);
1275 return 0;
1276 }
1277 }
1278
1279 return -ENODEV;
1280}
1281#else
1282static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev)
1283{
1284 return -ENODEV;
1285}
1286static int __devinit macb_get_hwaddr_dt(struct macb *bp)
1287{
1288 return -ENODEV;
1289}
1290#endif
1291
1112static int __init macb_probe(struct platform_device *pdev) 1292static int __init macb_probe(struct platform_device *pdev)
1113{ 1293{
1114 struct macb_platform_data *pdata; 1294 struct macb_platform_data *pdata;
@@ -1116,7 +1296,6 @@ static int __init macb_probe(struct platform_device *pdev)
1116 struct net_device *dev; 1296 struct net_device *dev;
1117 struct macb *bp; 1297 struct macb *bp;
1118 struct phy_device *phydev; 1298 struct phy_device *phydev;
1119 unsigned long pclk_hz;
1120 u32 config; 1299 u32 config;
1121 int err = -ENXIO; 1300 int err = -ENXIO;
1122 1301
@@ -1180,31 +1359,37 @@ static int __init macb_probe(struct platform_device *pdev)
1180 dev->base_addr = regs->start; 1359 dev->base_addr = regs->start;
1181 1360
1182 /* Set MII management clock divider */ 1361 /* Set MII management clock divider */
1183 pclk_hz = clk_get_rate(bp->pclk); 1362 config = macb_mdc_clk_div(bp);
1184 if (pclk_hz <= 20000000) 1363 config |= macb_dbw(bp);
1185 config = MACB_BF(CLK, MACB_CLK_DIV8);
1186 else if (pclk_hz <= 40000000)
1187 config = MACB_BF(CLK, MACB_CLK_DIV16);
1188 else if (pclk_hz <= 80000000)
1189 config = MACB_BF(CLK, MACB_CLK_DIV32);
1190 else
1191 config = MACB_BF(CLK, MACB_CLK_DIV64);
1192 macb_writel(bp, NCFGR, config); 1364 macb_writel(bp, NCFGR, config);
1193 1365
1194 macb_get_hwaddr(bp); 1366 err = macb_get_hwaddr_dt(bp);
1195 pdata = pdev->dev.platform_data; 1367 if (err < 0)
1368 macb_get_hwaddr(bp);
1369
1370 err = macb_get_phy_mode_dt(pdev);
1371 if (err < 0) {
1372 pdata = pdev->dev.platform_data;
1373 if (pdata && pdata->is_rmii)
1374 bp->phy_interface = PHY_INTERFACE_MODE_RMII;
1375 else
1376 bp->phy_interface = PHY_INTERFACE_MODE_MII;
1377 } else {
1378 bp->phy_interface = err;
1379 }
1196 1380
1197 if (pdata && pdata->is_rmii) 1381 if (bp->phy_interface == PHY_INTERFACE_MODE_RMII)
1198#if defined(CONFIG_ARCH_AT91) 1382#if defined(CONFIG_ARCH_AT91)
1199 macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) ); 1383 macb_or_gem_writel(bp, USRIO, (MACB_BIT(RMII) |
1384 MACB_BIT(CLKEN)));
1200#else 1385#else
1201 macb_writel(bp, USRIO, 0); 1386 macb_or_gem_writel(bp, USRIO, 0);
1202#endif 1387#endif
1203 else 1388 else
1204#if defined(CONFIG_ARCH_AT91) 1389#if defined(CONFIG_ARCH_AT91)
1205 macb_writel(bp, USRIO, MACB_BIT(CLKEN)); 1390 macb_or_gem_writel(bp, USRIO, MACB_BIT(CLKEN));
1206#else 1391#else
1207 macb_writel(bp, USRIO, MACB_BIT(MII)); 1392 macb_or_gem_writel(bp, USRIO, MACB_BIT(MII));
1208#endif 1393#endif
1209 1394
1210 bp->tx_pending = DEF_TX_RING_PENDING; 1395 bp->tx_pending = DEF_TX_RING_PENDING;
@@ -1221,8 +1406,9 @@ static int __init macb_probe(struct platform_device *pdev)
1221 1406
1222 platform_set_drvdata(pdev, dev); 1407 platform_set_drvdata(pdev, dev);
1223 1408
1224 netdev_info(dev, "Atmel MACB at 0x%08lx irq %d (%pM)\n", 1409 netdev_info(dev, "Cadence %s at 0x%08lx irq %d (%pM)\n",
1225 dev->base_addr, dev->irq, dev->dev_addr); 1410 macb_is_gem(bp) ? "GEM" : "MACB", dev->base_addr,
1411 dev->irq, dev->dev_addr);
1226 1412
1227 phydev = bp->phy_dev; 1413 phydev = bp->phy_dev;
1228 netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", 1414 netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
@@ -1315,6 +1501,7 @@ static struct platform_driver macb_driver = {
1315 .driver = { 1501 .driver = {
1316 .name = "macb", 1502 .name = "macb",
1317 .owner = THIS_MODULE, 1503 .owner = THIS_MODULE,
1504 .of_match_table = of_match_ptr(macb_dt_ids),
1318 }, 1505 },
1319}; 1506};
1320 1507
@@ -1332,6 +1519,6 @@ module_init(macb_init);
1332module_exit(macb_exit); 1519module_exit(macb_exit);
1333 1520
1334MODULE_LICENSE("GPL"); 1521MODULE_LICENSE("GPL");
1335MODULE_DESCRIPTION("Atmel MACB Ethernet driver"); 1522MODULE_DESCRIPTION("Cadence MACB/GEM Ethernet driver");
1336MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); 1523MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1337MODULE_ALIAS("platform:macb"); 1524MODULE_ALIAS("platform:macb");