3 files changed, 35 insertions, 17 deletions

diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index be59ec4b2c30..638e55435b04 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -3192,11 +3192,11 @@ static u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb)
                 rc |= XMIT_CSUM_TCP;
 
         if (skb_is_gso_v6(skb)) {
-                rc |= (XMIT_GSO_V6 | XMIT_CSUM_TCP | XMIT_CSUM_V6);
+                rc |= (XMIT_GSO_V6 | XMIT_CSUM_TCP);
                 if (rc & XMIT_CSUM_ENC)
                         rc |= XMIT_GSO_ENC_V6;
         } else if (skb_is_gso(skb)) {
-                rc |= (XMIT_GSO_V4 | XMIT_CSUM_V4 | XMIT_CSUM_TCP);
+                rc |= (XMIT_GSO_V4 | XMIT_CSUM_TCP);
                 if (rc & XMIT_CSUM_ENC)
                         rc |= XMIT_GSO_ENC_V4;
         }
@@ -3483,19 +3483,18 @@ static void bnx2x_update_pbds_gso_enc(struct sk_buff *skb,
 {
         u16 hlen_w = 0;
         u8 outerip_off, outerip_len = 0;
+
         /* from outer IP to transport */
         hlen_w = (skb_inner_transport_header(skb) -
                   skb_network_header(skb)) >> 1;
 
         /* transport len */
-        if (xmit_type & XMIT_CSUM_TCP)
-                hlen_w += inner_tcp_hdrlen(skb) >> 1;
-        else
-                hlen_w += sizeof(struct udphdr) >> 1;
+        hlen_w += inner_tcp_hdrlen(skb) >> 1;
 
         pbd2->fw_ip_hdr_to_payload_w = hlen_w;
 
-        if (xmit_type & XMIT_CSUM_ENC_V4) {
+        /* outer IP header info */
+        if (xmit_type & XMIT_CSUM_V4) {
                 struct iphdr *iph = ip_hdr(skb);
                 pbd2->fw_ip_csum_wo_len_flags_frag =
                         bswab16(csum_fold((~iph->check) -
@@ -3818,8 +3817,7 @@ netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
                         bnx2x_set_pbd_gso_e2(skb, &pbd_e2_parsing_data,
                                              xmit_type);
                 else
-                        bnx2x_set_pbd_gso(skb, pbd_e1x, tx_start_bd,
-                                          xmit_type);
+                        bnx2x_set_pbd_gso(skb, pbd_e1x, first_bd, xmit_type);
         }
 
         /* Set the PBD's parsing_data field if not zero
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 1f2dd928888a..c777b9013164 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -1800,6 +1800,9 @@ static int tg3_poll_fw(struct tg3 *tp)
         int i;
         u32 val;
 
+        if (tg3_flag(tp, NO_FWARE_REPORTED))
+                return 0;
+
         if (tg3_flag(tp, IS_SSB_CORE)) {
                 /* We don't use firmware. */
                 return 0;
@@ -9468,6 +9471,14 @@ static void tg3_rss_write_indir_tbl(struct tg3 *tp)
         }
 }
 
+static inline u32 tg3_lso_rd_dma_workaround_bit(struct tg3 *tp)
+{
+        if (tg3_asic_rev(tp) == ASIC_REV_5719)
+                return TG3_LSO_RD_DMA_TX_LENGTH_WA_5719;
+        else
+                return TG3_LSO_RD_DMA_TX_LENGTH_WA_5720;
+}
+
 /* tp->lock is held. */
 static int tg3_reset_hw(struct tg3 *tp, bool reset_phy)
 {
@@ -10153,16 +10164,17 @@ static int tg3_reset_hw(struct tg3 *tp, bool reset_phy)
         tw32_f(RDMAC_MODE, rdmac_mode);
         udelay(40);
 
-        if (tg3_asic_rev(tp) == ASIC_REV_5719) {
+        if (tg3_asic_rev(tp) == ASIC_REV_5719 ||
+            tg3_asic_rev(tp) == ASIC_REV_5720) {
                 for (i = 0; i < TG3_NUM_RDMA_CHANNELS; i++) {
                         if (tr32(TG3_RDMA_LENGTH + (i << 2)) > TG3_MAX_MTU(tp))
                                 break;
                 }
                 if (i < TG3_NUM_RDMA_CHANNELS) {
                         val = tr32(TG3_LSO_RD_DMA_CRPTEN_CTRL);
-                        val |= TG3_LSO_RD_DMA_TX_LENGTH_WA;
+                        val |= tg3_lso_rd_dma_workaround_bit(tp);
                         tw32(TG3_LSO_RD_DMA_CRPTEN_CTRL, val);
-                        tg3_flag_set(tp, 5719_RDMA_BUG);
+                        tg3_flag_set(tp, 5719_5720_RDMA_BUG);
                 }
         }
 
@@ -10395,6 +10407,13 @@ static int tg3_reset_hw(struct tg3 *tp, bool reset_phy)
  */
 static int tg3_init_hw(struct tg3 *tp, bool reset_phy)
 {
+        /* Chip may have been just powered on. If so, the boot code may still
+         * be running initialization. Wait for it to finish to avoid races in
+         * accessing the hardware.
+         */
+        tg3_enable_register_access(tp);
+        tg3_poll_fw(tp);
+
         tg3_switch_clocks(tp);
 
         tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0);
@@ -10526,15 +10545,15 @@ static void tg3_periodic_fetch_stats(struct tg3 *tp)
         TG3_STAT_ADD32(&sp->tx_ucast_packets, MAC_TX_STATS_UCAST);
         TG3_STAT_ADD32(&sp->tx_mcast_packets, MAC_TX_STATS_MCAST);
         TG3_STAT_ADD32(&sp->tx_bcast_packets, MAC_TX_STATS_BCAST);
-        if (unlikely(tg3_flag(tp, 5719_RDMA_BUG) &&
+        if (unlikely(tg3_flag(tp, 5719_5720_RDMA_BUG) &&
                      (sp->tx_ucast_packets.low + sp->tx_mcast_packets.low +
                       sp->tx_bcast_packets.low) > TG3_NUM_RDMA_CHANNELS)) {
                 u32 val;
 
                 val = tr32(TG3_LSO_RD_DMA_CRPTEN_CTRL);
-                val &= ~TG3_LSO_RD_DMA_TX_LENGTH_WA;
+                val &= ~tg3_lso_rd_dma_workaround_bit(tp);
                 tw32(TG3_LSO_RD_DMA_CRPTEN_CTRL, val);
-                tg3_flag_clear(tp, 5719_RDMA_BUG);
+                tg3_flag_clear(tp, 5719_5720_RDMA_BUG);
         }
 
         TG3_STAT_ADD32(&sp->rx_octets, MAC_RX_STATS_OCTETS);
diff --git a/drivers/net/ethernet/broadcom/tg3.h b/drivers/net/ethernet/broadcom/tg3.h
index 9b2d3ac2474a..ff6e30eeae35 100644
--- a/drivers/net/ethernet/broadcom/tg3.h
+++ b/drivers/net/ethernet/broadcom/tg3.h
@@ -1422,7 +1422,8 @@
 #define TG3_LSO_RD_DMA_CRPTEN_CTRL      0x00004910
 #define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_BD_4K    0x00030000
 #define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_LSO_4K   0x000c0000
-#define TG3_LSO_RD_DMA_TX_LENGTH_WA      0x02000000
+#define TG3_LSO_RD_DMA_TX_LENGTH_WA_5719         0x02000000
+#define TG3_LSO_RD_DMA_TX_LENGTH_WA_5720         0x00200000
 /* 0x4914 --> 0x4be0 unused */
 
 #define TG3_NUM_RDMA_CHANNELS           4
@@ -3059,7 +3060,7 @@ enum TG3_FLAGS {
         TG3_FLAG_APE_HAS_NCSI,
         TG3_FLAG_TX_TSTAMP_EN,
         TG3_FLAG_4K_FIFO_LIMIT,
-        TG3_FLAG_5719_RDMA_BUG,
+        TG3_FLAG_5719_5720_RDMA_BUG,
         TG3_FLAG_RESET_TASK_PENDING,
         TG3_FLAG_PTP_CAPABLE,
         TG3_FLAG_5705_PLUS,