diff options
Diffstat (limited to 'drivers/net/ethernet/broadcom/bnx2.h')
-rw-r--r-- | drivers/net/ethernet/broadcom/bnx2.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2.h b/drivers/net/ethernet/broadcom/bnx2.h index dc06bda73be7..af6451dec295 100644 --- a/drivers/net/ethernet/broadcom/bnx2.h +++ b/drivers/net/ethernet/broadcom/bnx2.h | |||
@@ -4642,6 +4642,47 @@ struct l2_fhdr { | |||
4642 | #define BNX2_TBDR_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) | 4642 | #define BNX2_TBDR_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) |
4643 | 4643 | ||
4644 | 4644 | ||
4645 | /* | ||
4646 | * tbdc definition | ||
4647 | * offset: 0x5400 | ||
4648 | */ | ||
4649 | #define BNX2_TBDC_COMMAND 0x5400 | ||
4650 | #define BNX2_TBDC_COMMAND_CMD_ENABLED (1UL<<0) | ||
4651 | #define BNX2_TBDC_COMMAND_CMD_FLUSH (1UL<<1) | ||
4652 | #define BNX2_TBDC_COMMAND_CMD_SOFT_RST (1UL<<2) | ||
4653 | #define BNX2_TBDC_COMMAND_CMD_REG_ARB (1UL<<3) | ||
4654 | #define BNX2_TBDC_COMMAND_WRCHK_RANGE_ERROR (1UL<<4) | ||
4655 | #define BNX2_TBDC_COMMAND_WRCHK_ALL_ONES_ERROR (1UL<<5) | ||
4656 | #define BNX2_TBDC_COMMAND_WRCHK_ALL_ZEROS_ERROR (1UL<<6) | ||
4657 | #define BNX2_TBDC_COMMAND_WRCHK_ANY_ONES_ERROR (1UL<<7) | ||
4658 | #define BNX2_TBDC_COMMAND_WRCHK_ANY_ZEROS_ERROR (1UL<<8) | ||
4659 | |||
4660 | #define BNX2_TBDC_STATUS 0x5404 | ||
4661 | #define BNX2_TBDC_STATUS_FREE_CNT (0x3fUL<<0) | ||
4662 | |||
4663 | #define BNX2_TBDC_BD_ADDR 0x5424 | ||
4664 | |||
4665 | #define BNX2_TBDC_BIDX 0x542c | ||
4666 | #define BNX2_TBDC_BDIDX_BDIDX (0xffffUL<<0) | ||
4667 | #define BNX2_TBDC_BDIDX_CMD (0xffUL<<24) | ||
4668 | |||
4669 | #define BNX2_TBDC_CID 0x5430 | ||
4670 | |||
4671 | #define BNX2_TBDC_CAM_OPCODE 0x5434 | ||
4672 | #define BNX2_TBDC_CAM_OPCODE_OPCODE (0x7UL<<0) | ||
4673 | #define BNX2_TBDC_CAM_OPCODE_OPCODE_SEARCH (0UL<<0) | ||
4674 | #define BNX2_TBDC_CAM_OPCODE_OPCODE_CACHE_WRITE (1UL<<0) | ||
4675 | #define BNX2_TBDC_CAM_OPCODE_OPCODE_INVALIDATE (2UL<<0) | ||
4676 | #define BNX2_TBDC_CAM_OPCODE_OPCODE_CAM_WRITE (4UL<<0) | ||
4677 | #define BNX2_TBDC_CAM_OPCODE_OPCODE_CAM_READ (5UL<<0) | ||
4678 | #define BNX2_TBDC_CAM_OPCODE_OPCODE_RAM_WRITE (6UL<<0) | ||
4679 | #define BNX2_TBDC_CAM_OPCODE_OPCODE_RAM_READ (7UL<<0) | ||
4680 | #define BNX2_TBDC_CAM_OPCODE_SMASK_BDIDX (1UL<<4) | ||
4681 | #define BNX2_TBDC_CAM_OPCODE_SMASK_CID (1UL<<5) | ||
4682 | #define BNX2_TBDC_CAM_OPCODE_SMASK_CMD (1UL<<6) | ||
4683 | #define BNX2_TBDC_CAM_OPCODE_WMT_FAILED (1UL<<7) | ||
4684 | #define BNX2_TBDC_CAM_OPCODE_CAM_VALIDS (0xffUL<<8) | ||
4685 | |||
4645 | 4686 | ||
4646 | /* | 4687 | /* |
4647 | * tdma_reg definition | 4688 | * tdma_reg definition |
@@ -6930,6 +6971,8 @@ struct bnx2 { | |||
6930 | struct bnx2_irq irq_tbl[BNX2_MAX_MSIX_VEC]; | 6971 | struct bnx2_irq irq_tbl[BNX2_MAX_MSIX_VEC]; |
6931 | int irq_nvecs; | 6972 | int irq_nvecs; |
6932 | 6973 | ||
6974 | u8 func; | ||
6975 | |||
6933 | u8 num_tx_rings; | 6976 | u8 num_tx_rings; |
6934 | u8 num_rx_rings; | 6977 | u8 num_rx_rings; |
6935 | 6978 | ||
@@ -7314,6 +7357,8 @@ struct bnx2_rv2p_fw_file { | |||
7314 | #define BNX2_BC_STATE_RESET_TYPE_VALUE(msg) (BNX2_BC_STATE_RESET_TYPE_SIG | \ | 7357 | #define BNX2_BC_STATE_RESET_TYPE_VALUE(msg) (BNX2_BC_STATE_RESET_TYPE_SIG | \ |
7315 | (msg)) | 7358 | (msg)) |
7316 | 7359 | ||
7360 | #define BNX2_BC_RESET_TYPE 0x000001c0 | ||
7361 | |||
7317 | #define BNX2_BC_STATE 0x000001c4 | 7362 | #define BNX2_BC_STATE 0x000001c4 |
7318 | #define BNX2_BC_STATE_ERR_MASK 0x0000ff00 | 7363 | #define BNX2_BC_STATE_ERR_MASK 0x0000ff00 |
7319 | #define BNX2_BC_STATE_SIGN 0x42530000 | 7364 | #define BNX2_BC_STATE_SIGN 0x42530000 |