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-rw-r--r--drivers/net/ethernet/altera/Kconfig1
-rw-r--r--drivers/net/ethernet/altera/altera_msgdma.c8
-rw-r--r--drivers/net/ethernet/altera/altera_msgdma.h3
-rw-r--r--drivers/net/ethernet/altera/altera_sgdma.c179
-rw-r--r--drivers/net/ethernet/altera/altera_sgdma.h3
-rw-r--r--drivers/net/ethernet/altera/altera_tse.h6
-rw-r--r--drivers/net/ethernet/altera/altera_tse_ethtool.c8
-rw-r--r--drivers/net/ethernet/altera/altera_tse_main.c77
8 files changed, 175 insertions, 110 deletions
diff --git a/drivers/net/ethernet/altera/Kconfig b/drivers/net/ethernet/altera/Kconfig
index 80c1ab74a4b8..fdddba51473e 100644
--- a/drivers/net/ethernet/altera/Kconfig
+++ b/drivers/net/ethernet/altera/Kconfig
@@ -1,5 +1,6 @@
1config ALTERA_TSE 1config ALTERA_TSE
2 tristate "Altera Triple-Speed Ethernet MAC support" 2 tristate "Altera Triple-Speed Ethernet MAC support"
3 depends on HAS_DMA
3 select PHYLIB 4 select PHYLIB
4 ---help--- 5 ---help---
5 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. 6 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
diff --git a/drivers/net/ethernet/altera/altera_msgdma.c b/drivers/net/ethernet/altera/altera_msgdma.c
index 3df18669ea30..4d1f2fdd5c32 100644
--- a/drivers/net/ethernet/altera/altera_msgdma.c
+++ b/drivers/net/ethernet/altera/altera_msgdma.c
@@ -18,6 +18,7 @@
18#include "altera_utils.h" 18#include "altera_utils.h"
19#include "altera_tse.h" 19#include "altera_tse.h"
20#include "altera_msgdmahw.h" 20#include "altera_msgdmahw.h"
21#include "altera_msgdma.h"
21 22
22/* No initialization work to do for MSGDMA */ 23/* No initialization work to do for MSGDMA */
23int msgdma_initialize(struct altera_tse_private *priv) 24int msgdma_initialize(struct altera_tse_private *priv)
@@ -29,6 +30,10 @@ void msgdma_uninitialize(struct altera_tse_private *priv)
29{ 30{
30} 31}
31 32
33void msgdma_start_rxdma(struct altera_tse_private *priv)
34{
35}
36
32void msgdma_reset(struct altera_tse_private *priv) 37void msgdma_reset(struct altera_tse_private *priv)
33{ 38{
34 int counter; 39 int counter;
@@ -154,7 +159,7 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv)
154 159
155/* Put buffer to the mSGDMA RX FIFO 160/* Put buffer to the mSGDMA RX FIFO
156 */ 161 */
157int msgdma_add_rx_desc(struct altera_tse_private *priv, 162void msgdma_add_rx_desc(struct altera_tse_private *priv,
158 struct tse_buffer *rxbuffer) 163 struct tse_buffer *rxbuffer)
159{ 164{
160 struct msgdma_extended_desc *desc = priv->rx_dma_desc; 165 struct msgdma_extended_desc *desc = priv->rx_dma_desc;
@@ -175,7 +180,6 @@ int msgdma_add_rx_desc(struct altera_tse_private *priv,
175 iowrite32(0, &desc->burst_seq_num); 180 iowrite32(0, &desc->burst_seq_num);
176 iowrite32(0x00010001, &desc->stride); 181 iowrite32(0x00010001, &desc->stride);
177 iowrite32(control, &desc->control); 182 iowrite32(control, &desc->control);
178 return 1;
179} 183}
180 184
181/* status is returned on upper 16 bits, 185/* status is returned on upper 16 bits,
diff --git a/drivers/net/ethernet/altera/altera_msgdma.h b/drivers/net/ethernet/altera/altera_msgdma.h
index 7f0f5bf2bba2..42cf61c81057 100644
--- a/drivers/net/ethernet/altera/altera_msgdma.h
+++ b/drivers/net/ethernet/altera/altera_msgdma.h
@@ -25,10 +25,11 @@ void msgdma_disable_txirq(struct altera_tse_private *);
25void msgdma_clear_rxirq(struct altera_tse_private *); 25void msgdma_clear_rxirq(struct altera_tse_private *);
26void msgdma_clear_txirq(struct altera_tse_private *); 26void msgdma_clear_txirq(struct altera_tse_private *);
27u32 msgdma_tx_completions(struct altera_tse_private *); 27u32 msgdma_tx_completions(struct altera_tse_private *);
28int msgdma_add_rx_desc(struct altera_tse_private *, struct tse_buffer *); 28void msgdma_add_rx_desc(struct altera_tse_private *, struct tse_buffer *);
29int msgdma_tx_buffer(struct altera_tse_private *, struct tse_buffer *); 29int msgdma_tx_buffer(struct altera_tse_private *, struct tse_buffer *);
30u32 msgdma_rx_status(struct altera_tse_private *); 30u32 msgdma_rx_status(struct altera_tse_private *);
31int msgdma_initialize(struct altera_tse_private *); 31int msgdma_initialize(struct altera_tse_private *);
32void msgdma_uninitialize(struct altera_tse_private *); 32void msgdma_uninitialize(struct altera_tse_private *);
33void msgdma_start_rxdma(struct altera_tse_private *);
33 34
34#endif /* __ALTERA_MSGDMA_H__ */ 35#endif /* __ALTERA_MSGDMA_H__ */
diff --git a/drivers/net/ethernet/altera/altera_sgdma.c b/drivers/net/ethernet/altera/altera_sgdma.c
index 0ee96639ae44..9ce8630692b6 100644
--- a/drivers/net/ethernet/altera/altera_sgdma.c
+++ b/drivers/net/ethernet/altera/altera_sgdma.c
@@ -20,15 +20,15 @@
20#include "altera_sgdmahw.h" 20#include "altera_sgdmahw.h"
21#include "altera_sgdma.h" 21#include "altera_sgdma.h"
22 22
23static void sgdma_descrip(struct sgdma_descrip *desc, 23static void sgdma_setup_descrip(struct sgdma_descrip *desc,
24 struct sgdma_descrip *ndesc, 24 struct sgdma_descrip *ndesc,
25 dma_addr_t ndesc_phys, 25 dma_addr_t ndesc_phys,
26 dma_addr_t raddr, 26 dma_addr_t raddr,
27 dma_addr_t waddr, 27 dma_addr_t waddr,
28 u16 length, 28 u16 length,
29 int generate_eop, 29 int generate_eop,
30 int rfixed, 30 int rfixed,
31 int wfixed); 31 int wfixed);
32 32
33static int sgdma_async_write(struct altera_tse_private *priv, 33static int sgdma_async_write(struct altera_tse_private *priv,
34 struct sgdma_descrip *desc); 34 struct sgdma_descrip *desc);
@@ -64,11 +64,15 @@ queue_rx_peekhead(struct altera_tse_private *priv);
64 64
65int sgdma_initialize(struct altera_tse_private *priv) 65int sgdma_initialize(struct altera_tse_private *priv)
66{ 66{
67 priv->txctrlreg = SGDMA_CTRLREG_ILASTD; 67 priv->txctrlreg = SGDMA_CTRLREG_ILASTD |
68 SGDMA_CTRLREG_INTEN;
68 69
69 priv->rxctrlreg = SGDMA_CTRLREG_IDESCRIP | 70 priv->rxctrlreg = SGDMA_CTRLREG_IDESCRIP |
71 SGDMA_CTRLREG_INTEN |
70 SGDMA_CTRLREG_ILASTD; 72 SGDMA_CTRLREG_ILASTD;
71 73
74 priv->sgdmadesclen = sizeof(struct sgdma_descrip);
75
72 INIT_LIST_HEAD(&priv->txlisthd); 76 INIT_LIST_HEAD(&priv->txlisthd);
73 INIT_LIST_HEAD(&priv->rxlisthd); 77 INIT_LIST_HEAD(&priv->rxlisthd);
74 78
@@ -93,6 +97,16 @@ int sgdma_initialize(struct altera_tse_private *priv)
93 return -EINVAL; 97 return -EINVAL;
94 } 98 }
95 99
100 /* Initialize descriptor memory to all 0's, sync memory to cache */
101 memset(priv->tx_dma_desc, 0, priv->txdescmem);
102 memset(priv->rx_dma_desc, 0, priv->rxdescmem);
103
104 dma_sync_single_for_device(priv->device, priv->txdescphys,
105 priv->txdescmem, DMA_TO_DEVICE);
106
107 dma_sync_single_for_device(priv->device, priv->rxdescphys,
108 priv->rxdescmem, DMA_TO_DEVICE);
109
96 return 0; 110 return 0;
97} 111}
98 112
@@ -130,26 +144,23 @@ void sgdma_reset(struct altera_tse_private *priv)
130 iowrite32(0, &prxsgdma->control); 144 iowrite32(0, &prxsgdma->control);
131} 145}
132 146
147/* For SGDMA, interrupts remain enabled after initially enabling,
148 * so no need to provide implementations for abstract enable
149 * and disable
150 */
151
133void sgdma_enable_rxirq(struct altera_tse_private *priv) 152void sgdma_enable_rxirq(struct altera_tse_private *priv)
134{ 153{
135 struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr;
136 priv->rxctrlreg |= SGDMA_CTRLREG_INTEN;
137 tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN);
138} 154}
139 155
140void sgdma_enable_txirq(struct altera_tse_private *priv) 156void sgdma_enable_txirq(struct altera_tse_private *priv)
141{ 157{
142 struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr;
143 priv->txctrlreg |= SGDMA_CTRLREG_INTEN;
144 tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN);
145} 158}
146 159
147/* for SGDMA, RX interrupts remain enabled after enabling */
148void sgdma_disable_rxirq(struct altera_tse_private *priv) 160void sgdma_disable_rxirq(struct altera_tse_private *priv)
149{ 161{
150} 162}
151 163
152/* for SGDMA, TX interrupts remain enabled after enabling */
153void sgdma_disable_txirq(struct altera_tse_private *priv) 164void sgdma_disable_txirq(struct altera_tse_private *priv)
154{ 165{
155} 166}
@@ -184,15 +195,15 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer)
184 if (sgdma_txbusy(priv)) 195 if (sgdma_txbusy(priv))
185 return 0; 196 return 0;
186 197
187 sgdma_descrip(cdesc, /* current descriptor */ 198 sgdma_setup_descrip(cdesc, /* current descriptor */
188 ndesc, /* next descriptor */ 199 ndesc, /* next descriptor */
189 sgdma_txphysaddr(priv, ndesc), 200 sgdma_txphysaddr(priv, ndesc),
190 buffer->dma_addr, /* address of packet to xmit */ 201 buffer->dma_addr, /* address of packet to xmit */
191 0, /* write addr 0 for tx dma */ 202 0, /* write addr 0 for tx dma */
192 buffer->len, /* length of packet */ 203 buffer->len, /* length of packet */
193 SGDMA_CONTROL_EOP, /* Generate EOP */ 204 SGDMA_CONTROL_EOP, /* Generate EOP */
194 0, /* read fixed */ 205 0, /* read fixed */
195 SGDMA_CONTROL_WR_FIXED); /* Generate SOP */ 206 SGDMA_CONTROL_WR_FIXED); /* Generate SOP */
196 207
197 pktstx = sgdma_async_write(priv, cdesc); 208 pktstx = sgdma_async_write(priv, cdesc);
198 209
@@ -219,11 +230,15 @@ u32 sgdma_tx_completions(struct altera_tse_private *priv)
219 return ready; 230 return ready;
220} 231}
221 232
222int sgdma_add_rx_desc(struct altera_tse_private *priv, 233void sgdma_start_rxdma(struct altera_tse_private *priv)
223 struct tse_buffer *rxbuffer) 234{
235 sgdma_async_read(priv);
236}
237
238void sgdma_add_rx_desc(struct altera_tse_private *priv,
239 struct tse_buffer *rxbuffer)
224{ 240{
225 queue_rx(priv, rxbuffer); 241 queue_rx(priv, rxbuffer);
226 return sgdma_async_read(priv);
227} 242}
228 243
229/* status is returned on upper 16 bits, 244/* status is returned on upper 16 bits,
@@ -240,28 +255,52 @@ u32 sgdma_rx_status(struct altera_tse_private *priv)
240 unsigned int pktstatus = 0; 255 unsigned int pktstatus = 0;
241 struct tse_buffer *rxbuffer = NULL; 256 struct tse_buffer *rxbuffer = NULL;
242 257
243 dma_sync_single_for_cpu(priv->device, 258 u32 sts = ioread32(&csr->status);
244 priv->rxdescphys,
245 priv->rxdescmem,
246 DMA_BIDIRECTIONAL);
247 259
248 desc = &base[0]; 260 desc = &base[0];
249 if ((ioread32(&csr->status) & SGDMA_STSREG_EOP) || 261 if (sts & SGDMA_STSREG_EOP) {
250 (desc->status & SGDMA_STATUS_EOP)) { 262 dma_sync_single_for_cpu(priv->device,
263 priv->rxdescphys,
264 priv->sgdmadesclen,
265 DMA_FROM_DEVICE);
266
251 pktlength = desc->bytes_xferred; 267 pktlength = desc->bytes_xferred;
252 pktstatus = desc->status & 0x3f; 268 pktstatus = desc->status & 0x3f;
253 rxstatus = pktstatus; 269 rxstatus = pktstatus;
254 rxstatus = rxstatus << 16; 270 rxstatus = rxstatus << 16;
255 rxstatus |= (pktlength & 0xffff); 271 rxstatus |= (pktlength & 0xffff);
256 272
257 desc->status = 0; 273 if (rxstatus) {
274 desc->status = 0;
258 275
259 rxbuffer = dequeue_rx(priv); 276 rxbuffer = dequeue_rx(priv);
260 if (rxbuffer == NULL) 277 if (rxbuffer == NULL)
261 netdev_err(priv->dev, 278 netdev_info(priv->dev,
262 "sgdma rx and rx queue empty!\n"); 279 "sgdma rx and rx queue empty!\n");
280
281 /* Clear control */
282 iowrite32(0, &csr->control);
283 /* clear status */
284 iowrite32(0xf, &csr->status);
263 285
264 /* kick the rx sgdma after reaping this descriptor */ 286 /* kick the rx sgdma after reaping this descriptor */
287 pktsrx = sgdma_async_read(priv);
288
289 } else {
290 /* If the SGDMA indicated an end of packet on recv,
291 * then it's expected that the rxstatus from the
292 * descriptor is non-zero - meaning a valid packet
293 * with a nonzero length, or an error has been
294 * indicated. if not, then all we can do is signal
295 * an error and return no packet received. Most likely
296 * there is a system design error, or an error in the
297 * underlying kernel (cache or cache management problem)
298 */
299 netdev_err(priv->dev,
300 "SGDMA RX Error Info: %x, %x, %x\n",
301 sts, desc->status, rxstatus);
302 }
303 } else if (sts == 0) {
265 pktsrx = sgdma_async_read(priv); 304 pktsrx = sgdma_async_read(priv);
266 } 305 }
267 306
@@ -270,15 +309,15 @@ u32 sgdma_rx_status(struct altera_tse_private *priv)
270 309
271 310
272/* Private functions */ 311/* Private functions */
273static void sgdma_descrip(struct sgdma_descrip *desc, 312static void sgdma_setup_descrip(struct sgdma_descrip *desc,
274 struct sgdma_descrip *ndesc, 313 struct sgdma_descrip *ndesc,
275 dma_addr_t ndesc_phys, 314 dma_addr_t ndesc_phys,
276 dma_addr_t raddr, 315 dma_addr_t raddr,
277 dma_addr_t waddr, 316 dma_addr_t waddr,
278 u16 length, 317 u16 length,
279 int generate_eop, 318 int generate_eop,
280 int rfixed, 319 int rfixed,
281 int wfixed) 320 int wfixed)
282{ 321{
283 /* Clear the next descriptor as not owned by hardware */ 322 /* Clear the next descriptor as not owned by hardware */
284 u32 ctrl = ndesc->control; 323 u32 ctrl = ndesc->control;
@@ -319,35 +358,29 @@ static int sgdma_async_read(struct altera_tse_private *priv)
319 struct sgdma_descrip *cdesc = &descbase[0]; 358 struct sgdma_descrip *cdesc = &descbase[0];
320 struct sgdma_descrip *ndesc = &descbase[1]; 359 struct sgdma_descrip *ndesc = &descbase[1];
321 360
322 unsigned int sts = ioread32(&csr->status);
323 struct tse_buffer *rxbuffer = NULL; 361 struct tse_buffer *rxbuffer = NULL;
324 362
325 if (!sgdma_rxbusy(priv)) { 363 if (!sgdma_rxbusy(priv)) {
326 rxbuffer = queue_rx_peekhead(priv); 364 rxbuffer = queue_rx_peekhead(priv);
327 if (rxbuffer == NULL) 365 if (rxbuffer == NULL) {
366 netdev_err(priv->dev, "no rx buffers available\n");
328 return 0; 367 return 0;
329 368 }
330 sgdma_descrip(cdesc, /* current descriptor */ 369
331 ndesc, /* next descriptor */ 370 sgdma_setup_descrip(cdesc, /* current descriptor */
332 sgdma_rxphysaddr(priv, ndesc), 371 ndesc, /* next descriptor */
333 0, /* read addr 0 for rx dma */ 372 sgdma_rxphysaddr(priv, ndesc),
334 rxbuffer->dma_addr, /* write addr for rx dma */ 373 0, /* read addr 0 for rx dma */
335 0, /* read 'til EOP */ 374 rxbuffer->dma_addr, /* write addr for rx dma */
336 0, /* EOP: NA for rx dma */ 375 0, /* read 'til EOP */
337 0, /* read fixed: NA for rx dma */ 376 0, /* EOP: NA for rx dma */
338 0); /* SOP: NA for rx DMA */ 377 0, /* read fixed: NA for rx dma */
339 378 0); /* SOP: NA for rx DMA */
340 /* clear control and status */
341 iowrite32(0, &csr->control);
342
343 /* If status available, clear those bits */
344 if (sts & 0xf)
345 iowrite32(0xf, &csr->status);
346 379
347 dma_sync_single_for_device(priv->device, 380 dma_sync_single_for_device(priv->device,
348 priv->rxdescphys, 381 priv->rxdescphys,
349 priv->rxdescmem, 382 priv->sgdmadesclen,
350 DMA_BIDIRECTIONAL); 383 DMA_TO_DEVICE);
351 384
352 iowrite32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)), 385 iowrite32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)),
353 &csr->next_descrip); 386 &csr->next_descrip);
@@ -374,7 +407,7 @@ static int sgdma_async_write(struct altera_tse_private *priv,
374 iowrite32(0x1f, &csr->status); 407 iowrite32(0x1f, &csr->status);
375 408
376 dma_sync_single_for_device(priv->device, priv->txdescphys, 409 dma_sync_single_for_device(priv->device, priv->txdescphys,
377 priv->txdescmem, DMA_TO_DEVICE); 410 priv->sgdmadesclen, DMA_TO_DEVICE);
378 411
379 iowrite32(lower_32_bits(sgdma_txphysaddr(priv, desc)), 412 iowrite32(lower_32_bits(sgdma_txphysaddr(priv, desc)),
380 &csr->next_descrip); 413 &csr->next_descrip);
diff --git a/drivers/net/ethernet/altera/altera_sgdma.h b/drivers/net/ethernet/altera/altera_sgdma.h
index 07d471729dc4..584977e29ef9 100644
--- a/drivers/net/ethernet/altera/altera_sgdma.h
+++ b/drivers/net/ethernet/altera/altera_sgdma.h
@@ -26,10 +26,11 @@ void sgdma_clear_rxirq(struct altera_tse_private *);
26void sgdma_clear_txirq(struct altera_tse_private *); 26void sgdma_clear_txirq(struct altera_tse_private *);
27int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *); 27int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *);
28u32 sgdma_tx_completions(struct altera_tse_private *); 28u32 sgdma_tx_completions(struct altera_tse_private *);
29int sgdma_add_rx_desc(struct altera_tse_private *priv, struct tse_buffer *); 29void sgdma_add_rx_desc(struct altera_tse_private *priv, struct tse_buffer *);
30void sgdma_status(struct altera_tse_private *); 30void sgdma_status(struct altera_tse_private *);
31u32 sgdma_rx_status(struct altera_tse_private *); 31u32 sgdma_rx_status(struct altera_tse_private *);
32int sgdma_initialize(struct altera_tse_private *); 32int sgdma_initialize(struct altera_tse_private *);
33void sgdma_uninitialize(struct altera_tse_private *); 33void sgdma_uninitialize(struct altera_tse_private *);
34void sgdma_start_rxdma(struct altera_tse_private *);
34 35
35#endif /* __ALTERA_SGDMA_H__ */ 36#endif /* __ALTERA_SGDMA_H__ */
diff --git a/drivers/net/ethernet/altera/altera_tse.h b/drivers/net/ethernet/altera/altera_tse.h
index 8feeed05de0e..465c4aabebbd 100644
--- a/drivers/net/ethernet/altera/altera_tse.h
+++ b/drivers/net/ethernet/altera/altera_tse.h
@@ -58,6 +58,8 @@
58/* MAC function configuration default settings */ 58/* MAC function configuration default settings */
59#define ALTERA_TSE_TX_IPG_LENGTH 12 59#define ALTERA_TSE_TX_IPG_LENGTH 12
60 60
61#define ALTERA_TSE_PAUSE_QUANTA 0xffff
62
61#define GET_BIT_VALUE(v, bit) (((v) >> (bit)) & 0x1) 63#define GET_BIT_VALUE(v, bit) (((v) >> (bit)) & 0x1)
62 64
63/* MAC Command_Config Register Bit Definitions 65/* MAC Command_Config Register Bit Definitions
@@ -390,10 +392,11 @@ struct altera_dmaops {
390 void (*clear_rxirq)(struct altera_tse_private *); 392 void (*clear_rxirq)(struct altera_tse_private *);
391 int (*tx_buffer)(struct altera_tse_private *, struct tse_buffer *); 393 int (*tx_buffer)(struct altera_tse_private *, struct tse_buffer *);
392 u32 (*tx_completions)(struct altera_tse_private *); 394 u32 (*tx_completions)(struct altera_tse_private *);
393 int (*add_rx_desc)(struct altera_tse_private *, struct tse_buffer *); 395 void (*add_rx_desc)(struct altera_tse_private *, struct tse_buffer *);
394 u32 (*get_rx_status)(struct altera_tse_private *); 396 u32 (*get_rx_status)(struct altera_tse_private *);
395 int (*init_dma)(struct altera_tse_private *); 397 int (*init_dma)(struct altera_tse_private *);
396 void (*uninit_dma)(struct altera_tse_private *); 398 void (*uninit_dma)(struct altera_tse_private *);
399 void (*start_rxdma)(struct altera_tse_private *);
397}; 400};
398 401
399/* This structure is private to each device. 402/* This structure is private to each device.
@@ -453,6 +456,7 @@ struct altera_tse_private {
453 u32 rxctrlreg; 456 u32 rxctrlreg;
454 dma_addr_t rxdescphys; 457 dma_addr_t rxdescphys;
455 dma_addr_t txdescphys; 458 dma_addr_t txdescphys;
459 size_t sgdmadesclen;
456 460
457 struct list_head txlisthd; 461 struct list_head txlisthd;
458 struct list_head rxlisthd; 462 struct list_head rxlisthd;
diff --git a/drivers/net/ethernet/altera/altera_tse_ethtool.c b/drivers/net/ethernet/altera/altera_tse_ethtool.c
index 319ca74f5e74..76133caffa78 100644
--- a/drivers/net/ethernet/altera/altera_tse_ethtool.c
+++ b/drivers/net/ethernet/altera/altera_tse_ethtool.c
@@ -77,7 +77,7 @@ static void tse_get_drvinfo(struct net_device *dev,
77 struct altera_tse_private *priv = netdev_priv(dev); 77 struct altera_tse_private *priv = netdev_priv(dev);
78 u32 rev = ioread32(&priv->mac_dev->megacore_revision); 78 u32 rev = ioread32(&priv->mac_dev->megacore_revision);
79 79
80 strcpy(info->driver, "Altera TSE MAC IP Driver"); 80 strcpy(info->driver, "altera_tse");
81 strcpy(info->version, "v8.0"); 81 strcpy(info->version, "v8.0");
82 snprintf(info->fw_version, ETHTOOL_FWVERS_LEN, "v%d.%d", 82 snprintf(info->fw_version, ETHTOOL_FWVERS_LEN, "v%d.%d",
83 rev & 0xFFFF, (rev & 0xFFFF0000) >> 16); 83 rev & 0xFFFF, (rev & 0xFFFF0000) >> 16);
@@ -185,6 +185,12 @@ static void tse_get_regs(struct net_device *dev, struct ethtool_regs *regs,
185 * how to do any special formatting of this data. 185 * how to do any special formatting of this data.
186 * This version number will need to change if and 186 * This version number will need to change if and
187 * when this register table is changed. 187 * when this register table is changed.
188 *
189 * version[31:0] = 1: Dump the first 128 TSE Registers
190 * Upper bits are all 0 by default
191 *
192 * Upper 16-bits will indicate feature presence for
193 * Ethtool register decoding in future version.
188 */ 194 */
189 195
190 regs->version = 1; 196 regs->version = 1;
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c
index c70a29e0b9f7..e44a4aeb9701 100644
--- a/drivers/net/ethernet/altera/altera_tse_main.c
+++ b/drivers/net/ethernet/altera/altera_tse_main.c
@@ -224,6 +224,7 @@ static int tse_init_rx_buffer(struct altera_tse_private *priv,
224 dev_kfree_skb_any(rxbuffer->skb); 224 dev_kfree_skb_any(rxbuffer->skb);
225 return -EINVAL; 225 return -EINVAL;
226 } 226 }
227 rxbuffer->dma_addr &= (dma_addr_t)~3;
227 rxbuffer->len = len; 228 rxbuffer->len = len;
228 return 0; 229 return 0;
229} 230}
@@ -425,9 +426,10 @@ static int tse_rx(struct altera_tse_private *priv, int limit)
425 priv->dev->stats.rx_bytes += pktlength; 426 priv->dev->stats.rx_bytes += pktlength;
426 427
427 entry = next_entry; 428 entry = next_entry;
429
430 tse_rx_refill(priv);
428 } 431 }
429 432
430 tse_rx_refill(priv);
431 return count; 433 return count;
432} 434}
433 435
@@ -520,7 +522,6 @@ static irqreturn_t altera_isr(int irq, void *dev_id)
520 struct altera_tse_private *priv; 522 struct altera_tse_private *priv;
521 unsigned long int flags; 523 unsigned long int flags;
522 524
523
524 if (unlikely(!dev)) { 525 if (unlikely(!dev)) {
525 pr_err("%s: invalid dev pointer\n", __func__); 526 pr_err("%s: invalid dev pointer\n", __func__);
526 return IRQ_NONE; 527 return IRQ_NONE;
@@ -868,13 +869,13 @@ static int init_mac(struct altera_tse_private *priv)
868 /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit 869 /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit
869 * start address 870 * start address
870 */ 871 */
871 tse_clear_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); 872 tse_set_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16);
872 tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | 873 tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 |
873 ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); 874 ALTERA_TSE_TX_CMD_STAT_OMIT_CRC);
874 875
875 /* Set the MAC options */ 876 /* Set the MAC options */
876 cmd = ioread32(&mac->command_config); 877 cmd = ioread32(&mac->command_config);
877 cmd |= MAC_CMDCFG_PAD_EN; /* Padding Removal on Receive */ 878 cmd &= ~MAC_CMDCFG_PAD_EN; /* No padding Removal on Receive */
878 cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ 879 cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */
879 cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames 880 cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames
880 * with CRC errors 881 * with CRC errors
@@ -882,8 +883,16 @@ static int init_mac(struct altera_tse_private *priv)
882 cmd |= MAC_CMDCFG_CNTL_FRM_ENA; 883 cmd |= MAC_CMDCFG_CNTL_FRM_ENA;
883 cmd &= ~MAC_CMDCFG_TX_ENA; 884 cmd &= ~MAC_CMDCFG_TX_ENA;
884 cmd &= ~MAC_CMDCFG_RX_ENA; 885 cmd &= ~MAC_CMDCFG_RX_ENA;
886
887 /* Default speed and duplex setting, full/100 */
888 cmd &= ~MAC_CMDCFG_HD_ENA;
889 cmd &= ~MAC_CMDCFG_ETH_SPEED;
890 cmd &= ~MAC_CMDCFG_ENA_10;
891
885 iowrite32(cmd, &mac->command_config); 892 iowrite32(cmd, &mac->command_config);
886 893
894 iowrite32(ALTERA_TSE_PAUSE_QUANTA, &mac->pause_quanta);
895
887 if (netif_msg_hw(priv)) 896 if (netif_msg_hw(priv))
888 dev_dbg(priv->device, 897 dev_dbg(priv->device,
889 "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd); 898 "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd);
@@ -1085,17 +1094,19 @@ static int tse_open(struct net_device *dev)
1085 1094
1086 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags); 1095 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1087 1096
1088 /* Start MAC Rx/Tx */
1089 spin_lock(&priv->mac_cfg_lock);
1090 tse_set_mac(priv, true);
1091 spin_unlock(&priv->mac_cfg_lock);
1092
1093 if (priv->phydev) 1097 if (priv->phydev)
1094 phy_start(priv->phydev); 1098 phy_start(priv->phydev);
1095 1099
1096 napi_enable(&priv->napi); 1100 napi_enable(&priv->napi);
1097 netif_start_queue(dev); 1101 netif_start_queue(dev);
1098 1102
1103 priv->dmaops->start_rxdma(priv);
1104
1105 /* Start MAC Rx/Tx */
1106 spin_lock(&priv->mac_cfg_lock);
1107 tse_set_mac(priv, true);
1108 spin_unlock(&priv->mac_cfg_lock);
1109
1099 return 0; 1110 return 0;
1100 1111
1101tx_request_irq_error: 1112tx_request_irq_error:
@@ -1167,7 +1178,6 @@ static struct net_device_ops altera_tse_netdev_ops = {
1167 .ndo_validate_addr = eth_validate_addr, 1178 .ndo_validate_addr = eth_validate_addr,
1168}; 1179};
1169 1180
1170
1171static int request_and_map(struct platform_device *pdev, const char *name, 1181static int request_and_map(struct platform_device *pdev, const char *name,
1172 struct resource **res, void __iomem **ptr) 1182 struct resource **res, void __iomem **ptr)
1173{ 1183{
@@ -1235,7 +1245,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1235 /* Get the mapped address to the SGDMA descriptor memory */ 1245 /* Get the mapped address to the SGDMA descriptor memory */
1236 ret = request_and_map(pdev, "s1", &dma_res, &descmap); 1246 ret = request_and_map(pdev, "s1", &dma_res, &descmap);
1237 if (ret) 1247 if (ret)
1238 goto out_free; 1248 goto err_free_netdev;
1239 1249
1240 /* Start of that memory is for transmit descriptors */ 1250 /* Start of that memory is for transmit descriptors */
1241 priv->tx_dma_desc = descmap; 1251 priv->tx_dma_desc = descmap;
@@ -1254,24 +1264,24 @@ static int altera_tse_probe(struct platform_device *pdev)
1254 if (upper_32_bits(priv->rxdescmem_busaddr)) { 1264 if (upper_32_bits(priv->rxdescmem_busaddr)) {
1255 dev_dbg(priv->device, 1265 dev_dbg(priv->device,
1256 "SGDMA bus addresses greater than 32-bits\n"); 1266 "SGDMA bus addresses greater than 32-bits\n");
1257 goto out_free; 1267 goto err_free_netdev;
1258 } 1268 }
1259 if (upper_32_bits(priv->txdescmem_busaddr)) { 1269 if (upper_32_bits(priv->txdescmem_busaddr)) {
1260 dev_dbg(priv->device, 1270 dev_dbg(priv->device,
1261 "SGDMA bus addresses greater than 32-bits\n"); 1271 "SGDMA bus addresses greater than 32-bits\n");
1262 goto out_free; 1272 goto err_free_netdev;
1263 } 1273 }
1264 } else if (priv->dmaops && 1274 } else if (priv->dmaops &&
1265 priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) { 1275 priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) {
1266 ret = request_and_map(pdev, "rx_resp", &dma_res, 1276 ret = request_and_map(pdev, "rx_resp", &dma_res,
1267 &priv->rx_dma_resp); 1277 &priv->rx_dma_resp);
1268 if (ret) 1278 if (ret)
1269 goto out_free; 1279 goto err_free_netdev;
1270 1280
1271 ret = request_and_map(pdev, "tx_desc", &dma_res, 1281 ret = request_and_map(pdev, "tx_desc", &dma_res,
1272 &priv->tx_dma_desc); 1282 &priv->tx_dma_desc);
1273 if (ret) 1283 if (ret)
1274 goto out_free; 1284 goto err_free_netdev;
1275 1285
1276 priv->txdescmem = resource_size(dma_res); 1286 priv->txdescmem = resource_size(dma_res);
1277 priv->txdescmem_busaddr = dma_res->start; 1287 priv->txdescmem_busaddr = dma_res->start;
@@ -1279,13 +1289,13 @@ static int altera_tse_probe(struct platform_device *pdev)
1279 ret = request_and_map(pdev, "rx_desc", &dma_res, 1289 ret = request_and_map(pdev, "rx_desc", &dma_res,
1280 &priv->rx_dma_desc); 1290 &priv->rx_dma_desc);
1281 if (ret) 1291 if (ret)
1282 goto out_free; 1292 goto err_free_netdev;
1283 1293
1284 priv->rxdescmem = resource_size(dma_res); 1294 priv->rxdescmem = resource_size(dma_res);
1285 priv->rxdescmem_busaddr = dma_res->start; 1295 priv->rxdescmem_busaddr = dma_res->start;
1286 1296
1287 } else { 1297 } else {
1288 goto out_free; 1298 goto err_free_netdev;
1289 } 1299 }
1290 1300
1291 if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask))) 1301 if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask)))
@@ -1294,26 +1304,26 @@ static int altera_tse_probe(struct platform_device *pdev)
1294 else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32))) 1304 else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32)))
1295 dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32)); 1305 dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32));
1296 else 1306 else
1297 goto out_free; 1307 goto err_free_netdev;
1298 1308
1299 /* MAC address space */ 1309 /* MAC address space */
1300 ret = request_and_map(pdev, "control_port", &control_port, 1310 ret = request_and_map(pdev, "control_port", &control_port,
1301 (void __iomem **)&priv->mac_dev); 1311 (void __iomem **)&priv->mac_dev);
1302 if (ret) 1312 if (ret)
1303 goto out_free; 1313 goto err_free_netdev;
1304 1314
1305 /* xSGDMA Rx Dispatcher address space */ 1315 /* xSGDMA Rx Dispatcher address space */
1306 ret = request_and_map(pdev, "rx_csr", &dma_res, 1316 ret = request_and_map(pdev, "rx_csr", &dma_res,
1307 &priv->rx_dma_csr); 1317 &priv->rx_dma_csr);
1308 if (ret) 1318 if (ret)
1309 goto out_free; 1319 goto err_free_netdev;
1310 1320
1311 1321
1312 /* xSGDMA Tx Dispatcher address space */ 1322 /* xSGDMA Tx Dispatcher address space */
1313 ret = request_and_map(pdev, "tx_csr", &dma_res, 1323 ret = request_and_map(pdev, "tx_csr", &dma_res,
1314 &priv->tx_dma_csr); 1324 &priv->tx_dma_csr);
1315 if (ret) 1325 if (ret)
1316 goto out_free; 1326 goto err_free_netdev;
1317 1327
1318 1328
1319 /* Rx IRQ */ 1329 /* Rx IRQ */
@@ -1321,7 +1331,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1321 if (priv->rx_irq == -ENXIO) { 1331 if (priv->rx_irq == -ENXIO) {
1322 dev_err(&pdev->dev, "cannot obtain Rx IRQ\n"); 1332 dev_err(&pdev->dev, "cannot obtain Rx IRQ\n");
1323 ret = -ENXIO; 1333 ret = -ENXIO;
1324 goto out_free; 1334 goto err_free_netdev;
1325 } 1335 }
1326 1336
1327 /* Tx IRQ */ 1337 /* Tx IRQ */
@@ -1329,7 +1339,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1329 if (priv->tx_irq == -ENXIO) { 1339 if (priv->tx_irq == -ENXIO) {
1330 dev_err(&pdev->dev, "cannot obtain Tx IRQ\n"); 1340 dev_err(&pdev->dev, "cannot obtain Tx IRQ\n");
1331 ret = -ENXIO; 1341 ret = -ENXIO;
1332 goto out_free; 1342 goto err_free_netdev;
1333 } 1343 }
1334 1344
1335 /* get FIFO depths from device tree */ 1345 /* get FIFO depths from device tree */
@@ -1337,14 +1347,14 @@ static int altera_tse_probe(struct platform_device *pdev)
1337 &priv->rx_fifo_depth)) { 1347 &priv->rx_fifo_depth)) {
1338 dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n"); 1348 dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n");
1339 ret = -ENXIO; 1349 ret = -ENXIO;
1340 goto out_free; 1350 goto err_free_netdev;
1341 } 1351 }
1342 1352
1343 if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth", 1353 if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth",
1344 &priv->rx_fifo_depth)) { 1354 &priv->rx_fifo_depth)) {
1345 dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n"); 1355 dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n");
1346 ret = -ENXIO; 1356 ret = -ENXIO;
1347 goto out_free; 1357 goto err_free_netdev;
1348 } 1358 }
1349 1359
1350 /* get hash filter settings for this instance */ 1360 /* get hash filter settings for this instance */
@@ -1393,7 +1403,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1393 ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) { 1403 ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) {
1394 dev_err(&pdev->dev, "invalid phy-addr specified %d\n", 1404 dev_err(&pdev->dev, "invalid phy-addr specified %d\n",
1395 priv->phy_addr); 1405 priv->phy_addr);
1396 goto out_free; 1406 goto err_free_netdev;
1397 } 1407 }
1398 1408
1399 /* Create/attach to MDIO bus */ 1409 /* Create/attach to MDIO bus */
@@ -1401,7 +1411,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1401 atomic_add_return(1, &instance_count)); 1411 atomic_add_return(1, &instance_count));
1402 1412
1403 if (ret) 1413 if (ret)
1404 goto out_free; 1414 goto err_free_netdev;
1405 1415
1406 /* initialize netdev */ 1416 /* initialize netdev */
1407 ether_setup(ndev); 1417 ether_setup(ndev);
@@ -1438,7 +1448,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1438 ret = register_netdev(ndev); 1448 ret = register_netdev(ndev);
1439 if (ret) { 1449 if (ret) {
1440 dev_err(&pdev->dev, "failed to register TSE net device\n"); 1450 dev_err(&pdev->dev, "failed to register TSE net device\n");
1441 goto out_free_mdio; 1451 goto err_register_netdev;
1442 } 1452 }
1443 1453
1444 platform_set_drvdata(pdev, ndev); 1454 platform_set_drvdata(pdev, ndev);
@@ -1455,13 +1465,16 @@ static int altera_tse_probe(struct platform_device *pdev)
1455 ret = init_phy(ndev); 1465 ret = init_phy(ndev);
1456 if (ret != 0) { 1466 if (ret != 0) {
1457 netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret); 1467 netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret);
1458 goto out_free_mdio; 1468 goto err_init_phy;
1459 } 1469 }
1460 return 0; 1470 return 0;
1461 1471
1462out_free_mdio: 1472err_init_phy:
1473 unregister_netdev(ndev);
1474err_register_netdev:
1475 netif_napi_del(&priv->napi);
1463 altera_tse_mdio_destroy(ndev); 1476 altera_tse_mdio_destroy(ndev);
1464out_free: 1477err_free_netdev:
1465 free_netdev(ndev); 1478 free_netdev(ndev);
1466 return ret; 1479 return ret;
1467} 1480}
@@ -1496,6 +1509,7 @@ struct altera_dmaops altera_dtype_sgdma = {
1496 .get_rx_status = sgdma_rx_status, 1509 .get_rx_status = sgdma_rx_status,
1497 .init_dma = sgdma_initialize, 1510 .init_dma = sgdma_initialize,
1498 .uninit_dma = sgdma_uninitialize, 1511 .uninit_dma = sgdma_uninitialize,
1512 .start_rxdma = sgdma_start_rxdma,
1499}; 1513};
1500 1514
1501struct altera_dmaops altera_dtype_msgdma = { 1515struct altera_dmaops altera_dtype_msgdma = {
@@ -1514,6 +1528,7 @@ struct altera_dmaops altera_dtype_msgdma = {
1514 .get_rx_status = msgdma_rx_status, 1528 .get_rx_status = msgdma_rx_status,
1515 .init_dma = msgdma_initialize, 1529 .init_dma = msgdma_initialize,
1516 .uninit_dma = msgdma_uninitialize, 1530 .uninit_dma = msgdma_uninitialize,
1531 .start_rxdma = msgdma_start_rxdma,
1517}; 1532};
1518 1533
1519static struct of_device_id altera_tse_ids[] = { 1534static struct of_device_id altera_tse_ids[] = {