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-rw-r--r--drivers/net/e1000e/82571.c153
-rw-r--r--drivers/net/e1000e/defines.h15
-rw-r--r--drivers/net/e1000e/e1000.h31
-rw-r--r--drivers/net/e1000e/es2lan.c2
-rw-r--r--drivers/net/e1000e/ethtool.c60
-rw-r--r--drivers/net/e1000e/hw.h15
-rw-r--r--drivers/net/e1000e/ich8lan.c173
-rw-r--r--drivers/net/e1000e/lib.c7
-rw-r--r--drivers/net/e1000e/netdev.c435
-rw-r--r--drivers/net/e1000e/param.c27
-rw-r--r--drivers/net/e1000e/phy.c194
11 files changed, 1021 insertions, 91 deletions
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index 462351ca2c81..b2c910c52df9 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -38,6 +38,7 @@
38 * 82573V Gigabit Ethernet Controller (Copper) 38 * 82573V Gigabit Ethernet Controller (Copper)
39 * 82573E Gigabit Ethernet Controller (Copper) 39 * 82573E Gigabit Ethernet Controller (Copper)
40 * 82573L Gigabit Ethernet Controller 40 * 82573L Gigabit Ethernet Controller
41 * 82574L Gigabit Network Connection
41 */ 42 */
42 43
43#include <linux/netdevice.h> 44#include <linux/netdevice.h>
@@ -54,6 +55,8 @@
54 55
55#define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000 56#define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
56 57
58#define E1000_NVM_INIT_CTRL2_MNGM 0x6000 /* Manageability Operation Mode mask */
59
57static s32 e1000_get_phy_id_82571(struct e1000_hw *hw); 60static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);
58static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw); 61static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);
59static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw); 62static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);
@@ -63,6 +66,8 @@ static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);
63static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw); 66static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);
64static s32 e1000_setup_link_82571(struct e1000_hw *hw); 67static s32 e1000_setup_link_82571(struct e1000_hw *hw);
65static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw); 68static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);
69static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);
70static s32 e1000_led_on_82574(struct e1000_hw *hw);
66 71
67/** 72/**
68 * e1000_init_phy_params_82571 - Init PHY func ptrs. 73 * e1000_init_phy_params_82571 - Init PHY func ptrs.
@@ -92,6 +97,9 @@ static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
92 case e1000_82573: 97 case e1000_82573:
93 phy->type = e1000_phy_m88; 98 phy->type = e1000_phy_m88;
94 break; 99 break;
100 case e1000_82574:
101 phy->type = e1000_phy_bm;
102 break;
95 default: 103 default:
96 return -E1000_ERR_PHY; 104 return -E1000_ERR_PHY;
97 break; 105 break;
@@ -111,6 +119,10 @@ static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
111 if (phy->id != M88E1111_I_PHY_ID) 119 if (phy->id != M88E1111_I_PHY_ID)
112 return -E1000_ERR_PHY; 120 return -E1000_ERR_PHY;
113 break; 121 break;
122 case e1000_82574:
123 if (phy->id != BME1000_E_PHY_ID_R2)
124 return -E1000_ERR_PHY;
125 break;
114 default: 126 default:
115 return -E1000_ERR_PHY; 127 return -E1000_ERR_PHY;
116 break; 128 break;
@@ -150,6 +162,7 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)
150 162
151 switch (hw->mac.type) { 163 switch (hw->mac.type) {
152 case e1000_82573: 164 case e1000_82573:
165 case e1000_82574:
153 if (((eecd >> 15) & 0x3) == 0x3) { 166 if (((eecd >> 15) & 0x3) == 0x3) {
154 nvm->type = e1000_nvm_flash_hw; 167 nvm->type = e1000_nvm_flash_hw;
155 nvm->word_size = 2048; 168 nvm->word_size = 2048;
@@ -245,6 +258,17 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
245 break; 258 break;
246 } 259 }
247 260
261 switch (hw->mac.type) {
262 case e1000_82574:
263 func->check_mng_mode = e1000_check_mng_mode_82574;
264 func->led_on = e1000_led_on_82574;
265 break;
266 default:
267 func->check_mng_mode = e1000e_check_mng_mode_generic;
268 func->led_on = e1000e_led_on_generic;
269 break;
270 }
271
248 return 0; 272 return 0;
249} 273}
250 274
@@ -330,6 +354,8 @@ static s32 e1000_get_variants_82571(struct e1000_adapter *adapter)
330static s32 e1000_get_phy_id_82571(struct e1000_hw *hw) 354static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)
331{ 355{
332 struct e1000_phy_info *phy = &hw->phy; 356 struct e1000_phy_info *phy = &hw->phy;
357 s32 ret_val;
358 u16 phy_id = 0;
333 359
334 switch (hw->mac.type) { 360 switch (hw->mac.type) {
335 case e1000_82571: 361 case e1000_82571:
@@ -345,6 +371,20 @@ static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)
345 case e1000_82573: 371 case e1000_82573:
346 return e1000e_get_phy_id(hw); 372 return e1000e_get_phy_id(hw);
347 break; 373 break;
374 case e1000_82574:
375 ret_val = e1e_rphy(hw, PHY_ID1, &phy_id);
376 if (ret_val)
377 return ret_val;
378
379 phy->id = (u32)(phy_id << 16);
380 udelay(20);
381 ret_val = e1e_rphy(hw, PHY_ID2, &phy_id);
382 if (ret_val)
383 return ret_val;
384
385 phy->id |= (u32)(phy_id);
386 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
387 break;
348 default: 388 default:
349 return -E1000_ERR_PHY; 389 return -E1000_ERR_PHY;
350 break; 390 break;
@@ -421,7 +461,7 @@ static s32 e1000_acquire_nvm_82571(struct e1000_hw *hw)
421 if (ret_val) 461 if (ret_val)
422 return ret_val; 462 return ret_val;
423 463
424 if (hw->mac.type != e1000_82573) 464 if (hw->mac.type != e1000_82573 && hw->mac.type != e1000_82574)
425 ret_val = e1000e_acquire_nvm(hw); 465 ret_val = e1000e_acquire_nvm(hw);
426 466
427 if (ret_val) 467 if (ret_val)
@@ -461,6 +501,7 @@ static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words,
461 501
462 switch (hw->mac.type) { 502 switch (hw->mac.type) {
463 case e1000_82573: 503 case e1000_82573:
504 case e1000_82574:
464 ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data); 505 ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data);
465 break; 506 break;
466 case e1000_82571: 507 case e1000_82571:
@@ -735,7 +776,7 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
735 * Must acquire the MDIO ownership before MAC reset. 776 * Must acquire the MDIO ownership before MAC reset.
736 * Ownership defaults to firmware after a reset. 777 * Ownership defaults to firmware after a reset.
737 */ 778 */
738 if (hw->mac.type == e1000_82573) { 779 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) {
739 extcnf_ctrl = er32(EXTCNF_CTRL); 780 extcnf_ctrl = er32(EXTCNF_CTRL);
740 extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP; 781 extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
741 782
@@ -776,7 +817,7 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
776 * Need to wait for Phy configuration completion before accessing 817 * Need to wait for Phy configuration completion before accessing
777 * NVM and Phy. 818 * NVM and Phy.
778 */ 819 */
779 if (hw->mac.type == e1000_82573) 820 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574)
780 msleep(25); 821 msleep(25);
781 822
782 /* Clear any pending interrupt events. */ 823 /* Clear any pending interrupt events. */
@@ -843,7 +884,7 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw)
843 ew32(TXDCTL(0), reg_data); 884 ew32(TXDCTL(0), reg_data);
844 885
845 /* ...for both queues. */ 886 /* ...for both queues. */
846 if (mac->type != e1000_82573) { 887 if (mac->type != e1000_82573 && mac->type != e1000_82574) {
847 reg_data = er32(TXDCTL(1)); 888 reg_data = er32(TXDCTL(1));
848 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | 889 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
849 E1000_TXDCTL_FULL_TX_DESC_WB | 890 E1000_TXDCTL_FULL_TX_DESC_WB |
@@ -918,19 +959,28 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
918 } 959 }
919 960
920 /* Device Control */ 961 /* Device Control */
921 if (hw->mac.type == e1000_82573) { 962 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) {
922 reg = er32(CTRL); 963 reg = er32(CTRL);
923 reg &= ~(1 << 29); 964 reg &= ~(1 << 29);
924 ew32(CTRL, reg); 965 ew32(CTRL, reg);
925 } 966 }
926 967
927 /* Extended Device Control */ 968 /* Extended Device Control */
928 if (hw->mac.type == e1000_82573) { 969 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) {
929 reg = er32(CTRL_EXT); 970 reg = er32(CTRL_EXT);
930 reg &= ~(1 << 23); 971 reg &= ~(1 << 23);
931 reg |= (1 << 22); 972 reg |= (1 << 22);
932 ew32(CTRL_EXT, reg); 973 ew32(CTRL_EXT, reg);
933 } 974 }
975
976 /* PCI-Ex Control Register */
977 if (hw->mac.type == e1000_82574) {
978 reg = er32(GCR);
979 reg |= (1 << 22);
980 ew32(GCR, reg);
981 }
982
983 return;
934} 984}
935 985
936/** 986/**
@@ -947,7 +997,7 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
947 u32 vfta_offset = 0; 997 u32 vfta_offset = 0;
948 u32 vfta_bit_in_reg = 0; 998 u32 vfta_bit_in_reg = 0;
949 999
950 if (hw->mac.type == e1000_82573) { 1000 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) {
951 if (hw->mng_cookie.vlan_id != 0) { 1001 if (hw->mng_cookie.vlan_id != 0) {
952 /* 1002 /*
953 * The VFTA is a 4096b bit-field, each identifying 1003 * The VFTA is a 4096b bit-field, each identifying
@@ -976,6 +1026,48 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
976} 1026}
977 1027
978/** 1028/**
1029 * e1000_check_mng_mode_82574 - Check manageability is enabled
1030 * @hw: pointer to the HW structure
1031 *
1032 * Reads the NVM Initialization Control Word 2 and returns true
1033 * (>0) if any manageability is enabled, else false (0).
1034 **/
1035static bool e1000_check_mng_mode_82574(struct e1000_hw *hw)
1036{
1037 u16 data;
1038
1039 e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
1040 return (data & E1000_NVM_INIT_CTRL2_MNGM) != 0;
1041}
1042
1043/**
1044 * e1000_led_on_82574 - Turn LED on
1045 * @hw: pointer to the HW structure
1046 *
1047 * Turn LED on.
1048 **/
1049static s32 e1000_led_on_82574(struct e1000_hw *hw)
1050{
1051 u32 ctrl;
1052 u32 i;
1053
1054 ctrl = hw->mac.ledctl_mode2;
1055 if (!(E1000_STATUS_LU & er32(STATUS))) {
1056 /*
1057 * If no link, then turn LED on by setting the invert bit
1058 * for each LED that's "on" (0x0E) in ledctl_mode2.
1059 */
1060 for (i = 0; i < 4; i++)
1061 if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) ==
1062 E1000_LEDCTL_MODE_LED_ON)
1063 ctrl |= (E1000_LEDCTL_LED0_IVRT << (i * 8));
1064 }
1065 ew32(LEDCTL, ctrl);
1066
1067 return 0;
1068}
1069
1070/**
979 * e1000_update_mc_addr_list_82571 - Update Multicast addresses 1071 * e1000_update_mc_addr_list_82571 - Update Multicast addresses
980 * @hw: pointer to the HW structure 1072 * @hw: pointer to the HW structure
981 * @mc_addr_list: array of multicast addresses to program 1073 * @mc_addr_list: array of multicast addresses to program
@@ -1018,7 +1110,8 @@ static s32 e1000_setup_link_82571(struct e1000_hw *hw)
1018 * the default flow control setting, so we explicitly 1110 * the default flow control setting, so we explicitly
1019 * set it to full. 1111 * set it to full.
1020 */ 1112 */
1021 if (hw->mac.type == e1000_82573) 1113 if ((hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) &&
1114 hw->fc.type == e1000_fc_default)
1022 hw->fc.type = e1000_fc_full; 1115 hw->fc.type = e1000_fc_full;
1023 1116
1024 return e1000e_setup_link(hw); 1117 return e1000e_setup_link(hw);
@@ -1045,6 +1138,7 @@ static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw)
1045 1138
1046 switch (hw->phy.type) { 1139 switch (hw->phy.type) {
1047 case e1000_phy_m88: 1140 case e1000_phy_m88:
1141 case e1000_phy_bm:
1048 ret_val = e1000e_copper_link_setup_m88(hw); 1142 ret_val = e1000e_copper_link_setup_m88(hw);
1049 break; 1143 break;
1050 case e1000_phy_igp_2: 1144 case e1000_phy_igp_2:
@@ -1114,11 +1208,10 @@ static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data)
1114 return ret_val; 1208 return ret_val;
1115 } 1209 }
1116 1210
1117 if (hw->mac.type == e1000_82573 && 1211 if ((hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) &&
1118 *data == ID_LED_RESERVED_F746) 1212 *data == ID_LED_RESERVED_F746)
1119 *data = ID_LED_DEFAULT_82573; 1213 *data = ID_LED_DEFAULT_82573;
1120 else if (*data == ID_LED_RESERVED_0000 || 1214 else if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF)
1121 *data == ID_LED_RESERVED_FFFF)
1122 *data = ID_LED_DEFAULT; 1215 *data = ID_LED_DEFAULT;
1123 1216
1124 return 0; 1217 return 0;
@@ -1265,13 +1358,13 @@ static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw)
1265} 1358}
1266 1359
1267static struct e1000_mac_operations e82571_mac_ops = { 1360static struct e1000_mac_operations e82571_mac_ops = {
1268 .mng_mode_enab = E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT, 1361 /* .check_mng_mode: mac type dependent */
1269 /* .check_for_link: media type dependent */ 1362 /* .check_for_link: media type dependent */
1270 .cleanup_led = e1000e_cleanup_led_generic, 1363 .cleanup_led = e1000e_cleanup_led_generic,
1271 .clear_hw_cntrs = e1000_clear_hw_cntrs_82571, 1364 .clear_hw_cntrs = e1000_clear_hw_cntrs_82571,
1272 .get_bus_info = e1000e_get_bus_info_pcie, 1365 .get_bus_info = e1000e_get_bus_info_pcie,
1273 /* .get_link_up_info: media type dependent */ 1366 /* .get_link_up_info: media type dependent */
1274 .led_on = e1000e_led_on_generic, 1367 /* .led_on: mac type dependent */
1275 .led_off = e1000e_led_off_generic, 1368 .led_off = e1000e_led_off_generic,
1276 .update_mc_addr_list = e1000_update_mc_addr_list_82571, 1369 .update_mc_addr_list = e1000_update_mc_addr_list_82571,
1277 .reset_hw = e1000_reset_hw_82571, 1370 .reset_hw = e1000_reset_hw_82571,
@@ -1312,6 +1405,22 @@ static struct e1000_phy_operations e82_phy_ops_m88 = {
1312 .write_phy_reg = e1000e_write_phy_reg_m88, 1405 .write_phy_reg = e1000e_write_phy_reg_m88,
1313}; 1406};
1314 1407
1408static struct e1000_phy_operations e82_phy_ops_bm = {
1409 .acquire_phy = e1000_get_hw_semaphore_82571,
1410 .check_reset_block = e1000e_check_reset_block_generic,
1411 .commit_phy = e1000e_phy_sw_reset,
1412 .force_speed_duplex = e1000e_phy_force_speed_duplex_m88,
1413 .get_cfg_done = e1000e_get_cfg_done,
1414 .get_cable_length = e1000e_get_cable_length_m88,
1415 .get_phy_info = e1000e_get_phy_info_m88,
1416 .read_phy_reg = e1000e_read_phy_reg_bm2,
1417 .release_phy = e1000_put_hw_semaphore_82571,
1418 .reset_phy = e1000e_phy_hw_reset_generic,
1419 .set_d0_lplu_state = e1000_set_d0_lplu_state_82571,
1420 .set_d3_lplu_state = e1000e_set_d3_lplu_state,
1421 .write_phy_reg = e1000e_write_phy_reg_bm2,
1422};
1423
1315static struct e1000_nvm_operations e82571_nvm_ops = { 1424static struct e1000_nvm_operations e82571_nvm_ops = {
1316 .acquire_nvm = e1000_acquire_nvm_82571, 1425 .acquire_nvm = e1000_acquire_nvm_82571,
1317 .read_nvm = e1000e_read_nvm_eerd, 1426 .read_nvm = e1000e_read_nvm_eerd,
@@ -1375,3 +1484,21 @@ struct e1000_info e1000_82573_info = {
1375 .nvm_ops = &e82571_nvm_ops, 1484 .nvm_ops = &e82571_nvm_ops,
1376}; 1485};
1377 1486
1487struct e1000_info e1000_82574_info = {
1488 .mac = e1000_82574,
1489 .flags = FLAG_HAS_HW_VLAN_FILTER
1490 | FLAG_HAS_MSIX
1491 | FLAG_HAS_JUMBO_FRAMES
1492 | FLAG_HAS_WOL
1493 | FLAG_APME_IN_CTRL3
1494 | FLAG_RX_CSUM_ENABLED
1495 | FLAG_HAS_SMART_POWER_DOWN
1496 | FLAG_HAS_AMT
1497 | FLAG_HAS_CTRLEXT_ON_LOAD,
1498 .pba = 20,
1499 .get_variants = e1000_get_variants_82571,
1500 .mac_ops = &e82571_mac_ops,
1501 .phy_ops = &e82_phy_ops_bm,
1502 .nvm_ops = &e82571_nvm_ops,
1503};
1504
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h
index 14b0e6cd3b8d..48f79ecb82a0 100644
--- a/drivers/net/e1000e/defines.h
+++ b/drivers/net/e1000e/defines.h
@@ -71,9 +71,11 @@
71#define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ 71#define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */
72#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 72#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
73#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000 73#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000
74#define E1000_CTRL_EXT_EIAME 0x01000000
74#define E1000_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */ 75#define E1000_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */
75#define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */ 76#define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */
76#define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */ 77#define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */
78#define E1000_CTRL_EXT_PBA_CLR 0x80000000 /* PBA Clear */
77 79
78/* Receive Descriptor bit definitions */ 80/* Receive Descriptor bit definitions */
79#define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */ 81#define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */
@@ -299,6 +301,7 @@
299#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */ 301#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */
300 302
301/* Header split receive */ 303/* Header split receive */
304#define E1000_RFCTL_ACK_DIS 0x00001000
302#define E1000_RFCTL_EXTEN 0x00008000 305#define E1000_RFCTL_EXTEN 0x00008000
303#define E1000_RFCTL_IPV6_EX_DIS 0x00010000 306#define E1000_RFCTL_IPV6_EX_DIS 0x00010000
304#define E1000_RFCTL_NEW_IPV6_EXT_DIS 0x00020000 307#define E1000_RFCTL_NEW_IPV6_EXT_DIS 0x00020000
@@ -363,6 +366,11 @@
363#define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */ 366#define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */
364#define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */ 367#define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */
365#define E1000_ICR_INT_ASSERTED 0x80000000 /* If this bit asserted, the driver should claim the interrupt */ 368#define E1000_ICR_INT_ASSERTED 0x80000000 /* If this bit asserted, the driver should claim the interrupt */
369#define E1000_ICR_RXQ0 0x00100000 /* Rx Queue 0 Interrupt */
370#define E1000_ICR_RXQ1 0x00200000 /* Rx Queue 1 Interrupt */
371#define E1000_ICR_TXQ0 0x00400000 /* Tx Queue 0 Interrupt */
372#define E1000_ICR_TXQ1 0x00800000 /* Tx Queue 1 Interrupt */
373#define E1000_ICR_OTHER 0x01000000 /* Other Interrupts */
366 374
367/* 375/*
368 * This defines the bits that are set in the Interrupt Mask 376 * This defines the bits that are set in the Interrupt Mask
@@ -386,6 +394,11 @@
386#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* Rx sequence error */ 394#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* Rx sequence error */
387#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* Rx desc min. threshold */ 395#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* Rx desc min. threshold */
388#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* Rx timer intr */ 396#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* Rx timer intr */
397#define E1000_IMS_RXQ0 E1000_ICR_RXQ0 /* Rx Queue 0 Interrupt */
398#define E1000_IMS_RXQ1 E1000_ICR_RXQ1 /* Rx Queue 1 Interrupt */
399#define E1000_IMS_TXQ0 E1000_ICR_TXQ0 /* Tx Queue 0 Interrupt */
400#define E1000_IMS_TXQ1 E1000_ICR_TXQ1 /* Tx Queue 1 Interrupt */
401#define E1000_IMS_OTHER E1000_ICR_OTHER /* Other Interrupts */
389 402
390/* Interrupt Cause Set */ 403/* Interrupt Cause Set */
391#define E1000_ICS_LSC E1000_ICR_LSC /* Link Status Change */ 404#define E1000_ICS_LSC E1000_ICR_LSC /* Link Status Change */
@@ -505,6 +518,7 @@
505#define NWAY_LPAR_ASM_DIR 0x0800 /* LP Asymmetric Pause Direction bit */ 518#define NWAY_LPAR_ASM_DIR 0x0800 /* LP Asymmetric Pause Direction bit */
506 519
507/* Autoneg Expansion Register */ 520/* Autoneg Expansion Register */
521#define NWAY_ER_LP_NWAY_CAPS 0x0001 /* LP has Auto Neg Capability */
508 522
509/* 1000BASE-T Control Register */ 523/* 1000BASE-T Control Register */
510#define CR_1000T_HD_CAPS 0x0100 /* Advertise 1000T HD capability */ 524#define CR_1000T_HD_CAPS 0x0100 /* Advertise 1000T HD capability */
@@ -540,6 +554,7 @@
540#define E1000_EECD_DO 0x00000008 /* NVM Data Out */ 554#define E1000_EECD_DO 0x00000008 /* NVM Data Out */
541#define E1000_EECD_REQ 0x00000040 /* NVM Access Request */ 555#define E1000_EECD_REQ 0x00000040 /* NVM Access Request */
542#define E1000_EECD_GNT 0x00000080 /* NVM Access Grant */ 556#define E1000_EECD_GNT 0x00000080 /* NVM Access Grant */
557#define E1000_EECD_PRES 0x00000100 /* NVM Present */
543#define E1000_EECD_SIZE 0x00000200 /* NVM Size (0=64 word 1=256 word) */ 558#define E1000_EECD_SIZE 0x00000200 /* NVM Size (0=64 word 1=256 word) */
544/* NVM Addressing bits based on type (0-small, 1-large) */ 559/* NVM Addressing bits based on type (0-small, 1-large) */
545#define E1000_EECD_ADDR_BITS 0x00000400 560#define E1000_EECD_ADDR_BITS 0x00000400
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index ac4e506b4f88..0a1916b0419d 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -62,6 +62,11 @@ struct e1000_info;
62 e_printk(KERN_NOTICE, adapter, format, ## arg) 62 e_printk(KERN_NOTICE, adapter, format, ## arg)
63 63
64 64
65/* Interrupt modes, as used by the IntMode paramter */
66#define E1000E_INT_MODE_LEGACY 0
67#define E1000E_INT_MODE_MSI 1
68#define E1000E_INT_MODE_MSIX 2
69
65/* Tx/Rx descriptor defines */ 70/* Tx/Rx descriptor defines */
66#define E1000_DEFAULT_TXD 256 71#define E1000_DEFAULT_TXD 256
67#define E1000_MAX_TXD 4096 72#define E1000_MAX_TXD 4096
@@ -95,9 +100,11 @@ enum e1000_boards {
95 board_82571, 100 board_82571,
96 board_82572, 101 board_82572,
97 board_82573, 102 board_82573,
103 board_82574,
98 board_80003es2lan, 104 board_80003es2lan,
99 board_ich8lan, 105 board_ich8lan,
100 board_ich9lan, 106 board_ich9lan,
107 board_ich10lan,
101}; 108};
102 109
103struct e1000_queue_stats { 110struct e1000_queue_stats {
@@ -146,6 +153,12 @@ struct e1000_ring {
146 /* array of buffer information structs */ 153 /* array of buffer information structs */
147 struct e1000_buffer *buffer_info; 154 struct e1000_buffer *buffer_info;
148 155
156 char name[IFNAMSIZ + 5];
157 u32 ims_val;
158 u32 itr_val;
159 u16 itr_register;
160 int set_itr;
161
149 struct sk_buff *rx_skb_top; 162 struct sk_buff *rx_skb_top;
150 163
151 struct e1000_queue_stats stats; 164 struct e1000_queue_stats stats;
@@ -274,6 +287,9 @@ struct e1000_adapter {
274 u32 test_icr; 287 u32 test_icr;
275 288
276 u32 msg_enable; 289 u32 msg_enable;
290 struct msix_entry *msix_entries;
291 int int_mode;
292 u32 eiac_mask;
277 293
278 u32 eeprom_wol; 294 u32 eeprom_wol;
279 u32 wol; 295 u32 wol;
@@ -306,6 +322,7 @@ struct e1000_info {
306#define FLAG_HAS_SWSM_ON_LOAD (1 << 6) 322#define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
307#define FLAG_HAS_JUMBO_FRAMES (1 << 7) 323#define FLAG_HAS_JUMBO_FRAMES (1 << 7)
308#define FLAG_IS_ICH (1 << 9) 324#define FLAG_IS_ICH (1 << 9)
325#define FLAG_HAS_MSIX (1 << 10)
309#define FLAG_HAS_SMART_POWER_DOWN (1 << 11) 326#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
310#define FLAG_IS_QUAD_PORT_A (1 << 12) 327#define FLAG_IS_QUAD_PORT_A (1 << 12)
311#define FLAG_IS_QUAD_PORT (1 << 13) 328#define FLAG_IS_QUAD_PORT (1 << 13)
@@ -364,6 +381,8 @@ extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
364extern void e1000e_free_rx_resources(struct e1000_adapter *adapter); 381extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
365extern void e1000e_free_tx_resources(struct e1000_adapter *adapter); 382extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
366extern void e1000e_update_stats(struct e1000_adapter *adapter); 383extern void e1000e_update_stats(struct e1000_adapter *adapter);
384extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
385extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
367 386
368extern unsigned int copybreak; 387extern unsigned int copybreak;
369 388
@@ -372,8 +391,10 @@ extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
372extern struct e1000_info e1000_82571_info; 391extern struct e1000_info e1000_82571_info;
373extern struct e1000_info e1000_82572_info; 392extern struct e1000_info e1000_82572_info;
374extern struct e1000_info e1000_82573_info; 393extern struct e1000_info e1000_82573_info;
394extern struct e1000_info e1000_82574_info;
375extern struct e1000_info e1000_ich8_info; 395extern struct e1000_info e1000_ich8_info;
376extern struct e1000_info e1000_ich9_info; 396extern struct e1000_info e1000_ich9_info;
397extern struct e1000_info e1000_ich10_info;
377extern struct e1000_info e1000_es2_info; 398extern struct e1000_info e1000_es2_info;
378 399
379extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num); 400extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
@@ -446,10 +467,13 @@ extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
446extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw); 467extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
447extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); 468extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
448extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); 469extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
470extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
449extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id); 471extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
450extern s32 e1000e_determine_phy_address(struct e1000_hw *hw); 472extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
451extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data); 473extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
452extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data); 474extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
475extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
476extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
453extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); 477extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
454extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); 478extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
455extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); 479extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
@@ -520,7 +544,12 @@ static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
520 return hw->phy.ops.get_phy_info(hw); 544 return hw->phy.ops.get_phy_info(hw);
521} 545}
522 546
523extern bool e1000e_check_mng_mode(struct e1000_hw *hw); 547static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
548{
549 return hw->mac.ops.check_mng_mode(hw);
550}
551
552extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
524extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw); 553extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
525extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length); 554extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
526 555
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c
index dc552d7d6fac..da9c09c248ed 100644
--- a/drivers/net/e1000e/es2lan.c
+++ b/drivers/net/e1000e/es2lan.c
@@ -1247,7 +1247,7 @@ static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw)
1247} 1247}
1248 1248
1249static struct e1000_mac_operations es2_mac_ops = { 1249static struct e1000_mac_operations es2_mac_ops = {
1250 .mng_mode_enab = E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT, 1250 .check_mng_mode = e1000e_check_mng_mode_generic,
1251 /* check_for_link dependent on media type */ 1251 /* check_for_link dependent on media type */
1252 .cleanup_led = e1000e_cleanup_led_generic, 1252 .cleanup_led = e1000e_cleanup_led_generic,
1253 .clear_hw_cntrs = e1000_clear_hw_cntrs_80003es2lan, 1253 .clear_hw_cntrs = e1000_clear_hw_cntrs_80003es2lan,
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c
index e21c9e0f3738..52b762eb1745 100644
--- a/drivers/net/e1000e/ethtool.c
+++ b/drivers/net/e1000e/ethtool.c
@@ -568,6 +568,7 @@ static int e1000_set_eeprom(struct net_device *netdev,
568 * and flush shadow RAM for 82573 controllers 568 * and flush shadow RAM for 82573 controllers
569 */ 569 */
570 if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG) || 570 if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG) ||
571 (hw->mac.type == e1000_82574) ||
571 (hw->mac.type == e1000_82573))) 572 (hw->mac.type == e1000_82573)))
572 e1000e_update_nvm_checksum(hw); 573 e1000e_update_nvm_checksum(hw);
573 574
@@ -779,8 +780,10 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
779 toggle = 0x7FFFF3FF; 780 toggle = 0x7FFFF3FF;
780 break; 781 break;
781 case e1000_82573: 782 case e1000_82573:
783 case e1000_82574:
782 case e1000_ich8lan: 784 case e1000_ich8lan:
783 case e1000_ich9lan: 785 case e1000_ich9lan:
786 case e1000_ich10lan:
784 toggle = 0x7FFFF033; 787 toggle = 0x7FFFF033;
785 break; 788 break;
786 default: 789 default:
@@ -833,7 +836,9 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
833 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF); 836 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
834 for (i = 0; i < mac->rar_entry_count; i++) 837 for (i = 0; i < mac->rar_entry_count; i++)
835 REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1), 838 REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1),
836 0x8003FFFF, 0xFFFFFFFF); 839 ((mac->type == e1000_ich10lan) ?
840 0x8007FFFF : 0x8003FFFF),
841 0xFFFFFFFF);
837 842
838 for (i = 0; i < mac->mta_reg_count; i++) 843 for (i = 0; i < mac->mta_reg_count; i++)
839 REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF); 844 REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);
@@ -884,10 +889,18 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
884 u32 shared_int = 1; 889 u32 shared_int = 1;
885 u32 irq = adapter->pdev->irq; 890 u32 irq = adapter->pdev->irq;
886 int i; 891 int i;
892 int ret_val = 0;
893 int int_mode = E1000E_INT_MODE_LEGACY;
887 894
888 *data = 0; 895 *data = 0;
889 896
890 /* NOTE: we don't test MSI interrupts here, yet */ 897 /* NOTE: we don't test MSI/MSI-X interrupts here, yet */
898 if (adapter->int_mode == E1000E_INT_MODE_MSIX) {
899 int_mode = adapter->int_mode;
900 e1000e_reset_interrupt_capability(adapter);
901 adapter->int_mode = E1000E_INT_MODE_LEGACY;
902 e1000e_set_interrupt_capability(adapter);
903 }
891 /* Hook up test interrupt handler just for this test */ 904 /* Hook up test interrupt handler just for this test */
892 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name, 905 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
893 netdev)) { 906 netdev)) {
@@ -895,7 +908,8 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
895 } else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED, 908 } else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
896 netdev->name, netdev)) { 909 netdev->name, netdev)) {
897 *data = 1; 910 *data = 1;
898 return -1; 911 ret_val = -1;
912 goto out;
899 } 913 }
900 e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared")); 914 e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared"));
901 915
@@ -905,12 +919,23 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
905 919
906 /* Test each interrupt */ 920 /* Test each interrupt */
907 for (i = 0; i < 10; i++) { 921 for (i = 0; i < 10; i++) {
908 if ((adapter->flags & FLAG_IS_ICH) && (i == 8))
909 continue;
910
911 /* Interrupt to test */ 922 /* Interrupt to test */
912 mask = 1 << i; 923 mask = 1 << i;
913 924
925 if (adapter->flags & FLAG_IS_ICH) {
926 switch (mask) {
927 case E1000_ICR_RXSEQ:
928 continue;
929 case 0x00000100:
930 if (adapter->hw.mac.type == e1000_ich8lan ||
931 adapter->hw.mac.type == e1000_ich9lan)
932 continue;
933 break;
934 default:
935 break;
936 }
937 }
938
914 if (!shared_int) { 939 if (!shared_int) {
915 /* 940 /*
916 * Disable the interrupt to be reported in 941 * Disable the interrupt to be reported in
@@ -974,7 +999,14 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
974 /* Unhook test interrupt handler */ 999 /* Unhook test interrupt handler */
975 free_irq(irq, netdev); 1000 free_irq(irq, netdev);
976 1001
977 return *data; 1002out:
1003 if (int_mode == E1000E_INT_MODE_MSIX) {
1004 e1000e_reset_interrupt_capability(adapter);
1005 adapter->int_mode = int_mode;
1006 e1000e_set_interrupt_capability(adapter);
1007 }
1008
1009 return ret_val;
978} 1010}
979 1011
980static void e1000_free_desc_rings(struct e1000_adapter *adapter) 1012static void e1000_free_desc_rings(struct e1000_adapter *adapter)
@@ -1755,11 +1787,13 @@ static void e1000_led_blink_callback(unsigned long data)
1755static int e1000_phys_id(struct net_device *netdev, u32 data) 1787static int e1000_phys_id(struct net_device *netdev, u32 data)
1756{ 1788{
1757 struct e1000_adapter *adapter = netdev_priv(netdev); 1789 struct e1000_adapter *adapter = netdev_priv(netdev);
1790 struct e1000_hw *hw = &adapter->hw;
1758 1791
1759 if (!data) 1792 if (!data)
1760 data = INT_MAX; 1793 data = INT_MAX;
1761 1794
1762 if (adapter->hw.phy.type == e1000_phy_ife) { 1795 if ((hw->phy.type == e1000_phy_ife) ||
1796 (hw->mac.type == e1000_82574)) {
1763 if (!adapter->blink_timer.function) { 1797 if (!adapter->blink_timer.function) {
1764 init_timer(&adapter->blink_timer); 1798 init_timer(&adapter->blink_timer);
1765 adapter->blink_timer.function = 1799 adapter->blink_timer.function =
@@ -1769,16 +1803,16 @@ static int e1000_phys_id(struct net_device *netdev, u32 data)
1769 mod_timer(&adapter->blink_timer, jiffies); 1803 mod_timer(&adapter->blink_timer, jiffies);
1770 msleep_interruptible(data * 1000); 1804 msleep_interruptible(data * 1000);
1771 del_timer_sync(&adapter->blink_timer); 1805 del_timer_sync(&adapter->blink_timer);
1772 e1e_wphy(&adapter->hw, 1806 if (hw->phy.type == e1000_phy_ife)
1773 IFE_PHY_SPECIAL_CONTROL_LED, 0); 1807 e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);
1774 } else { 1808 } else {
1775 e1000e_blink_led(&adapter->hw); 1809 e1000e_blink_led(hw);
1776 msleep_interruptible(data * 1000); 1810 msleep_interruptible(data * 1000);
1777 } 1811 }
1778 1812
1779 adapter->hw.mac.ops.led_off(&adapter->hw); 1813 hw->mac.ops.led_off(hw);
1780 clear_bit(E1000_LED_ON, &adapter->led_status); 1814 clear_bit(E1000_LED_ON, &adapter->led_status);
1781 adapter->hw.mac.ops.cleanup_led(&adapter->hw); 1815 hw->mac.ops.cleanup_led(hw);
1782 1816
1783 return 0; 1817 return 0;
1784} 1818}
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index 74f263acb172..f66ed37a7f76 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -65,7 +65,11 @@ enum e1e_registers {
65 E1000_ICS = 0x000C8, /* Interrupt Cause Set - WO */ 65 E1000_ICS = 0x000C8, /* Interrupt Cause Set - WO */
66 E1000_IMS = 0x000D0, /* Interrupt Mask Set - RW */ 66 E1000_IMS = 0x000D0, /* Interrupt Mask Set - RW */
67 E1000_IMC = 0x000D8, /* Interrupt Mask Clear - WO */ 67 E1000_IMC = 0x000D8, /* Interrupt Mask Clear - WO */
68 E1000_EIAC_82574 = 0x000DC, /* Ext. Interrupt Auto Clear - RW */
68 E1000_IAM = 0x000E0, /* Interrupt Acknowledge Auto Mask */ 69 E1000_IAM = 0x000E0, /* Interrupt Acknowledge Auto Mask */
70 E1000_IVAR = 0x000E4, /* Interrupt Vector Allocation - RW */
71 E1000_EITR_82574_BASE = 0x000E8, /* Interrupt Throttling - RW */
72#define E1000_EITR_82574(_n) (E1000_EITR_82574_BASE + (_n << 2))
69 E1000_RCTL = 0x00100, /* Rx Control - RW */ 73 E1000_RCTL = 0x00100, /* Rx Control - RW */
70 E1000_FCTTV = 0x00170, /* Flow Control Transmit Timer Value - RW */ 74 E1000_FCTTV = 0x00170, /* Flow Control Transmit Timer Value - RW */
71 E1000_TXCW = 0x00178, /* Tx Configuration Word - RW */ 75 E1000_TXCW = 0x00178, /* Tx Configuration Word - RW */
@@ -332,6 +336,7 @@ enum e1e_registers {
332#define E1000_DEV_ID_82573E 0x108B 336#define E1000_DEV_ID_82573E 0x108B
333#define E1000_DEV_ID_82573E_IAMT 0x108C 337#define E1000_DEV_ID_82573E_IAMT 0x108C
334#define E1000_DEV_ID_82573L 0x109A 338#define E1000_DEV_ID_82573L 0x109A
339#define E1000_DEV_ID_82574L 0x10D3
335 340
336#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT 0x1096 341#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT 0x1096
337#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT 0x1098 342#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT 0x1098
@@ -346,6 +351,7 @@ enum e1e_registers {
346#define E1000_DEV_ID_ICH8_IFE_G 0x10C5 351#define E1000_DEV_ID_ICH8_IFE_G 0x10C5
347#define E1000_DEV_ID_ICH8_IGP_M 0x104D 352#define E1000_DEV_ID_ICH8_IGP_M 0x104D
348#define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD 353#define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD
354#define E1000_DEV_ID_ICH9_BM 0x10E5
349#define E1000_DEV_ID_ICH9_IGP_M_AMT 0x10F5 355#define E1000_DEV_ID_ICH9_IGP_M_AMT 0x10F5
350#define E1000_DEV_ID_ICH9_IGP_M 0x10BF 356#define E1000_DEV_ID_ICH9_IGP_M 0x10BF
351#define E1000_DEV_ID_ICH9_IGP_M_V 0x10CB 357#define E1000_DEV_ID_ICH9_IGP_M_V 0x10CB
@@ -356,6 +362,10 @@ enum e1e_registers {
356#define E1000_DEV_ID_ICH10_R_BM_LM 0x10CC 362#define E1000_DEV_ID_ICH10_R_BM_LM 0x10CC
357#define E1000_DEV_ID_ICH10_R_BM_LF 0x10CD 363#define E1000_DEV_ID_ICH10_R_BM_LF 0x10CD
358#define E1000_DEV_ID_ICH10_R_BM_V 0x10CE 364#define E1000_DEV_ID_ICH10_R_BM_V 0x10CE
365#define E1000_DEV_ID_ICH10_D_BM_LM 0x10DE
366#define E1000_DEV_ID_ICH10_D_BM_LF 0x10DF
367
368#define E1000_REVISION_4 4
359 369
360#define E1000_FUNC_1 1 370#define E1000_FUNC_1 1
361 371
@@ -363,9 +373,11 @@ enum e1000_mac_type {
363 e1000_82571, 373 e1000_82571,
364 e1000_82572, 374 e1000_82572,
365 e1000_82573, 375 e1000_82573,
376 e1000_82574,
366 e1000_80003es2lan, 377 e1000_80003es2lan,
367 e1000_ich8lan, 378 e1000_ich8lan,
368 e1000_ich9lan, 379 e1000_ich9lan,
380 e1000_ich10lan,
369}; 381};
370 382
371enum e1000_media_type { 383enum e1000_media_type {
@@ -696,8 +708,7 @@ struct e1000_host_mng_command_info {
696 708
697/* Function pointers and static data for the MAC. */ 709/* Function pointers and static data for the MAC. */
698struct e1000_mac_operations { 710struct e1000_mac_operations {
699 u32 mng_mode_enab; 711 bool (*check_mng_mode)(struct e1000_hw *);
700
701 s32 (*check_for_link)(struct e1000_hw *); 712 s32 (*check_for_link)(struct e1000_hw *);
702 s32 (*cleanup_led)(struct e1000_hw *); 713 s32 (*cleanup_led)(struct e1000_hw *);
703 void (*clear_hw_cntrs)(struct e1000_hw *); 714 void (*clear_hw_cntrs)(struct e1000_hw *);
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 9e38452a738c..019b9c0bcdcb 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -43,7 +43,9 @@
43 * 82567LM-2 Gigabit Network Connection 43 * 82567LM-2 Gigabit Network Connection
44 * 82567LF-2 Gigabit Network Connection 44 * 82567LF-2 Gigabit Network Connection
45 * 82567V-2 Gigabit Network Connection 45 * 82567V-2 Gigabit Network Connection
46 * 82562GT-3 10/100 Network Connection 46 * 82567LF-3 Gigabit Network Connection
47 * 82567LM-3 Gigabit Network Connection
48 * 82567LM-4 Gigabit Network Connection
47 */ 49 */
48 50
49#include <linux/netdevice.h> 51#include <linux/netdevice.h>
@@ -157,12 +159,15 @@ static s32 e1000_check_polarity_ife_ich8lan(struct e1000_hw *hw);
157static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank); 159static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank);
158static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw, 160static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,
159 u32 offset, u8 byte); 161 u32 offset, u8 byte);
162static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
163 u8 *data);
160static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset, 164static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,
161 u16 *data); 165 u16 *data);
162static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, 166static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
163 u8 size, u16 *data); 167 u8 size, u16 *data);
164static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw); 168static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw);
165static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw); 169static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw);
170static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw);
166 171
167static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) 172static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)
168{ 173{
@@ -417,6 +422,22 @@ static void e1000_release_swflag_ich8lan(struct e1000_hw *hw)
417} 422}
418 423
419/** 424/**
425 * e1000_check_mng_mode_ich8lan - Checks management mode
426 * @hw: pointer to the HW structure
427 *
428 * This checks if the adapter has manageability enabled.
429 * This is a function pointer entry point only called by read/write
430 * routines for the PHY and NVM parts.
431 **/
432static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw)
433{
434 u32 fwsm = er32(FWSM);
435
436 return (fwsm & E1000_FWSM_MODE_MASK) ==
437 (E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
438}
439
440/**
420 * e1000_check_reset_block_ich8lan - Check if PHY reset is blocked 441 * e1000_check_reset_block_ich8lan - Check if PHY reset is blocked
421 * @hw: pointer to the HW structure 442 * @hw: pointer to the HW structure
422 * 443 *
@@ -897,6 +918,56 @@ static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
897} 918}
898 919
899/** 920/**
921 * e1000_valid_nvm_bank_detect_ich8lan - finds out the valid bank 0 or 1
922 * @hw: pointer to the HW structure
923 * @bank: pointer to the variable that returns the active bank
924 *
925 * Reads signature byte from the NVM using the flash access registers.
926 **/
927static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
928{
929 struct e1000_nvm_info *nvm = &hw->nvm;
930 /* flash bank size is in words */
931 u32 bank1_offset = nvm->flash_bank_size * sizeof(u16);
932 u32 act_offset = E1000_ICH_NVM_SIG_WORD * 2 + 1;
933 u8 bank_high_byte = 0;
934
935 if (hw->mac.type != e1000_ich10lan) {
936 if (er32(EECD) & E1000_EECD_SEC1VAL)
937 *bank = 1;
938 else
939 *bank = 0;
940 } else {
941 /*
942 * Make sure the signature for bank 0 is valid,
943 * if not check for bank1
944 */
945 e1000_read_flash_byte_ich8lan(hw, act_offset, &bank_high_byte);
946 if ((bank_high_byte & 0xC0) == 0x80) {
947 *bank = 0;
948 } else {
949 /*
950 * find if segment 1 is valid by verifying
951 * bit 15:14 = 10b in word 0x13
952 */
953 e1000_read_flash_byte_ich8lan(hw,
954 act_offset + bank1_offset,
955 &bank_high_byte);
956
957 /* bank1 has a valid signature equivalent to SEC1V */
958 if ((bank_high_byte & 0xC0) == 0x80) {
959 *bank = 1;
960 } else {
961 hw_dbg(hw, "ERROR: EEPROM not present\n");
962 return -E1000_ERR_NVM;
963 }
964 }
965 }
966
967 return 0;
968}
969
970/**
900 * e1000_read_nvm_ich8lan - Read word(s) from the NVM 971 * e1000_read_nvm_ich8lan - Read word(s) from the NVM
901 * @hw: pointer to the HW structure 972 * @hw: pointer to the HW structure
902 * @offset: The offset (in bytes) of the word(s) to read. 973 * @offset: The offset (in bytes) of the word(s) to read.
@@ -912,6 +983,7 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
912 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; 983 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
913 u32 act_offset; 984 u32 act_offset;
914 s32 ret_val; 985 s32 ret_val;
986 u32 bank = 0;
915 u16 i, word; 987 u16 i, word;
916 988
917 if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) || 989 if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) ||
@@ -924,10 +996,11 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
924 if (ret_val) 996 if (ret_val)
925 return ret_val; 997 return ret_val;
926 998
927 /* Start with the bank offset, then add the relative offset. */ 999 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);
928 act_offset = (er32(EECD) & E1000_EECD_SEC1VAL) 1000 if (ret_val)
929 ? nvm->flash_bank_size 1001 return ret_val;
930 : 0; 1002
1003 act_offset = (bank) ? nvm->flash_bank_size : 0;
931 act_offset += offset; 1004 act_offset += offset;
932 1005
933 for (i = 0; i < words; i++) { 1006 for (i = 0; i < words; i++) {
@@ -1075,6 +1148,29 @@ static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,
1075} 1148}
1076 1149
1077/** 1150/**
1151 * e1000_read_flash_byte_ich8lan - Read byte from flash
1152 * @hw: pointer to the HW structure
1153 * @offset: The offset of the byte to read.
1154 * @data: Pointer to a byte to store the value read.
1155 *
1156 * Reads a single byte from the NVM using the flash access registers.
1157 **/
1158static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
1159 u8 *data)
1160{
1161 s32 ret_val;
1162 u16 word = 0;
1163
1164 ret_val = e1000_read_flash_data_ich8lan(hw, offset, 1, &word);
1165 if (ret_val)
1166 return ret_val;
1167
1168 *data = (u8)word;
1169
1170 return 0;
1171}
1172
1173/**
1078 * e1000_read_flash_data_ich8lan - Read byte or word from NVM 1174 * e1000_read_flash_data_ich8lan - Read byte or word from NVM
1079 * @hw: pointer to the HW structure 1175 * @hw: pointer to the HW structure
1080 * @offset: The offset (in bytes) of the byte or word to read. 1176 * @offset: The offset (in bytes) of the byte or word to read.
@@ -1205,7 +1301,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1205{ 1301{
1206 struct e1000_nvm_info *nvm = &hw->nvm; 1302 struct e1000_nvm_info *nvm = &hw->nvm;
1207 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; 1303 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
1208 u32 i, act_offset, new_bank_offset, old_bank_offset; 1304 u32 i, act_offset, new_bank_offset, old_bank_offset, bank;
1209 s32 ret_val; 1305 s32 ret_val;
1210 u16 data; 1306 u16 data;
1211 1307
@@ -1225,7 +1321,11 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1225 * write to bank 0 etc. We also need to erase the segment that 1321 * write to bank 0 etc. We also need to erase the segment that
1226 * is going to be written 1322 * is going to be written
1227 */ 1323 */
1228 if (!(er32(EECD) & E1000_EECD_SEC1VAL)) { 1324 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);
1325 if (ret_val)
1326 return ret_val;
1327
1328 if (bank == 0) {
1229 new_bank_offset = nvm->flash_bank_size; 1329 new_bank_offset = nvm->flash_bank_size;
1230 old_bank_offset = 0; 1330 old_bank_offset = 0;
1231 e1000_erase_flash_bank_ich8lan(hw, 1); 1331 e1000_erase_flash_bank_ich8lan(hw, 1);
@@ -2189,13 +2289,14 @@ void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw)
2189 * 'LPLU Enabled' and 'Gig Disable' to force link speed negotiation 2289 * 'LPLU Enabled' and 'Gig Disable' to force link speed negotiation
2190 * to a lower speed. 2290 * to a lower speed.
2191 * 2291 *
2192 * Should only be called for ICH9 devices. 2292 * Should only be called for ICH9 and ICH10 devices.
2193 **/ 2293 **/
2194void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw) 2294void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw)
2195{ 2295{
2196 u32 phy_ctrl; 2296 u32 phy_ctrl;
2197 2297
2198 if (hw->mac.type == e1000_ich9lan) { 2298 if ((hw->mac.type == e1000_ich10lan) ||
2299 (hw->mac.type == e1000_ich9lan)) {
2199 phy_ctrl = er32(PHY_CTRL); 2300 phy_ctrl = er32(PHY_CTRL);
2200 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU | 2301 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU |
2201 E1000_PHY_CTRL_GBE_DISABLE; 2302 E1000_PHY_CTRL_GBE_DISABLE;
@@ -2253,6 +2354,39 @@ static s32 e1000_led_off_ich8lan(struct e1000_hw *hw)
2253} 2354}
2254 2355
2255/** 2356/**
2357 * e1000_get_cfg_done_ich8lan - Read config done bit
2358 * @hw: pointer to the HW structure
2359 *
2360 * Read the management control register for the config done bit for
2361 * completion status. NOTE: silicon which is EEPROM-less will fail trying
2362 * to read the config done bit, so an error is *ONLY* logged and returns
2363 * E1000_SUCCESS. If we were to return with error, EEPROM-less silicon
2364 * would not be able to be reset or change link.
2365 **/
2366static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw)
2367{
2368 u32 bank = 0;
2369
2370 e1000e_get_cfg_done(hw);
2371
2372 /* If EEPROM is not marked present, init the IGP 3 PHY manually */
2373 if (hw->mac.type != e1000_ich10lan) {
2374 if (((er32(EECD) & E1000_EECD_PRES) == 0) &&
2375 (hw->phy.type == e1000_phy_igp_3)) {
2376 e1000e_phy_init_script_igp3(hw);
2377 }
2378 } else {
2379 if (e1000_valid_nvm_bank_detect_ich8lan(hw, &bank)) {
2380 /* Maybe we should do a basic PHY config */
2381 hw_dbg(hw, "EEPROM not present\n");
2382 return -E1000_ERR_CONFIG;
2383 }
2384 }
2385
2386 return 0;
2387}
2388
2389/**
2256 * e1000_clear_hw_cntrs_ich8lan - Clear statistical counters 2390 * e1000_clear_hw_cntrs_ich8lan - Clear statistical counters
2257 * @hw: pointer to the HW structure 2391 * @hw: pointer to the HW structure
2258 * 2392 *
@@ -2282,7 +2416,7 @@ static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw)
2282} 2416}
2283 2417
2284static struct e1000_mac_operations ich8_mac_ops = { 2418static struct e1000_mac_operations ich8_mac_ops = {
2285 .mng_mode_enab = E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT, 2419 .check_mng_mode = e1000_check_mng_mode_ich8lan,
2286 .check_for_link = e1000e_check_for_copper_link, 2420 .check_for_link = e1000e_check_for_copper_link,
2287 .cleanup_led = e1000_cleanup_led_ich8lan, 2421 .cleanup_led = e1000_cleanup_led_ich8lan,
2288 .clear_hw_cntrs = e1000_clear_hw_cntrs_ich8lan, 2422 .clear_hw_cntrs = e1000_clear_hw_cntrs_ich8lan,
@@ -2302,7 +2436,7 @@ static struct e1000_phy_operations ich8_phy_ops = {
2302 .check_reset_block = e1000_check_reset_block_ich8lan, 2436 .check_reset_block = e1000_check_reset_block_ich8lan,
2303 .commit_phy = NULL, 2437 .commit_phy = NULL,
2304 .force_speed_duplex = e1000_phy_force_speed_duplex_ich8lan, 2438 .force_speed_duplex = e1000_phy_force_speed_duplex_ich8lan,
2305 .get_cfg_done = e1000e_get_cfg_done, 2439 .get_cfg_done = e1000_get_cfg_done_ich8lan,
2306 .get_cable_length = e1000e_get_cable_length_igp_2, 2440 .get_cable_length = e1000e_get_cable_length_igp_2,
2307 .get_phy_info = e1000_get_phy_info_ich8lan, 2441 .get_phy_info = e1000_get_phy_info_ich8lan,
2308 .read_phy_reg = e1000e_read_phy_reg_igp, 2442 .read_phy_reg = e1000e_read_phy_reg_igp,
@@ -2357,3 +2491,20 @@ struct e1000_info e1000_ich9_info = {
2357 .nvm_ops = &ich8_nvm_ops, 2491 .nvm_ops = &ich8_nvm_ops,
2358}; 2492};
2359 2493
2494struct e1000_info e1000_ich10_info = {
2495 .mac = e1000_ich10lan,
2496 .flags = FLAG_HAS_JUMBO_FRAMES
2497 | FLAG_IS_ICH
2498 | FLAG_HAS_WOL
2499 | FLAG_RX_CSUM_ENABLED
2500 | FLAG_HAS_CTRLEXT_ON_LOAD
2501 | FLAG_HAS_AMT
2502 | FLAG_HAS_ERT
2503 | FLAG_HAS_FLASH
2504 | FLAG_APME_IN_WUC,
2505 .pba = 10,
2506 .get_variants = e1000_get_variants_ich8lan,
2507 .mac_ops = &ich8_mac_ops,
2508 .phy_ops = &ich8_phy_ops,
2509 .nvm_ops = &ich8_nvm_ops,
2510};
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c
index f1f4e9dfd0a0..c7337306ffa7 100644
--- a/drivers/net/e1000e/lib.c
+++ b/drivers/net/e1000e/lib.c
@@ -2222,17 +2222,18 @@ static s32 e1000_mng_enable_host_if(struct e1000_hw *hw)
2222} 2222}
2223 2223
2224/** 2224/**
2225 * e1000e_check_mng_mode - check management mode 2225 * e1000e_check_mng_mode_generic - check management mode
2226 * @hw: pointer to the HW structure 2226 * @hw: pointer to the HW structure
2227 * 2227 *
2228 * Reads the firmware semaphore register and returns true (>0) if 2228 * Reads the firmware semaphore register and returns true (>0) if
2229 * manageability is enabled, else false (0). 2229 * manageability is enabled, else false (0).
2230 **/ 2230 **/
2231bool e1000e_check_mng_mode(struct e1000_hw *hw) 2231bool e1000e_check_mng_mode_generic(struct e1000_hw *hw)
2232{ 2232{
2233 u32 fwsm = er32(FWSM); 2233 u32 fwsm = er32(FWSM);
2234 2234
2235 return (fwsm & E1000_FWSM_MODE_MASK) == hw->mac.ops.mng_mode_enab; 2235 return (fwsm & E1000_FWSM_MODE_MASK) ==
2236 (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
2236} 2237}
2237 2238
2238/** 2239/**
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index d266510c8a94..0925204cd2d8 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -55,9 +55,11 @@ static const struct e1000_info *e1000_info_tbl[] = {
55 [board_82571] = &e1000_82571_info, 55 [board_82571] = &e1000_82571_info,
56 [board_82572] = &e1000_82572_info, 56 [board_82572] = &e1000_82572_info,
57 [board_82573] = &e1000_82573_info, 57 [board_82573] = &e1000_82573_info,
58 [board_82574] = &e1000_82574_info,
58 [board_80003es2lan] = &e1000_es2_info, 59 [board_80003es2lan] = &e1000_es2_info,
59 [board_ich8lan] = &e1000_ich8_info, 60 [board_ich8lan] = &e1000_ich8_info,
60 [board_ich9lan] = &e1000_ich9_info, 61 [board_ich9lan] = &e1000_ich9_info,
62 [board_ich10lan] = &e1000_ich10_info,
61}; 63};
62 64
63#ifdef DEBUG 65#ifdef DEBUG
@@ -1179,8 +1181,8 @@ static irqreturn_t e1000_intr(int irq, void *data)
1179 struct net_device *netdev = data; 1181 struct net_device *netdev = data;
1180 struct e1000_adapter *adapter = netdev_priv(netdev); 1182 struct e1000_adapter *adapter = netdev_priv(netdev);
1181 struct e1000_hw *hw = &adapter->hw; 1183 struct e1000_hw *hw = &adapter->hw;
1182
1183 u32 rctl, icr = er32(ICR); 1184 u32 rctl, icr = er32(ICR);
1185
1184 if (!icr) 1186 if (!icr)
1185 return IRQ_NONE; /* Not our interrupt */ 1187 return IRQ_NONE; /* Not our interrupt */
1186 1188
@@ -1236,6 +1238,263 @@ static irqreturn_t e1000_intr(int irq, void *data)
1236 return IRQ_HANDLED; 1238 return IRQ_HANDLED;
1237} 1239}
1238 1240
1241static irqreturn_t e1000_msix_other(int irq, void *data)
1242{
1243 struct net_device *netdev = data;
1244 struct e1000_adapter *adapter = netdev_priv(netdev);
1245 struct e1000_hw *hw = &adapter->hw;
1246 u32 icr = er32(ICR);
1247
1248 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1249 ew32(IMS, E1000_IMS_OTHER);
1250 return IRQ_NONE;
1251 }
1252
1253 if (icr & adapter->eiac_mask)
1254 ew32(ICS, (icr & adapter->eiac_mask));
1255
1256 if (icr & E1000_ICR_OTHER) {
1257 if (!(icr & E1000_ICR_LSC))
1258 goto no_link_interrupt;
1259 hw->mac.get_link_status = 1;
1260 /* guard against interrupt when we're going down */
1261 if (!test_bit(__E1000_DOWN, &adapter->state))
1262 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1263 }
1264
1265no_link_interrupt:
1266 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1267
1268 return IRQ_HANDLED;
1269}
1270
1271
1272static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1273{
1274 struct net_device *netdev = data;
1275 struct e1000_adapter *adapter = netdev_priv(netdev);
1276 struct e1000_hw *hw = &adapter->hw;
1277 struct e1000_ring *tx_ring = adapter->tx_ring;
1278
1279
1280 adapter->total_tx_bytes = 0;
1281 adapter->total_tx_packets = 0;
1282
1283 if (!e1000_clean_tx_irq(adapter))
1284 /* Ring was not completely cleaned, so fire another interrupt */
1285 ew32(ICS, tx_ring->ims_val);
1286
1287 return IRQ_HANDLED;
1288}
1289
1290static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1291{
1292 struct net_device *netdev = data;
1293 struct e1000_adapter *adapter = netdev_priv(netdev);
1294
1295 /* Write the ITR value calculated at the end of the
1296 * previous interrupt.
1297 */
1298 if (adapter->rx_ring->set_itr) {
1299 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1300 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1301 adapter->rx_ring->set_itr = 0;
1302 }
1303
1304 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1305 adapter->total_rx_bytes = 0;
1306 adapter->total_rx_packets = 0;
1307 __netif_rx_schedule(netdev, &adapter->napi);
1308 }
1309 return IRQ_HANDLED;
1310}
1311
1312/**
1313 * e1000_configure_msix - Configure MSI-X hardware
1314 *
1315 * e1000_configure_msix sets up the hardware to properly
1316 * generate MSI-X interrupts.
1317 **/
1318static void e1000_configure_msix(struct e1000_adapter *adapter)
1319{
1320 struct e1000_hw *hw = &adapter->hw;
1321 struct e1000_ring *rx_ring = adapter->rx_ring;
1322 struct e1000_ring *tx_ring = adapter->tx_ring;
1323 int vector = 0;
1324 u32 ctrl_ext, ivar = 0;
1325
1326 adapter->eiac_mask = 0;
1327
1328 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1329 if (hw->mac.type == e1000_82574) {
1330 u32 rfctl = er32(RFCTL);
1331 rfctl |= E1000_RFCTL_ACK_DIS;
1332 ew32(RFCTL, rfctl);
1333 }
1334
1335#define E1000_IVAR_INT_ALLOC_VALID 0x8
1336 /* Configure Rx vector */
1337 rx_ring->ims_val = E1000_IMS_RXQ0;
1338 adapter->eiac_mask |= rx_ring->ims_val;
1339 if (rx_ring->itr_val)
1340 writel(1000000000 / (rx_ring->itr_val * 256),
1341 hw->hw_addr + rx_ring->itr_register);
1342 else
1343 writel(1, hw->hw_addr + rx_ring->itr_register);
1344 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1345
1346 /* Configure Tx vector */
1347 tx_ring->ims_val = E1000_IMS_TXQ0;
1348 vector++;
1349 if (tx_ring->itr_val)
1350 writel(1000000000 / (tx_ring->itr_val * 256),
1351 hw->hw_addr + tx_ring->itr_register);
1352 else
1353 writel(1, hw->hw_addr + tx_ring->itr_register);
1354 adapter->eiac_mask |= tx_ring->ims_val;
1355 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1356
1357 /* set vector for Other Causes, e.g. link changes */
1358 vector++;
1359 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1360 if (rx_ring->itr_val)
1361 writel(1000000000 / (rx_ring->itr_val * 256),
1362 hw->hw_addr + E1000_EITR_82574(vector));
1363 else
1364 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1365
1366 /* Cause Tx interrupts on every write back */
1367 ivar |= (1 << 31);
1368
1369 ew32(IVAR, ivar);
1370
1371 /* enable MSI-X PBA support */
1372 ctrl_ext = er32(CTRL_EXT);
1373 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1374
1375 /* Auto-Mask Other interrupts upon ICR read */
1376#define E1000_EIAC_MASK_82574 0x01F00000
1377 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1378 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1379 ew32(CTRL_EXT, ctrl_ext);
1380 e1e_flush();
1381}
1382
1383void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1384{
1385 if (adapter->msix_entries) {
1386 pci_disable_msix(adapter->pdev);
1387 kfree(adapter->msix_entries);
1388 adapter->msix_entries = NULL;
1389 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1390 pci_disable_msi(adapter->pdev);
1391 adapter->flags &= ~FLAG_MSI_ENABLED;
1392 }
1393
1394 return;
1395}
1396
1397/**
1398 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1399 *
1400 * Attempt to configure interrupts using the best available
1401 * capabilities of the hardware and kernel.
1402 **/
1403void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1404{
1405 int err;
1406 int numvecs, i;
1407
1408
1409 switch (adapter->int_mode) {
1410 case E1000E_INT_MODE_MSIX:
1411 if (adapter->flags & FLAG_HAS_MSIX) {
1412 numvecs = 3; /* RxQ0, TxQ0 and other */
1413 adapter->msix_entries = kcalloc(numvecs,
1414 sizeof(struct msix_entry),
1415 GFP_KERNEL);
1416 if (adapter->msix_entries) {
1417 for (i = 0; i < numvecs; i++)
1418 adapter->msix_entries[i].entry = i;
1419
1420 err = pci_enable_msix(adapter->pdev,
1421 adapter->msix_entries,
1422 numvecs);
1423 if (err == 0)
1424 return;
1425 }
1426 /* MSI-X failed, so fall through and try MSI */
1427 e_err("Failed to initialize MSI-X interrupts. "
1428 "Falling back to MSI interrupts.\n");
1429 e1000e_reset_interrupt_capability(adapter);
1430 }
1431 adapter->int_mode = E1000E_INT_MODE_MSI;
1432 /* Fall through */
1433 case E1000E_INT_MODE_MSI:
1434 if (!pci_enable_msi(adapter->pdev)) {
1435 adapter->flags |= FLAG_MSI_ENABLED;
1436 } else {
1437 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1438 e_err("Failed to initialize MSI interrupts. Falling "
1439 "back to legacy interrupts.\n");
1440 }
1441 /* Fall through */
1442 case E1000E_INT_MODE_LEGACY:
1443 /* Don't do anything; this is the system default */
1444 break;
1445 }
1446
1447 return;
1448}
1449
1450/**
1451 * e1000_request_msix - Initialize MSI-X interrupts
1452 *
1453 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1454 * kernel.
1455 **/
1456static int e1000_request_msix(struct e1000_adapter *adapter)
1457{
1458 struct net_device *netdev = adapter->netdev;
1459 int err = 0, vector = 0;
1460
1461 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1462 sprintf(adapter->rx_ring->name, "%s-rx0", netdev->name);
1463 else
1464 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1465 err = request_irq(adapter->msix_entries[vector].vector,
1466 &e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1467 netdev);
1468 if (err)
1469 goto out;
1470 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1471 adapter->rx_ring->itr_val = adapter->itr;
1472 vector++;
1473
1474 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1475 sprintf(adapter->tx_ring->name, "%s-tx0", netdev->name);
1476 else
1477 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1478 err = request_irq(adapter->msix_entries[vector].vector,
1479 &e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1480 netdev);
1481 if (err)
1482 goto out;
1483 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1484 adapter->tx_ring->itr_val = adapter->itr;
1485 vector++;
1486
1487 err = request_irq(adapter->msix_entries[vector].vector,
1488 &e1000_msix_other, 0, netdev->name, netdev);
1489 if (err)
1490 goto out;
1491
1492 e1000_configure_msix(adapter);
1493 return 0;
1494out:
1495 return err;
1496}
1497
1239/** 1498/**
1240 * e1000_request_irq - initialize interrupts 1499 * e1000_request_irq - initialize interrupts
1241 * 1500 *
@@ -1245,28 +1504,32 @@ static irqreturn_t e1000_intr(int irq, void *data)
1245static int e1000_request_irq(struct e1000_adapter *adapter) 1504static int e1000_request_irq(struct e1000_adapter *adapter)
1246{ 1505{
1247 struct net_device *netdev = adapter->netdev; 1506 struct net_device *netdev = adapter->netdev;
1248 int irq_flags = IRQF_SHARED;
1249 int err; 1507 int err;
1250 1508
1251 if (!(adapter->flags & FLAG_MSI_TEST_FAILED)) { 1509 if (adapter->msix_entries) {
1252 err = pci_enable_msi(adapter->pdev); 1510 err = e1000_request_msix(adapter);
1253 if (!err) { 1511 if (!err)
1254 adapter->flags |= FLAG_MSI_ENABLED; 1512 return err;
1255 irq_flags = 0; 1513 /* fall back to MSI */
1256 } 1514 e1000e_reset_interrupt_capability(adapter);
1515 adapter->int_mode = E1000E_INT_MODE_MSI;
1516 e1000e_set_interrupt_capability(adapter);
1517 }
1518 if (adapter->flags & FLAG_MSI_ENABLED) {
1519 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, 0,
1520 netdev->name, netdev);
1521 if (!err)
1522 return err;
1523
1524 /* fall back to legacy interrupt */
1525 e1000e_reset_interrupt_capability(adapter);
1526 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1257 } 1527 }
1258 1528
1259 err = request_irq(adapter->pdev->irq, 1529 err = request_irq(adapter->pdev->irq, &e1000_intr, IRQF_SHARED,
1260 ((adapter->flags & FLAG_MSI_ENABLED) ? 1530 netdev->name, netdev);
1261 &e1000_intr_msi : &e1000_intr), 1531 if (err)
1262 irq_flags, netdev->name, netdev);
1263 if (err) {
1264 if (adapter->flags & FLAG_MSI_ENABLED) {
1265 pci_disable_msi(adapter->pdev);
1266 adapter->flags &= ~FLAG_MSI_ENABLED;
1267 }
1268 e_err("Unable to allocate interrupt, Error: %d\n", err); 1532 e_err("Unable to allocate interrupt, Error: %d\n", err);
1269 }
1270 1533
1271 return err; 1534 return err;
1272} 1535}
@@ -1275,11 +1538,21 @@ static void e1000_free_irq(struct e1000_adapter *adapter)
1275{ 1538{
1276 struct net_device *netdev = adapter->netdev; 1539 struct net_device *netdev = adapter->netdev;
1277 1540
1278 free_irq(adapter->pdev->irq, netdev); 1541 if (adapter->msix_entries) {
1279 if (adapter->flags & FLAG_MSI_ENABLED) { 1542 int vector = 0;
1280 pci_disable_msi(adapter->pdev); 1543
1281 adapter->flags &= ~FLAG_MSI_ENABLED; 1544 free_irq(adapter->msix_entries[vector].vector, netdev);
1545 vector++;
1546
1547 free_irq(adapter->msix_entries[vector].vector, netdev);
1548 vector++;
1549
1550 /* Other Causes interrupt vector */
1551 free_irq(adapter->msix_entries[vector].vector, netdev);
1552 return;
1282 } 1553 }
1554
1555 free_irq(adapter->pdev->irq, netdev);
1283} 1556}
1284 1557
1285/** 1558/**
@@ -1290,6 +1563,8 @@ static void e1000_irq_disable(struct e1000_adapter *adapter)
1290 struct e1000_hw *hw = &adapter->hw; 1563 struct e1000_hw *hw = &adapter->hw;
1291 1564
1292 ew32(IMC, ~0); 1565 ew32(IMC, ~0);
1566 if (adapter->msix_entries)
1567 ew32(EIAC_82574, 0);
1293 e1e_flush(); 1568 e1e_flush();
1294 synchronize_irq(adapter->pdev->irq); 1569 synchronize_irq(adapter->pdev->irq);
1295} 1570}
@@ -1301,7 +1576,12 @@ static void e1000_irq_enable(struct e1000_adapter *adapter)
1301{ 1576{
1302 struct e1000_hw *hw = &adapter->hw; 1577 struct e1000_hw *hw = &adapter->hw;
1303 1578
1304 ew32(IMS, IMS_ENABLE_MASK); 1579 if (adapter->msix_entries) {
1580 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1581 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1582 } else {
1583 ew32(IMS, IMS_ENABLE_MASK);
1584 }
1305 e1e_flush(); 1585 e1e_flush();
1306} 1586}
1307 1587
@@ -1551,9 +1831,8 @@ void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1551 * traffic pattern. Constants in this function were computed 1831 * traffic pattern. Constants in this function were computed
1552 * based on theoretical maximum wire speed and thresholds were set based 1832 * based on theoretical maximum wire speed and thresholds were set based
1553 * on testing data as well as attempting to minimize response time 1833 * on testing data as well as attempting to minimize response time
1554 * while increasing bulk throughput. 1834 * while increasing bulk throughput. This functionality is controlled
1555 * this functionality is controlled by the InterruptThrottleRate module 1835 * by the InterruptThrottleRate module parameter.
1556 * parameter (see e1000_param.c)
1557 **/ 1836 **/
1558static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 1837static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1559 u16 itr_setting, int packets, 1838 u16 itr_setting, int packets,
@@ -1661,11 +1940,37 @@ set_itr_now:
1661 min(adapter->itr + (new_itr >> 2), new_itr) : 1940 min(adapter->itr + (new_itr >> 2), new_itr) :
1662 new_itr; 1941 new_itr;
1663 adapter->itr = new_itr; 1942 adapter->itr = new_itr;
1664 ew32(ITR, 1000000000 / (new_itr * 256)); 1943 adapter->rx_ring->itr_val = new_itr;
1944 if (adapter->msix_entries)
1945 adapter->rx_ring->set_itr = 1;
1946 else
1947 ew32(ITR, 1000000000 / (new_itr * 256));
1665 } 1948 }
1666} 1949}
1667 1950
1668/** 1951/**
1952 * e1000_alloc_queues - Allocate memory for all rings
1953 * @adapter: board private structure to initialize
1954 **/
1955static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1956{
1957 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1958 if (!adapter->tx_ring)
1959 goto err;
1960
1961 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1962 if (!adapter->rx_ring)
1963 goto err;
1964
1965 return 0;
1966err:
1967 e_err("Unable to allocate memory for queues\n");
1968 kfree(adapter->rx_ring);
1969 kfree(adapter->tx_ring);
1970 return -ENOMEM;
1971}
1972
1973/**
1669 * e1000_clean - NAPI Rx polling callback 1974 * e1000_clean - NAPI Rx polling callback
1670 * @napi: struct associated with this polling callback 1975 * @napi: struct associated with this polling callback
1671 * @budget: amount of packets driver is allowed to process this poll 1976 * @budget: amount of packets driver is allowed to process this poll
@@ -1673,12 +1978,17 @@ set_itr_now:
1673static int e1000_clean(struct napi_struct *napi, int budget) 1978static int e1000_clean(struct napi_struct *napi, int budget)
1674{ 1979{
1675 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); 1980 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
1981 struct e1000_hw *hw = &adapter->hw;
1676 struct net_device *poll_dev = adapter->netdev; 1982 struct net_device *poll_dev = adapter->netdev;
1677 int tx_cleaned = 0, work_done = 0; 1983 int tx_cleaned = 0, work_done = 0;
1678 1984
1679 /* Must NOT use netdev_priv macro here. */ 1985 /* Must NOT use netdev_priv macro here. */
1680 adapter = poll_dev->priv; 1986 adapter = poll_dev->priv;
1681 1987
1988 if (adapter->msix_entries &&
1989 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
1990 goto clean_rx;
1991
1682 /* 1992 /*
1683 * e1000_clean is called per-cpu. This lock protects 1993 * e1000_clean is called per-cpu. This lock protects
1684 * tx_ring from being cleaned by multiple cpus 1994 * tx_ring from being cleaned by multiple cpus
@@ -1690,6 +2000,7 @@ static int e1000_clean(struct napi_struct *napi, int budget)
1690 spin_unlock(&adapter->tx_queue_lock); 2000 spin_unlock(&adapter->tx_queue_lock);
1691 } 2001 }
1692 2002
2003clean_rx:
1693 adapter->clean_rx(adapter, &work_done, budget); 2004 adapter->clean_rx(adapter, &work_done, budget);
1694 2005
1695 if (tx_cleaned) 2006 if (tx_cleaned)
@@ -1700,7 +2011,10 @@ static int e1000_clean(struct napi_struct *napi, int budget)
1700 if (adapter->itr_setting & 3) 2011 if (adapter->itr_setting & 3)
1701 e1000_set_itr(adapter); 2012 e1000_set_itr(adapter);
1702 netif_rx_complete(poll_dev, napi); 2013 netif_rx_complete(poll_dev, napi);
1703 e1000_irq_enable(adapter); 2014 if (adapter->msix_entries)
2015 ew32(IMS, adapter->rx_ring->ims_val);
2016 else
2017 e1000_irq_enable(adapter);
1704 } 2018 }
1705 2019
1706 return work_done; 2020 return work_done;
@@ -2496,6 +2810,8 @@ int e1000e_up(struct e1000_adapter *adapter)
2496 clear_bit(__E1000_DOWN, &adapter->state); 2810 clear_bit(__E1000_DOWN, &adapter->state);
2497 2811
2498 napi_enable(&adapter->napi); 2812 napi_enable(&adapter->napi);
2813 if (adapter->msix_entries)
2814 e1000_configure_msix(adapter);
2499 e1000_irq_enable(adapter); 2815 e1000_irq_enable(adapter);
2500 2816
2501 /* fire a link change interrupt to start the watchdog */ 2817 /* fire a link change interrupt to start the watchdog */
@@ -2579,13 +2895,10 @@ static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2579 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 2895 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2580 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 2896 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2581 2897
2582 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 2898 e1000e_set_interrupt_capability(adapter);
2583 if (!adapter->tx_ring)
2584 goto err;
2585 2899
2586 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 2900 if (e1000_alloc_queues(adapter))
2587 if (!adapter->rx_ring) 2901 return -ENOMEM;
2588 goto err;
2589 2902
2590 spin_lock_init(&adapter->tx_queue_lock); 2903 spin_lock_init(&adapter->tx_queue_lock);
2591 2904
@@ -2596,12 +2909,6 @@ static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2596 2909
2597 set_bit(__E1000_DOWN, &adapter->state); 2910 set_bit(__E1000_DOWN, &adapter->state);
2598 return 0; 2911 return 0;
2599
2600err:
2601 e_err("Unable to allocate memory for queues\n");
2602 kfree(adapter->rx_ring);
2603 kfree(adapter->tx_ring);
2604 return -ENOMEM;
2605} 2912}
2606 2913
2607/** 2914/**
@@ -2643,6 +2950,7 @@ static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2643 2950
2644 /* free the real vector and request a test handler */ 2951 /* free the real vector and request a test handler */
2645 e1000_free_irq(adapter); 2952 e1000_free_irq(adapter);
2953 e1000e_reset_interrupt_capability(adapter);
2646 2954
2647 /* Assume that the test fails, if it succeeds then the test 2955 /* Assume that the test fails, if it succeeds then the test
2648 * MSI irq handler will unset this flag */ 2956 * MSI irq handler will unset this flag */
@@ -2673,6 +2981,7 @@ static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2673 rmb(); 2981 rmb();
2674 2982
2675 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 2983 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
2984 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2676 err = -EIO; 2985 err = -EIO;
2677 e_info("MSI interrupt test failed!\n"); 2986 e_info("MSI interrupt test failed!\n");
2678 } 2987 }
@@ -2686,7 +2995,7 @@ static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2686 /* okay so the test worked, restore settings */ 2995 /* okay so the test worked, restore settings */
2687 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name); 2996 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name);
2688msi_test_failed: 2997msi_test_failed:
2689 /* restore the original vector, even if it failed */ 2998 e1000e_set_interrupt_capability(adapter);
2690 e1000_request_irq(adapter); 2999 e1000_request_irq(adapter);
2691 return err; 3000 return err;
2692} 3001}
@@ -2796,7 +3105,7 @@ static int e1000_open(struct net_device *netdev)
2796 * ignore e1000e MSI messages, which means we need to test our MSI 3105 * ignore e1000e MSI messages, which means we need to test our MSI
2797 * interrupt now 3106 * interrupt now
2798 */ 3107 */
2799 { 3108 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
2800 err = e1000_test_msi(adapter); 3109 err = e1000_test_msi(adapter);
2801 if (err) { 3110 if (err) {
2802 e_err("Interrupt allocation failed\n"); 3111 e_err("Interrupt allocation failed\n");
@@ -2988,7 +3297,8 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
2988 3297
2989 adapter->stats.algnerrc += er32(ALGNERRC); 3298 adapter->stats.algnerrc += er32(ALGNERRC);
2990 adapter->stats.rxerrc += er32(RXERRC); 3299 adapter->stats.rxerrc += er32(RXERRC);
2991 adapter->stats.tncrs += er32(TNCRS); 3300 if (hw->mac.type != e1000_82574)
3301 adapter->stats.tncrs += er32(TNCRS);
2992 adapter->stats.cexterr += er32(CEXTERR); 3302 adapter->stats.cexterr += er32(CEXTERR);
2993 adapter->stats.tsctc += er32(TSCTC); 3303 adapter->stats.tsctc += er32(TSCTC);
2994 adapter->stats.tsctfc += er32(TSCTFC); 3304 adapter->stats.tsctfc += er32(TSCTFC);
@@ -3201,6 +3511,27 @@ static void e1000_watchdog_task(struct work_struct *work)
3201 &adapter->link_duplex); 3511 &adapter->link_duplex);
3202 e1000_print_link_info(adapter); 3512 e1000_print_link_info(adapter);
3203 /* 3513 /*
3514 * On supported PHYs, check for duplex mismatch only
3515 * if link has autonegotiated at 10/100 half
3516 */
3517 if ((hw->phy.type == e1000_phy_igp_3 ||
3518 hw->phy.type == e1000_phy_bm) &&
3519 (hw->mac.autoneg == true) &&
3520 (adapter->link_speed == SPEED_10 ||
3521 adapter->link_speed == SPEED_100) &&
3522 (adapter->link_duplex == HALF_DUPLEX)) {
3523 u16 autoneg_exp;
3524
3525 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3526
3527 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3528 e_info("Autonegotiated half duplex but"
3529 " link partner cannot autoneg. "
3530 " Try forcing full duplex if "
3531 "link gets many collisions.\n");
3532 }
3533
3534 /*
3204 * tweak tx_queue_len according to speed/duplex 3535 * tweak tx_queue_len according to speed/duplex
3205 * and adjust the timeout factor 3536 * and adjust the timeout factor
3206 */ 3537 */
@@ -3315,7 +3646,10 @@ link_up:
3315 } 3646 }
3316 3647
3317 /* Cause software interrupt to ensure Rx ring is cleaned */ 3648 /* Cause software interrupt to ensure Rx ring is cleaned */
3318 ew32(ICS, E1000_ICS_RXDMT0); 3649 if (adapter->msix_entries)
3650 ew32(ICS, adapter->rx_ring->ims_val);
3651 else
3652 ew32(ICS, E1000_ICS_RXDMT0);
3319 3653
3320 /* Force detection of hung controller every watchdog period */ 3654 /* Force detection of hung controller every watchdog period */
3321 adapter->detect_tx_hung = 1; 3655 adapter->detect_tx_hung = 1;
@@ -4032,6 +4366,7 @@ static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4032 e1000e_down(adapter); 4366 e1000e_down(adapter);
4033 e1000_free_irq(adapter); 4367 e1000_free_irq(adapter);
4034 } 4368 }
4369 e1000e_reset_interrupt_capability(adapter);
4035 4370
4036 retval = pci_save_state(pdev); 4371 retval = pci_save_state(pdev);
4037 if (retval) 4372 if (retval)
@@ -4158,6 +4493,7 @@ static int e1000_resume(struct pci_dev *pdev)
4158 pci_enable_wake(pdev, PCI_D3hot, 0); 4493 pci_enable_wake(pdev, PCI_D3hot, 0);
4159 pci_enable_wake(pdev, PCI_D3cold, 0); 4494 pci_enable_wake(pdev, PCI_D3cold, 0);
4160 4495
4496 e1000e_set_interrupt_capability(adapter);
4161 if (netif_running(netdev)) { 4497 if (netif_running(netdev)) {
4162 err = e1000_request_irq(adapter); 4498 err = e1000_request_irq(adapter);
4163 if (err) 4499 if (err)
@@ -4467,6 +4803,8 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
4467 4803
4468 adapter->bd_number = cards_found++; 4804 adapter->bd_number = cards_found++;
4469 4805
4806 e1000e_check_options(adapter);
4807
4470 /* setup adapter struct */ 4808 /* setup adapter struct */
4471 err = e1000_sw_init(adapter); 4809 err = e1000_sw_init(adapter);
4472 if (err) 4810 if (err)
@@ -4573,8 +4911,6 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
4573 INIT_WORK(&adapter->reset_task, e1000_reset_task); 4911 INIT_WORK(&adapter->reset_task, e1000_reset_task);
4574 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 4912 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
4575 4913
4576 e1000e_check_options(adapter);
4577
4578 /* Initialize link parameters. User can change them with ethtool */ 4914 /* Initialize link parameters. User can change them with ethtool */
4579 adapter->hw.mac.autoneg = 1; 4915 adapter->hw.mac.autoneg = 1;
4580 adapter->fc_autoneg = 1; 4916 adapter->fc_autoneg = 1;
@@ -4704,6 +5040,7 @@ static void __devexit e1000_remove(struct pci_dev *pdev)
4704 if (!e1000_check_reset_block(&adapter->hw)) 5040 if (!e1000_check_reset_block(&adapter->hw))
4705 e1000_phy_hw_reset(&adapter->hw); 5041 e1000_phy_hw_reset(&adapter->hw);
4706 5042
5043 e1000e_reset_interrupt_capability(adapter);
4707 kfree(adapter->tx_ring); 5044 kfree(adapter->tx_ring);
4708 kfree(adapter->rx_ring); 5045 kfree(adapter->rx_ring);
4709 5046
@@ -4745,6 +5082,8 @@ static struct pci_device_id e1000_pci_tbl[] = {
4745 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 5082 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
4746 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 5083 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
4747 5084
5085 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
5086
4748 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 5087 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
4749 board_80003es2lan }, 5088 board_80003es2lan },
4750 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 5089 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
@@ -4767,6 +5106,7 @@ static struct pci_device_id e1000_pci_tbl[] = {
4767 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 5106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
4768 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 5107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
4769 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 5108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
5109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
4770 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 5110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
4771 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 5111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
4772 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 5112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
@@ -4775,6 +5115,9 @@ static struct pci_device_id e1000_pci_tbl[] = {
4775 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 5115 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
4776 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 5116 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
4777 5117
5118 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5119 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5120
4778 { } /* terminate list */ 5121 { } /* terminate list */
4779}; 5122};
4780MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 5123MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
diff --git a/drivers/net/e1000e/param.c b/drivers/net/e1000e/param.c
index ed912e023a72..f46db6cda487 100644
--- a/drivers/net/e1000e/param.c
+++ b/drivers/net/e1000e/param.c
@@ -114,6 +114,15 @@ E1000_PARAM(InterruptThrottleRate, "Interrupt Throttling Rate");
114#define DEFAULT_ITR 3 114#define DEFAULT_ITR 3
115#define MAX_ITR 100000 115#define MAX_ITR 100000
116#define MIN_ITR 100 116#define MIN_ITR 100
117/* IntMode (Interrupt Mode)
118 *
119 * Valid Range: 0 - 2
120 *
121 * Default Value: 2 (MSI-X)
122 */
123E1000_PARAM(IntMode, "Interrupt Mode");
124#define MAX_INTMODE 2
125#define MIN_INTMODE 0
117 126
118/* 127/*
119 * Enable Smart Power Down of the PHY 128 * Enable Smart Power Down of the PHY
@@ -352,6 +361,24 @@ void __devinit e1000e_check_options(struct e1000_adapter *adapter)
352 adapter->itr = 20000; 361 adapter->itr = 20000;
353 } 362 }
354 } 363 }
364 { /* Interrupt Mode */
365 struct e1000_option opt = {
366 .type = range_option,
367 .name = "Interrupt Mode",
368 .err = "defaulting to 2 (MSI-X)",
369 .def = E1000E_INT_MODE_MSIX,
370 .arg = { .r = { .min = MIN_INTMODE,
371 .max = MAX_INTMODE } }
372 };
373
374 if (num_IntMode > bd) {
375 unsigned int int_mode = IntMode[bd];
376 e1000_validate_option(&int_mode, &opt, adapter);
377 adapter->int_mode = int_mode;
378 } else {
379 adapter->int_mode = opt.def;
380 }
381 }
355 { /* Smart Power Down */ 382 { /* Smart Power Down */
356 const struct e1000_option opt = { 383 const struct e1000_option opt = {
357 .type = enable_option, 384 .type = enable_option,
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c
index b133dcf0e950..6cd333ae61d0 100644
--- a/drivers/net/e1000e/phy.c
+++ b/drivers/net/e1000e/phy.c
@@ -476,7 +476,9 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw)
476 if (ret_val) 476 if (ret_val)
477 return ret_val; 477 return ret_val;
478 478
479 if ((phy->type == e1000_phy_m88) && (phy->revision < 4)) { 479 if ((phy->type == e1000_phy_m88) &&
480 (phy->revision < E1000_REVISION_4) &&
481 (phy->id != BME1000_E_PHY_ID_R2)) {
480 /* 482 /*
481 * Force TX_CLK in the Extended PHY Specific Control Register 483 * Force TX_CLK in the Extended PHY Specific Control Register
482 * to 25MHz clock. 484 * to 25MHz clock.
@@ -504,6 +506,18 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw)
504 return ret_val; 506 return ret_val;
505 } 507 }
506 508
509 if ((phy->type == e1000_phy_bm) && (phy->id == BME1000_E_PHY_ID_R2)) {
510 /* Set PHY page 0, register 29 to 0x0003 */
511 ret_val = e1e_wphy(hw, 29, 0x0003);
512 if (ret_val)
513 return ret_val;
514
515 /* Set PHY page 0, register 30 to 0x0000 */
516 ret_val = e1e_wphy(hw, 30, 0x0000);
517 if (ret_val)
518 return ret_val;
519 }
520
507 /* Commit the changes. */ 521 /* Commit the changes. */
508 ret_val = e1000e_commit_phy(hw); 522 ret_val = e1000e_commit_phy(hw);
509 if (ret_val) 523 if (ret_val)
@@ -1720,6 +1734,91 @@ s32 e1000e_get_cfg_done(struct e1000_hw *hw)
1720 return 0; 1734 return 0;
1721} 1735}
1722 1736
1737/**
1738 * e1000e_phy_init_script_igp3 - Inits the IGP3 PHY
1739 * @hw: pointer to the HW structure
1740 *
1741 * Initializes a Intel Gigabit PHY3 when an EEPROM is not present.
1742 **/
1743s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw)
1744{
1745 hw_dbg(hw, "Running IGP 3 PHY init script\n");
1746
1747 /* PHY init IGP 3 */
1748 /* Enable rise/fall, 10-mode work in class-A */
1749 e1e_wphy(hw, 0x2F5B, 0x9018);
1750 /* Remove all caps from Replica path filter */
1751 e1e_wphy(hw, 0x2F52, 0x0000);
1752 /* Bias trimming for ADC, AFE and Driver (Default) */
1753 e1e_wphy(hw, 0x2FB1, 0x8B24);
1754 /* Increase Hybrid poly bias */
1755 e1e_wphy(hw, 0x2FB2, 0xF8F0);
1756 /* Add 4% to Tx amplitude in Gig mode */
1757 e1e_wphy(hw, 0x2010, 0x10B0);
1758 /* Disable trimming (TTT) */
1759 e1e_wphy(hw, 0x2011, 0x0000);
1760 /* Poly DC correction to 94.6% + 2% for all channels */
1761 e1e_wphy(hw, 0x20DD, 0x249A);
1762 /* ABS DC correction to 95.9% */
1763 e1e_wphy(hw, 0x20DE, 0x00D3);
1764 /* BG temp curve trim */
1765 e1e_wphy(hw, 0x28B4, 0x04CE);
1766 /* Increasing ADC OPAMP stage 1 currents to max */
1767 e1e_wphy(hw, 0x2F70, 0x29E4);
1768 /* Force 1000 ( required for enabling PHY regs configuration) */
1769 e1e_wphy(hw, 0x0000, 0x0140);
1770 /* Set upd_freq to 6 */
1771 e1e_wphy(hw, 0x1F30, 0x1606);
1772 /* Disable NPDFE */
1773 e1e_wphy(hw, 0x1F31, 0xB814);
1774 /* Disable adaptive fixed FFE (Default) */
1775 e1e_wphy(hw, 0x1F35, 0x002A);
1776 /* Enable FFE hysteresis */
1777 e1e_wphy(hw, 0x1F3E, 0x0067);
1778 /* Fixed FFE for short cable lengths */
1779 e1e_wphy(hw, 0x1F54, 0x0065);
1780 /* Fixed FFE for medium cable lengths */
1781 e1e_wphy(hw, 0x1F55, 0x002A);
1782 /* Fixed FFE for long cable lengths */
1783 e1e_wphy(hw, 0x1F56, 0x002A);
1784 /* Enable Adaptive Clip Threshold */
1785 e1e_wphy(hw, 0x1F72, 0x3FB0);
1786 /* AHT reset limit to 1 */
1787 e1e_wphy(hw, 0x1F76, 0xC0FF);
1788 /* Set AHT master delay to 127 msec */
1789 e1e_wphy(hw, 0x1F77, 0x1DEC);
1790 /* Set scan bits for AHT */
1791 e1e_wphy(hw, 0x1F78, 0xF9EF);
1792 /* Set AHT Preset bits */
1793 e1e_wphy(hw, 0x1F79, 0x0210);
1794 /* Change integ_factor of channel A to 3 */
1795 e1e_wphy(hw, 0x1895, 0x0003);
1796 /* Change prop_factor of channels BCD to 8 */
1797 e1e_wphy(hw, 0x1796, 0x0008);
1798 /* Change cg_icount + enable integbp for channels BCD */
1799 e1e_wphy(hw, 0x1798, 0xD008);
1800 /*
1801 * Change cg_icount + enable integbp + change prop_factor_master
1802 * to 8 for channel A
1803 */
1804 e1e_wphy(hw, 0x1898, 0xD918);
1805 /* Disable AHT in Slave mode on channel A */
1806 e1e_wphy(hw, 0x187A, 0x0800);
1807 /*
1808 * Enable LPLU and disable AN to 1000 in non-D0a states,
1809 * Enable SPD+B2B
1810 */
1811 e1e_wphy(hw, 0x0019, 0x008D);
1812 /* Enable restart AN on an1000_dis change */
1813 e1e_wphy(hw, 0x001B, 0x2080);
1814 /* Enable wh_fifo read clock in 10/100 modes */
1815 e1e_wphy(hw, 0x0014, 0x0045);
1816 /* Restart AN, Speed selection is 1000 */
1817 e1e_wphy(hw, 0x0000, 0x1340);
1818
1819 return 0;
1820}
1821
1723/* Internal function pointers */ 1822/* Internal function pointers */
1724 1823
1725/** 1824/**
@@ -1969,6 +2068,99 @@ out:
1969} 2068}
1970 2069
1971/** 2070/**
2071 * e1000e_read_phy_reg_bm2 - Read BM PHY register
2072 * @hw: pointer to the HW structure
2073 * @offset: register offset to be read
2074 * @data: pointer to the read data
2075 *
2076 * Acquires semaphore, if necessary, then reads the PHY register at offset
2077 * and storing the retrieved information in data. Release any acquired
2078 * semaphores before exiting.
2079 **/
2080s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)
2081{
2082 s32 ret_val;
2083 u16 page = (u16)(offset >> IGP_PAGE_SHIFT);
2084
2085 /* Page 800 works differently than the rest so it has its own func */
2086 if (page == BM_WUC_PAGE) {
2087 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
2088 true);
2089 return ret_val;
2090 }
2091
2092 ret_val = hw->phy.ops.acquire_phy(hw);
2093 if (ret_val)
2094 return ret_val;
2095
2096 hw->phy.addr = 1;
2097
2098 if (offset > MAX_PHY_MULTI_PAGE_REG) {
2099
2100 /* Page is shifted left, PHY expects (page x 32) */
2101 ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
2102 page);
2103
2104 if (ret_val) {
2105 hw->phy.ops.release_phy(hw);
2106 return ret_val;
2107 }
2108 }
2109
2110 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2111 data);
2112 hw->phy.ops.release_phy(hw);
2113
2114 return ret_val;
2115}
2116
2117/**
2118 * e1000e_write_phy_reg_bm2 - Write BM PHY register
2119 * @hw: pointer to the HW structure
2120 * @offset: register offset to write to
2121 * @data: data to write at register offset
2122 *
2123 * Acquires semaphore, if necessary, then writes the data to PHY register
2124 * at the offset. Release any acquired semaphores before exiting.
2125 **/
2126s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)
2127{
2128 s32 ret_val;
2129 u16 page = (u16)(offset >> IGP_PAGE_SHIFT);
2130
2131 /* Page 800 works differently than the rest so it has its own func */
2132 if (page == BM_WUC_PAGE) {
2133 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
2134 false);
2135 return ret_val;
2136 }
2137
2138 ret_val = hw->phy.ops.acquire_phy(hw);
2139 if (ret_val)
2140 return ret_val;
2141
2142 hw->phy.addr = 1;
2143
2144 if (offset > MAX_PHY_MULTI_PAGE_REG) {
2145 /* Page is shifted left, PHY expects (page x 32) */
2146 ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
2147 page);
2148
2149 if (ret_val) {
2150 hw->phy.ops.release_phy(hw);
2151 return ret_val;
2152 }
2153 }
2154
2155 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2156 data);
2157
2158 hw->phy.ops.release_phy(hw);
2159
2160 return ret_val;
2161}
2162
2163/**
1972 * e1000_access_phy_wakeup_reg_bm - Read BM PHY wakeup register 2164 * e1000_access_phy_wakeup_reg_bm - Read BM PHY wakeup register
1973 * @hw: pointer to the HW structure 2165 * @hw: pointer to the HW structure
1974 * @offset: register offset to be read or written 2166 * @offset: register offset to be read or written
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-27 12:17:00 -0500