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-rw-r--r--drivers/net/e1000e/82571.c153
-rw-r--r--drivers/net/e1000e/defines.h15
-rw-r--r--drivers/net/e1000e/e1000.h31
-rw-r--r--drivers/net/e1000e/es2lan.c2
-rw-r--r--drivers/net/e1000e/ethtool.c60
-rw-r--r--drivers/net/e1000e/hw.h15
-rw-r--r--drivers/net/e1000e/ich8lan.c175
-rw-r--r--drivers/net/e1000e/lib.c7
-rw-r--r--drivers/net/e1000e/netdev.c437
-rw-r--r--drivers/net/e1000e/param.c27
-rw-r--r--drivers/net/e1000e/phy.c194
11 files changed, 1025 insertions, 91 deletions
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index 462351ca2c81..b2c910c52df9 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -38,6 +38,7 @@
38 * 82573V Gigabit Ethernet Controller (Copper) 38 * 82573V Gigabit Ethernet Controller (Copper)
39 * 82573E Gigabit Ethernet Controller (Copper) 39 * 82573E Gigabit Ethernet Controller (Copper)
40 * 82573L Gigabit Ethernet Controller 40 * 82573L Gigabit Ethernet Controller
41 * 82574L Gigabit Network Connection
41 */ 42 */
42 43
43#include <linux/netdevice.h> 44#include <linux/netdevice.h>
@@ -54,6 +55,8 @@
54 55
55#define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000 56#define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
56 57
58#define E1000_NVM_INIT_CTRL2_MNGM 0x6000 /* Manageability Operation Mode mask */
59
57static s32 e1000_get_phy_id_82571(struct e1000_hw *hw); 60static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);
58static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw); 61static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);
59static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw); 62static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);
@@ -63,6 +66,8 @@ static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);
63static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw); 66static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);
64static s32 e1000_setup_link_82571(struct e1000_hw *hw); 67static s32 e1000_setup_link_82571(struct e1000_hw *hw);
65static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw); 68static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);
69static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);
70static s32 e1000_led_on_82574(struct e1000_hw *hw);
66 71
67/** 72/**
68 * e1000_init_phy_params_82571 - Init PHY func ptrs. 73 * e1000_init_phy_params_82571 - Init PHY func ptrs.
@@ -92,6 +97,9 @@ static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
92 case e1000_82573: 97 case e1000_82573:
93 phy->type = e1000_phy_m88; 98 phy->type = e1000_phy_m88;
94 break; 99 break;
100 case e1000_82574:
101 phy->type = e1000_phy_bm;
102 break;
95 default: 103 default:
96 return -E1000_ERR_PHY; 104 return -E1000_ERR_PHY;
97 break; 105 break;
@@ -111,6 +119,10 @@ static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
111 if (phy->id != M88E1111_I_PHY_ID) 119 if (phy->id != M88E1111_I_PHY_ID)
112 return -E1000_ERR_PHY; 120 return -E1000_ERR_PHY;
113 break; 121 break;
122 case e1000_82574:
123 if (phy->id != BME1000_E_PHY_ID_R2)
124 return -E1000_ERR_PHY;
125 break;
114 default: 126 default:
115 return -E1000_ERR_PHY; 127 return -E1000_ERR_PHY;
116 break; 128 break;
@@ -150,6 +162,7 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)
150 162
151 switch (hw->mac.type) { 163 switch (hw->mac.type) {
152 case e1000_82573: 164 case e1000_82573:
165 case e1000_82574:
153 if (((eecd >> 15) & 0x3) == 0x3) { 166 if (((eecd >> 15) & 0x3) == 0x3) {
154 nvm->type = e1000_nvm_flash_hw; 167 nvm->type = e1000_nvm_flash_hw;
155 nvm->word_size = 2048; 168 nvm->word_size = 2048;
@@ -245,6 +258,17 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
245 break; 258 break;
246 } 259 }
247 260
261 switch (hw->mac.type) {
262 case e1000_82574:
263 func->check_mng_mode = e1000_check_mng_mode_82574;
264 func->led_on = e1000_led_on_82574;
265 break;
266 default:
267 func->check_mng_mode = e1000e_check_mng_mode_generic;
268 func->led_on = e1000e_led_on_generic;
269 break;
270 }
271
248 return 0; 272 return 0;
249} 273}
250 274
@@ -330,6 +354,8 @@ static s32 e1000_get_variants_82571(struct e1000_adapter *adapter)
330static s32 e1000_get_phy_id_82571(struct e1000_hw *hw) 354static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)
331{ 355{
332 struct e1000_phy_info *phy = &hw->phy; 356 struct e1000_phy_info *phy = &hw->phy;
357 s32 ret_val;
358 u16 phy_id = 0;
333 359
334 switch (hw->mac.type) { 360 switch (hw->mac.type) {
335 case e1000_82571: 361 case e1000_82571:
@@ -345,6 +371,20 @@ static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)
345 case e1000_82573: 371 case e1000_82573:
346 return e1000e_get_phy_id(hw); 372 return e1000e_get_phy_id(hw);
347 break; 373 break;
374 case e1000_82574:
375 ret_val = e1e_rphy(hw, PHY_ID1, &phy_id);
376 if (ret_val)
377 return ret_val;
378
379 phy->id = (u32)(phy_id << 16);
380 udelay(20);
381 ret_val = e1e_rphy(hw, PHY_ID2, &phy_id);
382 if (ret_val)
383 return ret_val;
384
385 phy->id |= (u32)(phy_id);
386 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
387 break;
348 default: 388 default:
349 return -E1000_ERR_PHY; 389 return -E1000_ERR_PHY;
350 break; 390 break;
@@ -421,7 +461,7 @@ static s32 e1000_acquire_nvm_82571(struct e1000_hw *hw)
421 if (ret_val) 461 if (ret_val)
422 return ret_val; 462 return ret_val;
423 463
424 if (hw->mac.type != e1000_82573) 464 if (hw->mac.type != e1000_82573 && hw->mac.type != e1000_82574)
425 ret_val = e1000e_acquire_nvm(hw); 465 ret_val = e1000e_acquire_nvm(hw);
426 466
427 if (ret_val) 467 if (ret_val)
@@ -461,6 +501,7 @@ static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words,
461 501
462 switch (hw->mac.type) { 502 switch (hw->mac.type) {
463 case e1000_82573: 503 case e1000_82573:
504 case e1000_82574:
464 ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data); 505 ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data);
465 break; 506 break;
466 case e1000_82571: 507 case e1000_82571:
@@ -735,7 +776,7 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
735 * Must acquire the MDIO ownership before MAC reset. 776 * Must acquire the MDIO ownership before MAC reset.
736 * Ownership defaults to firmware after a reset. 777 * Ownership defaults to firmware after a reset.
737 */ 778 */
738 if (hw->mac.type == e1000_82573) { 779 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) {
739 extcnf_ctrl = er32(EXTCNF_CTRL); 780 extcnf_ctrl = er32(EXTCNF_CTRL);
740 extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP; 781 extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
741 782
@@ -776,7 +817,7 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
776 * Need to wait for Phy configuration completion before accessing 817 * Need to wait for Phy configuration completion before accessing
777 * NVM and Phy. 818 * NVM and Phy.
778 */ 819 */
779 if (hw->mac.type == e1000_82573) 820 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574)
780 msleep(25); 821 msleep(25);
781 822
782 /* Clear any pending interrupt events. */ 823 /* Clear any pending interrupt events. */
@@ -843,7 +884,7 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw)
843 ew32(TXDCTL(0), reg_data); 884 ew32(TXDCTL(0), reg_data);
844 885
845 /* ...for both queues. */ 886 /* ...for both queues. */
846 if (mac->type != e1000_82573) { 887 if (mac->type != e1000_82573 && mac->type != e1000_82574) {
847 reg_data = er32(TXDCTL(1)); 888 reg_data = er32(TXDCTL(1));
848 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | 889 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
849 E1000_TXDCTL_FULL_TX_DESC_WB | 890 E1000_TXDCTL_FULL_TX_DESC_WB |
@@ -918,19 +959,28 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
918 } 959 }
919 960
920 /* Device Control */ 961 /* Device Control */
921 if (hw->mac.type == e1000_82573) { 962 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) {
922 reg = er32(CTRL); 963 reg = er32(CTRL);
923 reg &= ~(1 << 29); 964 reg &= ~(1 << 29);
924 ew32(CTRL, reg); 965 ew32(CTRL, reg);
925 } 966 }
926 967
927 /* Extended Device Control */ 968 /* Extended Device Control */
928 if (hw->mac.type == e1000_82573) { 969 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) {
929 reg = er32(CTRL_EXT); 970 reg = er32(CTRL_EXT);
930 reg &= ~(1 << 23); 971 reg &= ~(1 << 23);
931 reg |= (1 << 22); 972 reg |= (1 << 22);
932 ew32(CTRL_EXT, reg); 973 ew32(CTRL_EXT, reg);
933 } 974 }
975
976 /* PCI-Ex Control Register */
977 if (hw->mac.type == e1000_82574) {
978 reg = er32(GCR);
979 reg |= (1 << 22);
980 ew32(GCR, reg);
981 }
982
983 return;
934} 984}
935 985
936/** 986/**
@@ -947,7 +997,7 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
947 u32 vfta_offset = 0; 997 u32 vfta_offset = 0;
948 u32 vfta_bit_in_reg = 0; 998 u32 vfta_bit_in_reg = 0;
949 999
950 if (hw->mac.type == e1000_82573) { 1000 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) {
951 if (hw->mng_cookie.vlan_id != 0) { 1001 if (hw->mng_cookie.vlan_id != 0) {
952 /* 1002 /*
953 * The VFTA is a 4096b bit-field, each identifying 1003 * The VFTA is a 4096b bit-field, each identifying
@@ -976,6 +1026,48 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
976} 1026}
977 1027
978/** 1028/**
1029 * e1000_check_mng_mode_82574 - Check manageability is enabled
1030 * @hw: pointer to the HW structure
1031 *
1032 * Reads the NVM Initialization Control Word 2 and returns true
1033 * (>0) if any manageability is enabled, else false (0).
1034 **/
1035static bool e1000_check_mng_mode_82574(struct e1000_hw *hw)
1036{
1037 u16 data;
1038
1039 e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
1040 return (data & E1000_NVM_INIT_CTRL2_MNGM) != 0;
1041}
1042
1043/**
1044 * e1000_led_on_82574 - Turn LED on
1045 * @hw: pointer to the HW structure
1046 *
1047 * Turn LED on.
1048 **/
1049static s32 e1000_led_on_82574(struct e1000_hw *hw)
1050{
1051 u32 ctrl;
1052 u32 i;
1053
1054 ctrl = hw->mac.ledctl_mode2;
1055 if (!(E1000_STATUS_LU & er32(STATUS))) {
1056 /*
1057 * If no link, then turn LED on by setting the invert bit
1058 * for each LED that's "on" (0x0E) in ledctl_mode2.
1059 */
1060 for (i = 0; i < 4; i++)
1061 if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) ==
1062 E1000_LEDCTL_MODE_LED_ON)
1063 ctrl |= (E1000_LEDCTL_LED0_IVRT << (i * 8));
1064 }
1065 ew32(LEDCTL, ctrl);
1066
1067 return 0;
1068}
1069
1070/**
979 * e1000_update_mc_addr_list_82571 - Update Multicast addresses 1071 * e1000_update_mc_addr_list_82571 - Update Multicast addresses
980 * @hw: pointer to the HW structure 1072 * @hw: pointer to the HW structure
981 * @mc_addr_list: array of multicast addresses to program 1073 * @mc_addr_list: array of multicast addresses to program
@@ -1018,7 +1110,8 @@ static s32 e1000_setup_link_82571(struct e1000_hw *hw)
1018 * the default flow control setting, so we explicitly 1110 * the default flow control setting, so we explicitly
1019 * set it to full. 1111 * set it to full.
1020 */ 1112 */
1021 if (hw->mac.type == e1000_82573) 1113 if ((hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) &&
1114 hw->fc.type == e1000_fc_default)
1022 hw->fc.type = e1000_fc_full; 1115 hw->fc.type = e1000_fc_full;
1023 1116
1024 return e1000e_setup_link(hw); 1117 return e1000e_setup_link(hw);
@@ -1045,6 +1138,7 @@ static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw)
1045 1138
1046 switch (hw->phy.type) { 1139 switch (hw->phy.type) {
1047 case e1000_phy_m88: 1140 case e1000_phy_m88:
1141 case e1000_phy_bm:
1048 ret_val = e1000e_copper_link_setup_m88(hw); 1142 ret_val = e1000e_copper_link_setup_m88(hw);
1049 break; 1143 break;
1050 case e1000_phy_igp_2: 1144 case e1000_phy_igp_2:
@@ -1114,11 +1208,10 @@ static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data)
1114 return ret_val; 1208 return ret_val;
1115 } 1209 }
1116 1210
1117 if (hw->mac.type == e1000_82573 && 1211 if ((hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) &&
1118 *data == ID_LED_RESERVED_F746) 1212 *data == ID_LED_RESERVED_F746)
1119 *data = ID_LED_DEFAULT_82573; 1213 *data = ID_LED_DEFAULT_82573;
1120 else if (*data == ID_LED_RESERVED_0000 || 1214 else if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF)
1121 *data == ID_LED_RESERVED_FFFF)
1122 *data = ID_LED_DEFAULT; 1215 *data = ID_LED_DEFAULT;
1123 1216
1124 return 0; 1217 return 0;
@@ -1265,13 +1358,13 @@ static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw)
1265} 1358}
1266 1359
1267static struct e1000_mac_operations e82571_mac_ops = { 1360static struct e1000_mac_operations e82571_mac_ops = {
1268 .mng_mode_enab = E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT, 1361 /* .check_mng_mode: mac type dependent */
1269 /* .check_for_link: media type dependent */ 1362 /* .check_for_link: media type dependent */
1270 .cleanup_led = e1000e_cleanup_led_generic, 1363 .cleanup_led = e1000e_cleanup_led_generic,
1271 .clear_hw_cntrs = e1000_clear_hw_cntrs_82571, 1364 .clear_hw_cntrs = e1000_clear_hw_cntrs_82571,
1272 .get_bus_info = e1000e_get_bus_info_pcie, 1365 .get_bus_info = e1000e_get_bus_info_pcie,
1273 /* .get_link_up_info: media type dependent */ 1366 /* .get_link_up_info: media type dependent */
1274 .led_on = e1000e_led_on_generic, 1367 /* .led_on: mac type dependent */
1275 .led_off = e1000e_led_off_generic, 1368 .led_off = e1000e_led_off_generic,
1276 .update_mc_addr_list = e1000_update_mc_addr_list_82571, 1369 .update_mc_addr_list = e1000_update_mc_addr_list_82571,
1277 .reset_hw = e1000_reset_hw_82571, 1370 .reset_hw = e1000_reset_hw_82571,
@@ -1312,6 +1405,22 @@ static struct e1000_phy_operations e82_phy_ops_m88 = {
1312 .write_phy_reg = e1000e_write_phy_reg_m88, 1405 .write_phy_reg = e1000e_write_phy_reg_m88,
1313}; 1406};
1314 1407
1408static struct e1000_phy_operations e82_phy_ops_bm = {
1409 .acquire_phy = e1000_get_hw_semaphore_82571,
1410 .check_reset_block = e1000e_check_reset_block_generic,
1411 .commit_phy = e1000e_phy_sw_reset,
1412 .force_speed_duplex = e1000e_phy_force_speed_duplex_m88,
1413 .get_cfg_done = e1000e_get_cfg_done,
1414 .get_cable_length = e1000e_get_cable_length_m88,
1415 .get_phy_info = e1000e_get_phy_info_m88,
1416 .read_phy_reg = e1000e_read_phy_reg_bm2,
1417 .release_phy = e1000_put_hw_semaphore_82571,
1418 .reset_phy = e1000e_phy_hw_reset_generic,
1419 .set_d0_lplu_state = e1000_set_d0_lplu_state_82571,
1420 .set_d3_lplu_state = e1000e_set_d3_lplu_state,
1421 .write_phy_reg = e1000e_write_phy_reg_bm2,
1422};
1423
1315static struct e1000_nvm_operations e82571_nvm_ops = { 1424static struct e1000_nvm_operations e82571_nvm_ops = {
1316 .acquire_nvm = e1000_acquire_nvm_82571, 1425 .acquire_nvm = e1000_acquire_nvm_82571,
1317 .read_nvm = e1000e_read_nvm_eerd, 1426 .read_nvm = e1000e_read_nvm_eerd,
@@ -1375,3 +1484,21 @@ struct e1000_info e1000_82573_info = {
1375 .nvm_ops = &e82571_nvm_ops, 1484 .nvm_ops = &e82571_nvm_ops,
1376}; 1485};
1377 1486
1487struct e1000_info e1000_82574_info = {
1488 .mac = e1000_82574,
1489 .flags = FLAG_HAS_HW_VLAN_FILTER
1490 | FLAG_HAS_MSIX
1491 | FLAG_HAS_JUMBO_FRAMES
1492 | FLAG_HAS_WOL
1493 | FLAG_APME_IN_CTRL3
1494 | FLAG_RX_CSUM_ENABLED
1495 | FLAG_HAS_SMART_POWER_DOWN
1496 | FLAG_HAS_AMT
1497 | FLAG_HAS_CTRLEXT_ON_LOAD,
1498 .pba = 20,
1499 .get_variants = e1000_get_variants_82571,
1500 .mac_ops = &e82571_mac_ops,
1501 .phy_ops = &e82_phy_ops_bm,
1502 .nvm_ops = &e82571_nvm_ops,
1503};
1504
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h
index 14b0e6cd3b8d..48f79ecb82a0 100644
--- a/drivers/net/e1000e/defines.h
+++ b/drivers/net/e1000e/defines.h
@@ -71,9 +71,11 @@
71#define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ 71#define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */
72#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 72#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
73#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000 73#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000
74#define E1000_CTRL_EXT_EIAME 0x01000000
74#define E1000_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */ 75#define E1000_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */
75#define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */ 76#define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */
76#define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */ 77#define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */
78#define E1000_CTRL_EXT_PBA_CLR 0x80000000 /* PBA Clear */
77 79
78/* Receive Descriptor bit definitions */ 80/* Receive Descriptor bit definitions */
79#define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */ 81#define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */
@@ -299,6 +301,7 @@
299#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */ 301#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */
300 302
301/* Header split receive */ 303/* Header split receive */
304#define E1000_RFCTL_ACK_DIS 0x00001000
302#define E1000_RFCTL_EXTEN 0x00008000 305#define E1000_RFCTL_EXTEN 0x00008000
303#define E1000_RFCTL_IPV6_EX_DIS 0x00010000 306#define E1000_RFCTL_IPV6_EX_DIS 0x00010000
304#define E1000_RFCTL_NEW_IPV6_EXT_DIS 0x00020000 307#define E1000_RFCTL_NEW_IPV6_EXT_DIS 0x00020000
@@ -363,6 +366,11 @@
363#define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */ 366#define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */
364#define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */ 367#define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */
365#define E1000_ICR_INT_ASSERTED 0x80000000 /* If this bit asserted, the driver should claim the interrupt */ 368#define E1000_ICR_INT_ASSERTED 0x80000000 /* If this bit asserted, the driver should claim the interrupt */
369#define E1000_ICR_RXQ0 0x00100000 /* Rx Queue 0 Interrupt */
370#define E1000_ICR_RXQ1 0x00200000 /* Rx Queue 1 Interrupt */
371#define E1000_ICR_TXQ0 0x00400000 /* Tx Queue 0 Interrupt */
372#define E1000_ICR_TXQ1 0x00800000 /* Tx Queue 1 Interrupt */
373#define E1000_ICR_OTHER 0x01000000 /* Other Interrupts */
366 374
367/* 375/*
368 * This defines the bits that are set in the Interrupt Mask 376 * This defines the bits that are set in the Interrupt Mask
@@ -386,6 +394,11 @@
386#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* Rx sequence error */ 394#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* Rx sequence error */
387#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* Rx desc min. threshold */ 395#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* Rx desc min. threshold */
388#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* Rx timer intr */ 396#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* Rx timer intr */
397#define E1000_IMS_RXQ0 E1000_ICR_RXQ0 /* Rx Queue 0 Interrupt */
398#define E1000_IMS_RXQ1 E1000_ICR_RXQ1 /* Rx Queue 1 Interrupt */
399#define E1000_IMS_TXQ0 E1000_ICR_TXQ0 /* Tx Queue 0 Interrupt */
400#define E1000_IMS_TXQ1 E1000_ICR_TXQ1 /* Tx Queue 1 Interrupt */
401#define E1000_IMS_OTHER E1000_ICR_OTHER /* Other Interrupts */
389 402
390/* Interrupt Cause Set */ 403/* Interrupt Cause Set */
391#define E1000_ICS_LSC E1000_ICR_LSC /* Link Status Change */ 404#define E1000_ICS_LSC E1000_ICR_LSC /* Link Status Change */
@@ -505,6 +518,7 @@
505#define NWAY_LPAR_ASM_DIR 0x0800 /* LP Asymmetric Pause Direction bit */ 518#define NWAY_LPAR_ASM_DIR 0x0800 /* LP Asymmetric Pause Direction bit */
506 519
507/* Autoneg Expansion Register */ 520/* Autoneg Expansion Register */
521#define NWAY_ER_LP_NWAY_CAPS 0x0001 /* LP has Auto Neg Capability */
508 522
509/* 1000BASE-T Control Register */ 523/* 1000BASE-T Control Register */
510#define CR_1000T_HD_CAPS 0x0100 /* Advertise 1000T HD capability */ 524#define CR_1000T_HD_CAPS 0x0100 /* Advertise 1000T HD capability */
@@ -540,6 +554,7 @@
540#define E1000_EECD_DO 0x00000008 /* NVM Data Out */ 554#define E1000_EECD_DO 0x00000008 /* NVM Data Out */
541#define E1000_EECD_REQ 0x00000040 /* NVM Access Request */ 555#define E1000_EECD_REQ 0x00000040 /* NVM Access Request */
542#define E1000_EECD_GNT 0x00000080 /* NVM Access Grant */ 556#define E1000_EECD_GNT 0x00000080 /* NVM Access Grant */
557#define E1000_EECD_PRES 0x00000100 /* NVM Present */
543#define E1000_EECD_SIZE 0x00000200 /* NVM Size (0=64 word 1=256 word) */ 558#define E1000_EECD_SIZE 0x00000200 /* NVM Size (0=64 word 1=256 word) */
544/* NVM Addressing bits based on type (0-small, 1-large) */ 559/* NVM Addressing bits based on type (0-small, 1-large) */
545#define E1000_EECD_ADDR_BITS 0x00000400 560#define E1000_EECD_ADDR_BITS 0x00000400
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index 5ea6b60fa377..c55de1c027af 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -62,6 +62,11 @@ struct e1000_info;
62 e_printk(KERN_NOTICE, adapter, format, ## arg) 62 e_printk(KERN_NOTICE, adapter, format, ## arg)
63 63
64 64
65/* Interrupt modes, as used by the IntMode paramter */
66#define E1000E_INT_MODE_LEGACY 0
67#define E1000E_INT_MODE_MSI 1
68#define E1000E_INT_MODE_MSIX 2
69
65/* Tx/Rx descriptor defines */ 70/* Tx/Rx descriptor defines */
66#define E1000_DEFAULT_TXD 256 71#define E1000_DEFAULT_TXD 256
67#define E1000_MAX_TXD 4096 72#define E1000_MAX_TXD 4096
@@ -95,9 +100,11 @@ enum e1000_boards {
95 board_82571, 100 board_82571,
96 board_82572, 101 board_82572,
97 board_82573, 102 board_82573,
103 board_82574,
98 board_80003es2lan, 104 board_80003es2lan,
99 board_ich8lan, 105 board_ich8lan,
100 board_ich9lan, 106 board_ich9lan,
107 board_ich10lan,
101}; 108};
102 109
103struct e1000_queue_stats { 110struct e1000_queue_stats {
@@ -146,6 +153,12 @@ struct e1000_ring {
146 /* array of buffer information structs */ 153 /* array of buffer information structs */
147 struct e1000_buffer *buffer_info; 154 struct e1000_buffer *buffer_info;
148 155
156 char name[IFNAMSIZ + 5];
157 u32 ims_val;
158 u32 itr_val;
159 u16 itr_register;
160 int set_itr;
161
149 struct sk_buff *rx_skb_top; 162 struct sk_buff *rx_skb_top;
150 163
151 struct e1000_queue_stats stats; 164 struct e1000_queue_stats stats;
@@ -273,6 +286,9 @@ struct e1000_adapter {
273 u32 test_icr; 286 u32 test_icr;
274 287
275 u32 msg_enable; 288 u32 msg_enable;
289 struct msix_entry *msix_entries;
290 int int_mode;
291 u32 eiac_mask;
276 292
277 u32 eeprom_wol; 293 u32 eeprom_wol;
278 u32 wol; 294 u32 wol;
@@ -308,6 +324,7 @@ struct e1000_info {
308#define FLAG_HAS_JUMBO_FRAMES (1 << 7) 324#define FLAG_HAS_JUMBO_FRAMES (1 << 7)
309#define FLAG_READ_ONLY_NVM (1 << 8) 325#define FLAG_READ_ONLY_NVM (1 << 8)
310#define FLAG_IS_ICH (1 << 9) 326#define FLAG_IS_ICH (1 << 9)
327#define FLAG_HAS_MSIX (1 << 10)
311#define FLAG_HAS_SMART_POWER_DOWN (1 << 11) 328#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
312#define FLAG_IS_QUAD_PORT_A (1 << 12) 329#define FLAG_IS_QUAD_PORT_A (1 << 12)
313#define FLAG_IS_QUAD_PORT (1 << 13) 330#define FLAG_IS_QUAD_PORT (1 << 13)
@@ -366,6 +383,8 @@ extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
366extern void e1000e_free_rx_resources(struct e1000_adapter *adapter); 383extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
367extern void e1000e_free_tx_resources(struct e1000_adapter *adapter); 384extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
368extern void e1000e_update_stats(struct e1000_adapter *adapter); 385extern void e1000e_update_stats(struct e1000_adapter *adapter);
386extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
387extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
369 388
370extern unsigned int copybreak; 389extern unsigned int copybreak;
371 390
@@ -374,8 +393,10 @@ extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
374extern struct e1000_info e1000_82571_info; 393extern struct e1000_info e1000_82571_info;
375extern struct e1000_info e1000_82572_info; 394extern struct e1000_info e1000_82572_info;
376extern struct e1000_info e1000_82573_info; 395extern struct e1000_info e1000_82573_info;
396extern struct e1000_info e1000_82574_info;
377extern struct e1000_info e1000_ich8_info; 397extern struct e1000_info e1000_ich8_info;
378extern struct e1000_info e1000_ich9_info; 398extern struct e1000_info e1000_ich9_info;
399extern struct e1000_info e1000_ich10_info;
379extern struct e1000_info e1000_es2_info; 400extern struct e1000_info e1000_es2_info;
380 401
381extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num); 402extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
@@ -449,10 +470,13 @@ extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
449extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw); 470extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
450extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); 471extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
451extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); 472extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
473extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
452extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id); 474extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
453extern s32 e1000e_determine_phy_address(struct e1000_hw *hw); 475extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
454extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data); 476extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
455extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data); 477extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
478extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
479extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
456extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); 480extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
457extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); 481extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
458extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); 482extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
@@ -523,7 +547,12 @@ static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
523 return hw->phy.ops.get_phy_info(hw); 547 return hw->phy.ops.get_phy_info(hw);
524} 548}
525 549
526extern bool e1000e_check_mng_mode(struct e1000_hw *hw); 550static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
551{
552 return hw->mac.ops.check_mng_mode(hw);
553}
554
555extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
527extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw); 556extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
528extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length); 557extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
529 558
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c
index dc552d7d6fac..da9c09c248ed 100644
--- a/drivers/net/e1000e/es2lan.c
+++ b/drivers/net/e1000e/es2lan.c
@@ -1247,7 +1247,7 @@ static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw)
1247} 1247}
1248 1248
1249static struct e1000_mac_operations es2_mac_ops = { 1249static struct e1000_mac_operations es2_mac_ops = {
1250 .mng_mode_enab = E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT, 1250 .check_mng_mode = e1000e_check_mng_mode_generic,
1251 /* check_for_link dependent on media type */ 1251 /* check_for_link dependent on media type */
1252 .cleanup_led = e1000e_cleanup_led_generic, 1252 .cleanup_led = e1000e_cleanup_led_generic,
1253 .clear_hw_cntrs = e1000_clear_hw_cntrs_80003es2lan, 1253 .clear_hw_cntrs = e1000_clear_hw_cntrs_80003es2lan,
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c
index 33a3ff17b5d0..70c11c811a08 100644
--- a/drivers/net/e1000e/ethtool.c
+++ b/drivers/net/e1000e/ethtool.c
@@ -575,6 +575,7 @@ static int e1000_set_eeprom(struct net_device *netdev,
575 * and flush shadow RAM for 82573 controllers 575 * and flush shadow RAM for 82573 controllers
576 */ 576 */
577 if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG) || 577 if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG) ||
578 (hw->mac.type == e1000_82574) ||
578 (hw->mac.type == e1000_82573))) 579 (hw->mac.type == e1000_82573)))
579 e1000e_update_nvm_checksum(hw); 580 e1000e_update_nvm_checksum(hw);
580 581
@@ -786,8 +787,10 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
786 toggle = 0x7FFFF3FF; 787 toggle = 0x7FFFF3FF;
787 break; 788 break;
788 case e1000_82573: 789 case e1000_82573:
790 case e1000_82574:
789 case e1000_ich8lan: 791 case e1000_ich8lan:
790 case e1000_ich9lan: 792 case e1000_ich9lan:
793 case e1000_ich10lan:
791 toggle = 0x7FFFF033; 794 toggle = 0x7FFFF033;
792 break; 795 break;
793 default: 796 default:
@@ -840,7 +843,9 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
840 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF); 843 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
841 for (i = 0; i < mac->rar_entry_count; i++) 844 for (i = 0; i < mac->rar_entry_count; i++)
842 REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1), 845 REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1),
843 0x8003FFFF, 0xFFFFFFFF); 846 ((mac->type == e1000_ich10lan) ?
847 0x8007FFFF : 0x8003FFFF),
848 0xFFFFFFFF);
844 849
845 for (i = 0; i < mac->mta_reg_count; i++) 850 for (i = 0; i < mac->mta_reg_count; i++)
846 REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF); 851 REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);
@@ -891,10 +896,18 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
891 u32 shared_int = 1; 896 u32 shared_int = 1;
892 u32 irq = adapter->pdev->irq; 897 u32 irq = adapter->pdev->irq;
893 int i; 898 int i;
899 int ret_val = 0;
900 int int_mode = E1000E_INT_MODE_LEGACY;
894 901
895 *data = 0; 902 *data = 0;
896 903
897 /* NOTE: we don't test MSI interrupts here, yet */ 904 /* NOTE: we don't test MSI/MSI-X interrupts here, yet */
905 if (adapter->int_mode == E1000E_INT_MODE_MSIX) {
906 int_mode = adapter->int_mode;
907 e1000e_reset_interrupt_capability(adapter);
908 adapter->int_mode = E1000E_INT_MODE_LEGACY;
909 e1000e_set_interrupt_capability(adapter);
910 }
898 /* Hook up test interrupt handler just for this test */ 911 /* Hook up test interrupt handler just for this test */
899 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name, 912 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
900 netdev)) { 913 netdev)) {
@@ -902,7 +915,8 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
902 } else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED, 915 } else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
903 netdev->name, netdev)) { 916 netdev->name, netdev)) {
904 *data = 1; 917 *data = 1;
905 return -1; 918 ret_val = -1;
919 goto out;
906 } 920 }
907 e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared")); 921 e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared"));
908 922
@@ -912,12 +926,23 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
912 926
913 /* Test each interrupt */ 927 /* Test each interrupt */
914 for (i = 0; i < 10; i++) { 928 for (i = 0; i < 10; i++) {
915 if ((adapter->flags & FLAG_IS_ICH) && (i == 8))
916 continue;
917
918 /* Interrupt to test */ 929 /* Interrupt to test */
919 mask = 1 << i; 930 mask = 1 << i;
920 931
932 if (adapter->flags & FLAG_IS_ICH) {
933 switch (mask) {
934 case E1000_ICR_RXSEQ:
935 continue;
936 case 0x00000100:
937 if (adapter->hw.mac.type == e1000_ich8lan ||
938 adapter->hw.mac.type == e1000_ich9lan)
939 continue;
940 break;
941 default:
942 break;
943 }
944 }
945
921 if (!shared_int) { 946 if (!shared_int) {
922 /* 947 /*
923 * Disable the interrupt to be reported in 948 * Disable the interrupt to be reported in
@@ -981,7 +1006,14 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
981 /* Unhook test interrupt handler */ 1006 /* Unhook test interrupt handler */
982 free_irq(irq, netdev); 1007 free_irq(irq, netdev);
983 1008
984 return *data; 1009out:
1010 if (int_mode == E1000E_INT_MODE_MSIX) {
1011 e1000e_reset_interrupt_capability(adapter);
1012 adapter->int_mode = int_mode;
1013 e1000e_set_interrupt_capability(adapter);
1014 }
1015
1016 return ret_val;
985} 1017}
986 1018
987static void e1000_free_desc_rings(struct e1000_adapter *adapter) 1019static void e1000_free_desc_rings(struct e1000_adapter *adapter)
@@ -1762,11 +1794,13 @@ static void e1000_led_blink_callback(unsigned long data)
1762static int e1000_phys_id(struct net_device *netdev, u32 data) 1794static int e1000_phys_id(struct net_device *netdev, u32 data)
1763{ 1795{
1764 struct e1000_adapter *adapter = netdev_priv(netdev); 1796 struct e1000_adapter *adapter = netdev_priv(netdev);
1797 struct e1000_hw *hw = &adapter->hw;
1765 1798
1766 if (!data) 1799 if (!data)
1767 data = INT_MAX; 1800 data = INT_MAX;
1768 1801
1769 if (adapter->hw.phy.type == e1000_phy_ife) { 1802 if ((hw->phy.type == e1000_phy_ife) ||
1803 (hw->mac.type == e1000_82574)) {
1770 if (!adapter->blink_timer.function) { 1804 if (!adapter->blink_timer.function) {
1771 init_timer(&adapter->blink_timer); 1805 init_timer(&adapter->blink_timer);
1772 adapter->blink_timer.function = 1806 adapter->blink_timer.function =
@@ -1776,16 +1810,16 @@ static int e1000_phys_id(struct net_device *netdev, u32 data)
1776 mod_timer(&adapter->blink_timer, jiffies); 1810 mod_timer(&adapter->blink_timer, jiffies);
1777 msleep_interruptible(data * 1000); 1811 msleep_interruptible(data * 1000);
1778 del_timer_sync(&adapter->blink_timer); 1812 del_timer_sync(&adapter->blink_timer);
1779 e1e_wphy(&adapter->hw, 1813 if (hw->phy.type == e1000_phy_ife)
1780 IFE_PHY_SPECIAL_CONTROL_LED, 0); 1814 e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);
1781 } else { 1815 } else {
1782 e1000e_blink_led(&adapter->hw); 1816 e1000e_blink_led(hw);
1783 msleep_interruptible(data * 1000); 1817 msleep_interruptible(data * 1000);
1784 } 1818 }
1785 1819
1786 adapter->hw.mac.ops.led_off(&adapter->hw); 1820 hw->mac.ops.led_off(hw);
1787 clear_bit(E1000_LED_ON, &adapter->led_status); 1821 clear_bit(E1000_LED_ON, &adapter->led_status);
1788 adapter->hw.mac.ops.cleanup_led(&adapter->hw); 1822 hw->mac.ops.cleanup_led(hw);
1789 1823
1790 return 0; 1824 return 0;
1791} 1825}
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index 74f263acb172..f66ed37a7f76 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -65,7 +65,11 @@ enum e1e_registers {
65 E1000_ICS = 0x000C8, /* Interrupt Cause Set - WO */ 65 E1000_ICS = 0x000C8, /* Interrupt Cause Set - WO */
66 E1000_IMS = 0x000D0, /* Interrupt Mask Set - RW */ 66 E1000_IMS = 0x000D0, /* Interrupt Mask Set - RW */
67 E1000_IMC = 0x000D8, /* Interrupt Mask Clear - WO */ 67 E1000_IMC = 0x000D8, /* Interrupt Mask Clear - WO */
68 E1000_EIAC_82574 = 0x000DC, /* Ext. Interrupt Auto Clear - RW */
68 E1000_IAM = 0x000E0, /* Interrupt Acknowledge Auto Mask */ 69 E1000_IAM = 0x000E0, /* Interrupt Acknowledge Auto Mask */
70 E1000_IVAR = 0x000E4, /* Interrupt Vector Allocation - RW */
71 E1000_EITR_82574_BASE = 0x000E8, /* Interrupt Throttling - RW */
72#define E1000_EITR_82574(_n) (E1000_EITR_82574_BASE + (_n << 2))
69 E1000_RCTL = 0x00100, /* Rx Control - RW */ 73 E1000_RCTL = 0x00100, /* Rx Control - RW */
70 E1000_FCTTV = 0x00170, /* Flow Control Transmit Timer Value - RW */ 74 E1000_FCTTV = 0x00170, /* Flow Control Transmit Timer Value - RW */
71 E1000_TXCW = 0x00178, /* Tx Configuration Word - RW */ 75 E1000_TXCW = 0x00178, /* Tx Configuration Word - RW */
@@ -332,6 +336,7 @@ enum e1e_registers {
332#define E1000_DEV_ID_82573E 0x108B 336#define E1000_DEV_ID_82573E 0x108B
333#define E1000_DEV_ID_82573E_IAMT 0x108C 337#define E1000_DEV_ID_82573E_IAMT 0x108C
334#define E1000_DEV_ID_82573L 0x109A 338#define E1000_DEV_ID_82573L 0x109A
339#define E1000_DEV_ID_82574L 0x10D3
335 340
336#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT 0x1096 341#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT 0x1096
337#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT 0x1098 342#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT 0x1098
@@ -346,6 +351,7 @@ enum e1e_registers {
346#define E1000_DEV_ID_ICH8_IFE_G 0x10C5 351#define E1000_DEV_ID_ICH8_IFE_G 0x10C5
347#define E1000_DEV_ID_ICH8_IGP_M 0x104D 352#define E1000_DEV_ID_ICH8_IGP_M 0x104D
348#define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD 353#define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD
354#define E1000_DEV_ID_ICH9_BM 0x10E5
349#define E1000_DEV_ID_ICH9_IGP_M_AMT 0x10F5 355#define E1000_DEV_ID_ICH9_IGP_M_AMT 0x10F5
350#define E1000_DEV_ID_ICH9_IGP_M 0x10BF 356#define E1000_DEV_ID_ICH9_IGP_M 0x10BF
351#define E1000_DEV_ID_ICH9_IGP_M_V 0x10CB 357#define E1000_DEV_ID_ICH9_IGP_M_V 0x10CB
@@ -356,6 +362,10 @@ enum e1e_registers {
356#define E1000_DEV_ID_ICH10_R_BM_LM 0x10CC 362#define E1000_DEV_ID_ICH10_R_BM_LM 0x10CC
357#define E1000_DEV_ID_ICH10_R_BM_LF 0x10CD 363#define E1000_DEV_ID_ICH10_R_BM_LF 0x10CD
358#define E1000_DEV_ID_ICH10_R_BM_V 0x10CE 364#define E1000_DEV_ID_ICH10_R_BM_V 0x10CE
365#define E1000_DEV_ID_ICH10_D_BM_LM 0x10DE
366#define E1000_DEV_ID_ICH10_D_BM_LF 0x10DF
367
368#define E1000_REVISION_4 4
359 369
360#define E1000_FUNC_1 1 370#define E1000_FUNC_1 1
361 371
@@ -363,9 +373,11 @@ enum e1000_mac_type {
363 e1000_82571, 373 e1000_82571,
364 e1000_82572, 374 e1000_82572,
365 e1000_82573, 375 e1000_82573,
376 e1000_82574,
366 e1000_80003es2lan, 377 e1000_80003es2lan,
367 e1000_ich8lan, 378 e1000_ich8lan,
368 e1000_ich9lan, 379 e1000_ich9lan,
380 e1000_ich10lan,
369}; 381};
370 382
371enum e1000_media_type { 383enum e1000_media_type {
@@ -696,8 +708,7 @@ struct e1000_host_mng_command_info {
696 708
697/* Function pointers and static data for the MAC. */ 709/* Function pointers and static data for the MAC. */
698struct e1000_mac_operations { 710struct e1000_mac_operations {
699 u32 mng_mode_enab; 711 bool (*check_mng_mode)(struct e1000_hw *);
700
701 s32 (*check_for_link)(struct e1000_hw *); 712 s32 (*check_for_link)(struct e1000_hw *);
702 s32 (*cleanup_led)(struct e1000_hw *); 713 s32 (*cleanup_led)(struct e1000_hw *);
703 void (*clear_hw_cntrs)(struct e1000_hw *); 714 void (*clear_hw_cntrs)(struct e1000_hw *);
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index bcd2bc477af2..523b9716a543 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -43,7 +43,9 @@
43 * 82567LM-2 Gigabit Network Connection 43 * 82567LM-2 Gigabit Network Connection
44 * 82567LF-2 Gigabit Network Connection 44 * 82567LF-2 Gigabit Network Connection
45 * 82567V-2 Gigabit Network Connection 45 * 82567V-2 Gigabit Network Connection
46 * 82562GT-3 10/100 Network Connection 46 * 82567LF-3 Gigabit Network Connection
47 * 82567LM-3 Gigabit Network Connection
48 * 82567LM-4 Gigabit Network Connection
47 */ 49 */
48 50
49#include <linux/netdevice.h> 51#include <linux/netdevice.h>
@@ -171,12 +173,15 @@ static s32 e1000_check_polarity_ife_ich8lan(struct e1000_hw *hw);
171static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank); 173static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank);
172static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw, 174static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,
173 u32 offset, u8 byte); 175 u32 offset, u8 byte);
176static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
177 u8 *data);
174static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset, 178static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,
175 u16 *data); 179 u16 *data);
176static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, 180static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
177 u8 size, u16 *data); 181 u8 size, u16 *data);
178static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw); 182static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw);
179static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw); 183static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw);
184static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw);
180 185
181static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) 186static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)
182{ 187{
@@ -419,6 +424,8 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw)
419 424
420 if (!timeout) { 425 if (!timeout) {
421 hw_dbg(hw, "FW or HW has locked the resource for too long.\n"); 426 hw_dbg(hw, "FW or HW has locked the resource for too long.\n");
427 extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG;
428 ew32(EXTCNF_CTRL, extcnf_ctrl);
422 nvm_owner = -1; 429 nvm_owner = -1;
423 mutex_unlock(&nvm_mutex); 430 mutex_unlock(&nvm_mutex);
424 return -E1000_ERR_CONFIG; 431 return -E1000_ERR_CONFIG;
@@ -448,6 +455,22 @@ static void e1000_release_swflag_ich8lan(struct e1000_hw *hw)
448} 455}
449 456
450/** 457/**
458 * e1000_check_mng_mode_ich8lan - Checks management mode
459 * @hw: pointer to the HW structure
460 *
461 * This checks if the adapter has manageability enabled.
462 * This is a function pointer entry point only called by read/write
463 * routines for the PHY and NVM parts.
464 **/
465static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw)
466{
467 u32 fwsm = er32(FWSM);
468
469 return (fwsm & E1000_FWSM_MODE_MASK) ==
470 (E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
471}
472
473/**
451 * e1000_check_reset_block_ich8lan - Check if PHY reset is blocked 474 * e1000_check_reset_block_ich8lan - Check if PHY reset is blocked
452 * @hw: pointer to the HW structure 475 * @hw: pointer to the HW structure
453 * 476 *
@@ -928,6 +951,56 @@ static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
928} 951}
929 952
930/** 953/**
954 * e1000_valid_nvm_bank_detect_ich8lan - finds out the valid bank 0 or 1
955 * @hw: pointer to the HW structure
956 * @bank: pointer to the variable that returns the active bank
957 *
958 * Reads signature byte from the NVM using the flash access registers.
959 **/
960static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
961{
962 struct e1000_nvm_info *nvm = &hw->nvm;
963 /* flash bank size is in words */
964 u32 bank1_offset = nvm->flash_bank_size * sizeof(u16);
965 u32 act_offset = E1000_ICH_NVM_SIG_WORD * 2 + 1;
966 u8 bank_high_byte = 0;
967
968 if (hw->mac.type != e1000_ich10lan) {
969 if (er32(EECD) & E1000_EECD_SEC1VAL)
970 *bank = 1;
971 else
972 *bank = 0;
973 } else {
974 /*
975 * Make sure the signature for bank 0 is valid,
976 * if not check for bank1
977 */
978 e1000_read_flash_byte_ich8lan(hw, act_offset, &bank_high_byte);
979 if ((bank_high_byte & 0xC0) == 0x80) {
980 *bank = 0;
981 } else {
982 /*
983 * find if segment 1 is valid by verifying
984 * bit 15:14 = 10b in word 0x13
985 */
986 e1000_read_flash_byte_ich8lan(hw,
987 act_offset + bank1_offset,
988 &bank_high_byte);
989
990 /* bank1 has a valid signature equivalent to SEC1V */
991 if ((bank_high_byte & 0xC0) == 0x80) {
992 *bank = 1;
993 } else {
994 hw_dbg(hw, "ERROR: EEPROM not present\n");
995 return -E1000_ERR_NVM;
996 }
997 }
998 }
999
1000 return 0;
1001}
1002
1003/**
931 * e1000_read_nvm_ich8lan - Read word(s) from the NVM 1004 * e1000_read_nvm_ich8lan - Read word(s) from the NVM
932 * @hw: pointer to the HW structure 1005 * @hw: pointer to the HW structure
933 * @offset: The offset (in bytes) of the word(s) to read. 1006 * @offset: The offset (in bytes) of the word(s) to read.
@@ -943,6 +1016,7 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
943 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; 1016 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
944 u32 act_offset; 1017 u32 act_offset;
945 s32 ret_val; 1018 s32 ret_val;
1019 u32 bank = 0;
946 u16 i, word; 1020 u16 i, word;
947 1021
948 if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) || 1022 if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) ||
@@ -955,10 +1029,11 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
955 if (ret_val) 1029 if (ret_val)
956 return ret_val; 1030 return ret_val;
957 1031
958 /* Start with the bank offset, then add the relative offset. */ 1032 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);
959 act_offset = (er32(EECD) & E1000_EECD_SEC1VAL) 1033 if (ret_val)
960 ? nvm->flash_bank_size 1034 return ret_val;
961 : 0; 1035
1036 act_offset = (bank) ? nvm->flash_bank_size : 0;
962 act_offset += offset; 1037 act_offset += offset;
963 1038
964 for (i = 0; i < words; i++) { 1039 for (i = 0; i < words; i++) {
@@ -1106,6 +1181,29 @@ static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,
1106} 1181}
1107 1182
1108/** 1183/**
1184 * e1000_read_flash_byte_ich8lan - Read byte from flash
1185 * @hw: pointer to the HW structure
1186 * @offset: The offset of the byte to read.
1187 * @data: Pointer to a byte to store the value read.
1188 *
1189 * Reads a single byte from the NVM using the flash access registers.
1190 **/
1191static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
1192 u8 *data)
1193{
1194 s32 ret_val;
1195 u16 word = 0;
1196
1197 ret_val = e1000_read_flash_data_ich8lan(hw, offset, 1, &word);
1198 if (ret_val)
1199 return ret_val;
1200
1201 *data = (u8)word;
1202
1203 return 0;
1204}
1205
1206/**
1109 * e1000_read_flash_data_ich8lan - Read byte or word from NVM 1207 * e1000_read_flash_data_ich8lan - Read byte or word from NVM
1110 * @hw: pointer to the HW structure 1208 * @hw: pointer to the HW structure
1111 * @offset: The offset (in bytes) of the byte or word to read. 1209 * @offset: The offset (in bytes) of the byte or word to read.
@@ -1236,7 +1334,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1236{ 1334{
1237 struct e1000_nvm_info *nvm = &hw->nvm; 1335 struct e1000_nvm_info *nvm = &hw->nvm;
1238 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; 1336 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
1239 u32 i, act_offset, new_bank_offset, old_bank_offset; 1337 u32 i, act_offset, new_bank_offset, old_bank_offset, bank;
1240 s32 ret_val; 1338 s32 ret_val;
1241 u16 data; 1339 u16 data;
1242 1340
@@ -1256,7 +1354,11 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1256 * write to bank 0 etc. We also need to erase the segment that 1354 * write to bank 0 etc. We also need to erase the segment that
1257 * is going to be written 1355 * is going to be written
1258 */ 1356 */
1259 if (!(er32(EECD) & E1000_EECD_SEC1VAL)) { 1357 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);
1358 if (ret_val)
1359 return ret_val;
1360
1361 if (bank == 0) {
1260 new_bank_offset = nvm->flash_bank_size; 1362 new_bank_offset = nvm->flash_bank_size;
1261 old_bank_offset = 0; 1363 old_bank_offset = 0;
1262 e1000_erase_flash_bank_ich8lan(hw, 1); 1364 e1000_erase_flash_bank_ich8lan(hw, 1);
@@ -2267,13 +2369,14 @@ void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw)
2267 * 'LPLU Enabled' and 'Gig Disable' to force link speed negotiation 2369 * 'LPLU Enabled' and 'Gig Disable' to force link speed negotiation
2268 * to a lower speed. 2370 * to a lower speed.
2269 * 2371 *
2270 * Should only be called for ICH9 devices. 2372 * Should only be called for ICH9 and ICH10 devices.
2271 **/ 2373 **/
2272void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw) 2374void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw)
2273{ 2375{
2274 u32 phy_ctrl; 2376 u32 phy_ctrl;
2275 2377
2276 if (hw->mac.type == e1000_ich9lan) { 2378 if ((hw->mac.type == e1000_ich10lan) ||
2379 (hw->mac.type == e1000_ich9lan)) {
2277 phy_ctrl = er32(PHY_CTRL); 2380 phy_ctrl = er32(PHY_CTRL);
2278 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU | 2381 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU |
2279 E1000_PHY_CTRL_GBE_DISABLE; 2382 E1000_PHY_CTRL_GBE_DISABLE;
@@ -2331,6 +2434,39 @@ static s32 e1000_led_off_ich8lan(struct e1000_hw *hw)
2331} 2434}
2332 2435
2333/** 2436/**
2437 * e1000_get_cfg_done_ich8lan - Read config done bit
2438 * @hw: pointer to the HW structure
2439 *
2440 * Read the management control register for the config done bit for
2441 * completion status. NOTE: silicon which is EEPROM-less will fail trying
2442 * to read the config done bit, so an error is *ONLY* logged and returns
2443 * E1000_SUCCESS. If we were to return with error, EEPROM-less silicon
2444 * would not be able to be reset or change link.
2445 **/
2446static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw)
2447{
2448 u32 bank = 0;
2449
2450 e1000e_get_cfg_done(hw);
2451
2452 /* If EEPROM is not marked present, init the IGP 3 PHY manually */
2453 if (hw->mac.type != e1000_ich10lan) {
2454 if (((er32(EECD) & E1000_EECD_PRES) == 0) &&
2455 (hw->phy.type == e1000_phy_igp_3)) {
2456 e1000e_phy_init_script_igp3(hw);
2457 }
2458 } else {
2459 if (e1000_valid_nvm_bank_detect_ich8lan(hw, &bank)) {
2460 /* Maybe we should do a basic PHY config */
2461 hw_dbg(hw, "EEPROM not present\n");
2462 return -E1000_ERR_CONFIG;
2463 }
2464 }
2465
2466 return 0;
2467}
2468
2469/**
2334 * e1000_clear_hw_cntrs_ich8lan - Clear statistical counters 2470 * e1000_clear_hw_cntrs_ich8lan - Clear statistical counters
2335 * @hw: pointer to the HW structure 2471 * @hw: pointer to the HW structure
2336 * 2472 *
@@ -2360,7 +2496,7 @@ static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw)
2360} 2496}
2361 2497
2362static struct e1000_mac_operations ich8_mac_ops = { 2498static struct e1000_mac_operations ich8_mac_ops = {
2363 .mng_mode_enab = E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT, 2499 .check_mng_mode = e1000_check_mng_mode_ich8lan,
2364 .check_for_link = e1000e_check_for_copper_link, 2500 .check_for_link = e1000e_check_for_copper_link,
2365 .cleanup_led = e1000_cleanup_led_ich8lan, 2501 .cleanup_led = e1000_cleanup_led_ich8lan,
2366 .clear_hw_cntrs = e1000_clear_hw_cntrs_ich8lan, 2502 .clear_hw_cntrs = e1000_clear_hw_cntrs_ich8lan,
@@ -2380,7 +2516,7 @@ static struct e1000_phy_operations ich8_phy_ops = {
2380 .check_reset_block = e1000_check_reset_block_ich8lan, 2516 .check_reset_block = e1000_check_reset_block_ich8lan,
2381 .commit_phy = NULL, 2517 .commit_phy = NULL,
2382 .force_speed_duplex = e1000_phy_force_speed_duplex_ich8lan, 2518 .force_speed_duplex = e1000_phy_force_speed_duplex_ich8lan,
2383 .get_cfg_done = e1000e_get_cfg_done, 2519 .get_cfg_done = e1000_get_cfg_done_ich8lan,
2384 .get_cable_length = e1000e_get_cable_length_igp_2, 2520 .get_cable_length = e1000e_get_cable_length_igp_2,
2385 .get_phy_info = e1000_get_phy_info_ich8lan, 2521 .get_phy_info = e1000_get_phy_info_ich8lan,
2386 .read_phy_reg = e1000e_read_phy_reg_igp, 2522 .read_phy_reg = e1000e_read_phy_reg_igp,
@@ -2435,3 +2571,20 @@ struct e1000_info e1000_ich9_info = {
2435 .nvm_ops = &ich8_nvm_ops, 2571 .nvm_ops = &ich8_nvm_ops,
2436}; 2572};
2437 2573
2574struct e1000_info e1000_ich10_info = {
2575 .mac = e1000_ich10lan,
2576 .flags = FLAG_HAS_JUMBO_FRAMES
2577 | FLAG_IS_ICH
2578 | FLAG_HAS_WOL
2579 | FLAG_RX_CSUM_ENABLED
2580 | FLAG_HAS_CTRLEXT_ON_LOAD
2581 | FLAG_HAS_AMT
2582 | FLAG_HAS_ERT
2583 | FLAG_HAS_FLASH
2584 | FLAG_APME_IN_WUC,
2585 .pba = 10,
2586 .get_variants = e1000_get_variants_ich8lan,
2587 .mac_ops = &ich8_mac_ops,
2588 .phy_ops = &ich8_phy_ops,
2589 .nvm_ops = &ich8_nvm_ops,
2590};
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c
index f1f4e9dfd0a0..c7337306ffa7 100644
--- a/drivers/net/e1000e/lib.c
+++ b/drivers/net/e1000e/lib.c
@@ -2222,17 +2222,18 @@ static s32 e1000_mng_enable_host_if(struct e1000_hw *hw)
2222} 2222}
2223 2223
2224/** 2224/**
2225 * e1000e_check_mng_mode - check management mode 2225 * e1000e_check_mng_mode_generic - check management mode
2226 * @hw: pointer to the HW structure 2226 * @hw: pointer to the HW structure
2227 * 2227 *
2228 * Reads the firmware semaphore register and returns true (>0) if 2228 * Reads the firmware semaphore register and returns true (>0) if
2229 * manageability is enabled, else false (0). 2229 * manageability is enabled, else false (0).
2230 **/ 2230 **/
2231bool e1000e_check_mng_mode(struct e1000_hw *hw) 2231bool e1000e_check_mng_mode_generic(struct e1000_hw *hw)
2232{ 2232{
2233 u32 fwsm = er32(FWSM); 2233 u32 fwsm = er32(FWSM);
2234 2234
2235 return (fwsm & E1000_FWSM_MODE_MASK) == hw->mac.ops.mng_mode_enab; 2235 return (fwsm & E1000_FWSM_MODE_MASK) ==
2236 (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
2236} 2237}
2237 2238
2238/** 2239/**
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index b81c4237b5d3..1b72749979c4 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -55,9 +55,11 @@ static const struct e1000_info *e1000_info_tbl[] = {
55 [board_82571] = &e1000_82571_info, 55 [board_82571] = &e1000_82571_info,
56 [board_82572] = &e1000_82572_info, 56 [board_82572] = &e1000_82572_info,
57 [board_82573] = &e1000_82573_info, 57 [board_82573] = &e1000_82573_info,
58 [board_82574] = &e1000_82574_info,
58 [board_80003es2lan] = &e1000_es2_info, 59 [board_80003es2lan] = &e1000_es2_info,
59 [board_ich8lan] = &e1000_ich8_info, 60 [board_ich8lan] = &e1000_ich8_info,
60 [board_ich9lan] = &e1000_ich9_info, 61 [board_ich9lan] = &e1000_ich9_info,
62 [board_ich10lan] = &e1000_ich10_info,
61}; 63};
62 64
63#ifdef DEBUG 65#ifdef DEBUG
@@ -1187,8 +1189,8 @@ static irqreturn_t e1000_intr(int irq, void *data)
1187 struct net_device *netdev = data; 1189 struct net_device *netdev = data;
1188 struct e1000_adapter *adapter = netdev_priv(netdev); 1190 struct e1000_adapter *adapter = netdev_priv(netdev);
1189 struct e1000_hw *hw = &adapter->hw; 1191 struct e1000_hw *hw = &adapter->hw;
1190
1191 u32 rctl, icr = er32(ICR); 1192 u32 rctl, icr = er32(ICR);
1193
1192 if (!icr) 1194 if (!icr)
1193 return IRQ_NONE; /* Not our interrupt */ 1195 return IRQ_NONE; /* Not our interrupt */
1194 1196
@@ -1244,6 +1246,263 @@ static irqreturn_t e1000_intr(int irq, void *data)
1244 return IRQ_HANDLED; 1246 return IRQ_HANDLED;
1245} 1247}
1246 1248
1249static irqreturn_t e1000_msix_other(int irq, void *data)
1250{
1251 struct net_device *netdev = data;
1252 struct e1000_adapter *adapter = netdev_priv(netdev);
1253 struct e1000_hw *hw = &adapter->hw;
1254 u32 icr = er32(ICR);
1255
1256 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1257 ew32(IMS, E1000_IMS_OTHER);
1258 return IRQ_NONE;
1259 }
1260
1261 if (icr & adapter->eiac_mask)
1262 ew32(ICS, (icr & adapter->eiac_mask));
1263
1264 if (icr & E1000_ICR_OTHER) {
1265 if (!(icr & E1000_ICR_LSC))
1266 goto no_link_interrupt;
1267 hw->mac.get_link_status = 1;
1268 /* guard against interrupt when we're going down */
1269 if (!test_bit(__E1000_DOWN, &adapter->state))
1270 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1271 }
1272
1273no_link_interrupt:
1274 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1275
1276 return IRQ_HANDLED;
1277}
1278
1279
1280static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1281{
1282 struct net_device *netdev = data;
1283 struct e1000_adapter *adapter = netdev_priv(netdev);
1284 struct e1000_hw *hw = &adapter->hw;
1285 struct e1000_ring *tx_ring = adapter->tx_ring;
1286
1287
1288 adapter->total_tx_bytes = 0;
1289 adapter->total_tx_packets = 0;
1290
1291 if (!e1000_clean_tx_irq(adapter))
1292 /* Ring was not completely cleaned, so fire another interrupt */
1293 ew32(ICS, tx_ring->ims_val);
1294
1295 return IRQ_HANDLED;
1296}
1297
1298static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1299{
1300 struct net_device *netdev = data;
1301 struct e1000_adapter *adapter = netdev_priv(netdev);
1302
1303 /* Write the ITR value calculated at the end of the
1304 * previous interrupt.
1305 */
1306 if (adapter->rx_ring->set_itr) {
1307 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1308 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1309 adapter->rx_ring->set_itr = 0;
1310 }
1311
1312 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1313 adapter->total_rx_bytes = 0;
1314 adapter->total_rx_packets = 0;
1315 __netif_rx_schedule(netdev, &adapter->napi);
1316 }
1317 return IRQ_HANDLED;
1318}
1319
1320/**
1321 * e1000_configure_msix - Configure MSI-X hardware
1322 *
1323 * e1000_configure_msix sets up the hardware to properly
1324 * generate MSI-X interrupts.
1325 **/
1326static void e1000_configure_msix(struct e1000_adapter *adapter)
1327{
1328 struct e1000_hw *hw = &adapter->hw;
1329 struct e1000_ring *rx_ring = adapter->rx_ring;
1330 struct e1000_ring *tx_ring = adapter->tx_ring;
1331 int vector = 0;
1332 u32 ctrl_ext, ivar = 0;
1333
1334 adapter->eiac_mask = 0;
1335
1336 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1337 if (hw->mac.type == e1000_82574) {
1338 u32 rfctl = er32(RFCTL);
1339 rfctl |= E1000_RFCTL_ACK_DIS;
1340 ew32(RFCTL, rfctl);
1341 }
1342
1343#define E1000_IVAR_INT_ALLOC_VALID 0x8
1344 /* Configure Rx vector */
1345 rx_ring->ims_val = E1000_IMS_RXQ0;
1346 adapter->eiac_mask |= rx_ring->ims_val;
1347 if (rx_ring->itr_val)
1348 writel(1000000000 / (rx_ring->itr_val * 256),
1349 hw->hw_addr + rx_ring->itr_register);
1350 else
1351 writel(1, hw->hw_addr + rx_ring->itr_register);
1352 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1353
1354 /* Configure Tx vector */
1355 tx_ring->ims_val = E1000_IMS_TXQ0;
1356 vector++;
1357 if (tx_ring->itr_val)
1358 writel(1000000000 / (tx_ring->itr_val * 256),
1359 hw->hw_addr + tx_ring->itr_register);
1360 else
1361 writel(1, hw->hw_addr + tx_ring->itr_register);
1362 adapter->eiac_mask |= tx_ring->ims_val;
1363 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1364
1365 /* set vector for Other Causes, e.g. link changes */
1366 vector++;
1367 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1368 if (rx_ring->itr_val)
1369 writel(1000000000 / (rx_ring->itr_val * 256),
1370 hw->hw_addr + E1000_EITR_82574(vector));
1371 else
1372 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1373
1374 /* Cause Tx interrupts on every write back */
1375 ivar |= (1 << 31);
1376
1377 ew32(IVAR, ivar);
1378
1379 /* enable MSI-X PBA support */
1380 ctrl_ext = er32(CTRL_EXT);
1381 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1382
1383 /* Auto-Mask Other interrupts upon ICR read */
1384#define E1000_EIAC_MASK_82574 0x01F00000
1385 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1386 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1387 ew32(CTRL_EXT, ctrl_ext);
1388 e1e_flush();
1389}
1390
1391void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1392{
1393 if (adapter->msix_entries) {
1394 pci_disable_msix(adapter->pdev);
1395 kfree(adapter->msix_entries);
1396 adapter->msix_entries = NULL;
1397 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1398 pci_disable_msi(adapter->pdev);
1399 adapter->flags &= ~FLAG_MSI_ENABLED;
1400 }
1401
1402 return;
1403}
1404
1405/**
1406 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1407 *
1408 * Attempt to configure interrupts using the best available
1409 * capabilities of the hardware and kernel.
1410 **/
1411void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1412{
1413 int err;
1414 int numvecs, i;
1415
1416
1417 switch (adapter->int_mode) {
1418 case E1000E_INT_MODE_MSIX:
1419 if (adapter->flags & FLAG_HAS_MSIX) {
1420 numvecs = 3; /* RxQ0, TxQ0 and other */
1421 adapter->msix_entries = kcalloc(numvecs,
1422 sizeof(struct msix_entry),
1423 GFP_KERNEL);
1424 if (adapter->msix_entries) {
1425 for (i = 0; i < numvecs; i++)
1426 adapter->msix_entries[i].entry = i;
1427
1428 err = pci_enable_msix(adapter->pdev,
1429 adapter->msix_entries,
1430 numvecs);
1431 if (err == 0)
1432 return;
1433 }
1434 /* MSI-X failed, so fall through and try MSI */
1435 e_err("Failed to initialize MSI-X interrupts. "
1436 "Falling back to MSI interrupts.\n");
1437 e1000e_reset_interrupt_capability(adapter);
1438 }
1439 adapter->int_mode = E1000E_INT_MODE_MSI;
1440 /* Fall through */
1441 case E1000E_INT_MODE_MSI:
1442 if (!pci_enable_msi(adapter->pdev)) {
1443 adapter->flags |= FLAG_MSI_ENABLED;
1444 } else {
1445 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1446 e_err("Failed to initialize MSI interrupts. Falling "
1447 "back to legacy interrupts.\n");
1448 }
1449 /* Fall through */
1450 case E1000E_INT_MODE_LEGACY:
1451 /* Don't do anything; this is the system default */
1452 break;
1453 }
1454
1455 return;
1456}
1457
1458/**
1459 * e1000_request_msix - Initialize MSI-X interrupts
1460 *
1461 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1462 * kernel.
1463 **/
1464static int e1000_request_msix(struct e1000_adapter *adapter)
1465{
1466 struct net_device *netdev = adapter->netdev;
1467 int err = 0, vector = 0;
1468
1469 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1470 sprintf(adapter->rx_ring->name, "%s-rx0", netdev->name);
1471 else
1472 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1473 err = request_irq(adapter->msix_entries[vector].vector,
1474 &e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1475 netdev);
1476 if (err)
1477 goto out;
1478 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1479 adapter->rx_ring->itr_val = adapter->itr;
1480 vector++;
1481
1482 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1483 sprintf(adapter->tx_ring->name, "%s-tx0", netdev->name);
1484 else
1485 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1486 err = request_irq(adapter->msix_entries[vector].vector,
1487 &e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1488 netdev);
1489 if (err)
1490 goto out;
1491 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1492 adapter->tx_ring->itr_val = adapter->itr;
1493 vector++;
1494
1495 err = request_irq(adapter->msix_entries[vector].vector,
1496 &e1000_msix_other, 0, netdev->name, netdev);
1497 if (err)
1498 goto out;
1499
1500 e1000_configure_msix(adapter);
1501 return 0;
1502out:
1503 return err;
1504}
1505
1247/** 1506/**
1248 * e1000_request_irq - initialize interrupts 1507 * e1000_request_irq - initialize interrupts
1249 * 1508 *
@@ -1253,29 +1512,33 @@ static irqreturn_t e1000_intr(int irq, void *data)
1253static int e1000_request_irq(struct e1000_adapter *adapter) 1512static int e1000_request_irq(struct e1000_adapter *adapter)
1254{ 1513{
1255 struct net_device *netdev = adapter->netdev; 1514 struct net_device *netdev = adapter->netdev;
1256 int irq_flags = IRQF_SHARED;
1257 int err; 1515 int err;
1258 1516
1259 if (!(adapter->flags & FLAG_MSI_TEST_FAILED)) { 1517 if (adapter->msix_entries) {
1260 err = pci_enable_msi(adapter->pdev); 1518 err = e1000_request_msix(adapter);
1261 if (!err) { 1519 if (!err)
1262 adapter->flags |= FLAG_MSI_ENABLED; 1520 return err;
1263 irq_flags = 0; 1521 /* fall back to MSI */
1264 } 1522 e1000e_reset_interrupt_capability(adapter);
1523 adapter->int_mode = E1000E_INT_MODE_MSI;
1524 e1000e_set_interrupt_capability(adapter);
1265 } 1525 }
1526 if (adapter->flags & FLAG_MSI_ENABLED) {
1527 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, 0,
1528 netdev->name, netdev);
1529 if (!err)
1530 return err;
1266 1531
1267 err = request_irq(adapter->pdev->irq, 1532 /* fall back to legacy interrupt */
1268 ((adapter->flags & FLAG_MSI_ENABLED) ? 1533 e1000e_reset_interrupt_capability(adapter);
1269 &e1000_intr_msi : &e1000_intr), 1534 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1270 irq_flags, netdev->name, netdev);
1271 if (err) {
1272 if (adapter->flags & FLAG_MSI_ENABLED) {
1273 pci_disable_msi(adapter->pdev);
1274 adapter->flags &= ~FLAG_MSI_ENABLED;
1275 }
1276 e_err("Unable to allocate interrupt, Error: %d\n", err);
1277 } 1535 }
1278 1536
1537 err = request_irq(adapter->pdev->irq, &e1000_intr, IRQF_SHARED,
1538 netdev->name, netdev);
1539 if (err)
1540 e_err("Unable to allocate interrupt, Error: %d\n", err);
1541
1279 return err; 1542 return err;
1280} 1543}
1281 1544
@@ -1283,11 +1546,21 @@ static void e1000_free_irq(struct e1000_adapter *adapter)
1283{ 1546{
1284 struct net_device *netdev = adapter->netdev; 1547 struct net_device *netdev = adapter->netdev;
1285 1548
1286 free_irq(adapter->pdev->irq, netdev); 1549 if (adapter->msix_entries) {
1287 if (adapter->flags & FLAG_MSI_ENABLED) { 1550 int vector = 0;
1288 pci_disable_msi(adapter->pdev); 1551
1289 adapter->flags &= ~FLAG_MSI_ENABLED; 1552 free_irq(adapter->msix_entries[vector].vector, netdev);
1553 vector++;
1554
1555 free_irq(adapter->msix_entries[vector].vector, netdev);
1556 vector++;
1557
1558 /* Other Causes interrupt vector */
1559 free_irq(adapter->msix_entries[vector].vector, netdev);
1560 return;
1290 } 1561 }
1562
1563 free_irq(adapter->pdev->irq, netdev);
1291} 1564}
1292 1565
1293/** 1566/**
@@ -1298,6 +1571,8 @@ static void e1000_irq_disable(struct e1000_adapter *adapter)
1298 struct e1000_hw *hw = &adapter->hw; 1571 struct e1000_hw *hw = &adapter->hw;
1299 1572
1300 ew32(IMC, ~0); 1573 ew32(IMC, ~0);
1574 if (adapter->msix_entries)
1575 ew32(EIAC_82574, 0);
1301 e1e_flush(); 1576 e1e_flush();
1302 synchronize_irq(adapter->pdev->irq); 1577 synchronize_irq(adapter->pdev->irq);
1303} 1578}
@@ -1309,7 +1584,12 @@ static void e1000_irq_enable(struct e1000_adapter *adapter)
1309{ 1584{
1310 struct e1000_hw *hw = &adapter->hw; 1585 struct e1000_hw *hw = &adapter->hw;
1311 1586
1312 ew32(IMS, IMS_ENABLE_MASK); 1587 if (adapter->msix_entries) {
1588 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1589 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1590 } else {
1591 ew32(IMS, IMS_ENABLE_MASK);
1592 }
1313 e1e_flush(); 1593 e1e_flush();
1314} 1594}
1315 1595
@@ -1559,9 +1839,8 @@ void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1559 * traffic pattern. Constants in this function were computed 1839 * traffic pattern. Constants in this function were computed
1560 * based on theoretical maximum wire speed and thresholds were set based 1840 * based on theoretical maximum wire speed and thresholds were set based
1561 * on testing data as well as attempting to minimize response time 1841 * on testing data as well as attempting to minimize response time
1562 * while increasing bulk throughput. 1842 * while increasing bulk throughput. This functionality is controlled
1563 * this functionality is controlled by the InterruptThrottleRate module 1843 * by the InterruptThrottleRate module parameter.
1564 * parameter (see e1000_param.c)
1565 **/ 1844 **/
1566static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 1845static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1567 u16 itr_setting, int packets, 1846 u16 itr_setting, int packets,
@@ -1669,11 +1948,37 @@ set_itr_now:
1669 min(adapter->itr + (new_itr >> 2), new_itr) : 1948 min(adapter->itr + (new_itr >> 2), new_itr) :
1670 new_itr; 1949 new_itr;
1671 adapter->itr = new_itr; 1950 adapter->itr = new_itr;
1672 ew32(ITR, 1000000000 / (new_itr * 256)); 1951 adapter->rx_ring->itr_val = new_itr;
1952 if (adapter->msix_entries)
1953 adapter->rx_ring->set_itr = 1;
1954 else
1955 ew32(ITR, 1000000000 / (new_itr * 256));
1673 } 1956 }
1674} 1957}
1675 1958
1676/** 1959/**
1960 * e1000_alloc_queues - Allocate memory for all rings
1961 * @adapter: board private structure to initialize
1962 **/
1963static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1964{
1965 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1966 if (!adapter->tx_ring)
1967 goto err;
1968
1969 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1970 if (!adapter->rx_ring)
1971 goto err;
1972
1973 return 0;
1974err:
1975 e_err("Unable to allocate memory for queues\n");
1976 kfree(adapter->rx_ring);
1977 kfree(adapter->tx_ring);
1978 return -ENOMEM;
1979}
1980
1981/**
1677 * e1000_clean - NAPI Rx polling callback 1982 * e1000_clean - NAPI Rx polling callback
1678 * @napi: struct associated with this polling callback 1983 * @napi: struct associated with this polling callback
1679 * @budget: amount of packets driver is allowed to process this poll 1984 * @budget: amount of packets driver is allowed to process this poll
@@ -1681,12 +1986,17 @@ set_itr_now:
1681static int e1000_clean(struct napi_struct *napi, int budget) 1986static int e1000_clean(struct napi_struct *napi, int budget)
1682{ 1987{
1683 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); 1988 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
1989 struct e1000_hw *hw = &adapter->hw;
1684 struct net_device *poll_dev = adapter->netdev; 1990 struct net_device *poll_dev = adapter->netdev;
1685 int tx_cleaned = 0, work_done = 0; 1991 int tx_cleaned = 0, work_done = 0;
1686 1992
1687 /* Must NOT use netdev_priv macro here. */ 1993 /* Must NOT use netdev_priv macro here. */
1688 adapter = poll_dev->priv; 1994 adapter = poll_dev->priv;
1689 1995
1996 if (adapter->msix_entries &&
1997 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
1998 goto clean_rx;
1999
1690 /* 2000 /*
1691 * e1000_clean is called per-cpu. This lock protects 2001 * e1000_clean is called per-cpu. This lock protects
1692 * tx_ring from being cleaned by multiple cpus 2002 * tx_ring from being cleaned by multiple cpus
@@ -1698,6 +2008,7 @@ static int e1000_clean(struct napi_struct *napi, int budget)
1698 spin_unlock(&adapter->tx_queue_lock); 2008 spin_unlock(&adapter->tx_queue_lock);
1699 } 2009 }
1700 2010
2011clean_rx:
1701 adapter->clean_rx(adapter, &work_done, budget); 2012 adapter->clean_rx(adapter, &work_done, budget);
1702 2013
1703 if (tx_cleaned) 2014 if (tx_cleaned)
@@ -1708,7 +2019,10 @@ static int e1000_clean(struct napi_struct *napi, int budget)
1708 if (adapter->itr_setting & 3) 2019 if (adapter->itr_setting & 3)
1709 e1000_set_itr(adapter); 2020 e1000_set_itr(adapter);
1710 netif_rx_complete(poll_dev, napi); 2021 netif_rx_complete(poll_dev, napi);
1711 e1000_irq_enable(adapter); 2022 if (adapter->msix_entries)
2023 ew32(IMS, adapter->rx_ring->ims_val);
2024 else
2025 e1000_irq_enable(adapter);
1712 } 2026 }
1713 2027
1714 return work_done; 2028 return work_done;
@@ -2504,6 +2818,8 @@ int e1000e_up(struct e1000_adapter *adapter)
2504 clear_bit(__E1000_DOWN, &adapter->state); 2818 clear_bit(__E1000_DOWN, &adapter->state);
2505 2819
2506 napi_enable(&adapter->napi); 2820 napi_enable(&adapter->napi);
2821 if (adapter->msix_entries)
2822 e1000_configure_msix(adapter);
2507 e1000_irq_enable(adapter); 2823 e1000_irq_enable(adapter);
2508 2824
2509 /* fire a link change interrupt to start the watchdog */ 2825 /* fire a link change interrupt to start the watchdog */
@@ -2587,13 +2903,10 @@ static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2587 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 2903 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2588 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 2904 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2589 2905
2590 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 2906 e1000e_set_interrupt_capability(adapter);
2591 if (!adapter->tx_ring)
2592 goto err;
2593 2907
2594 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 2908 if (e1000_alloc_queues(adapter))
2595 if (!adapter->rx_ring) 2909 return -ENOMEM;
2596 goto err;
2597 2910
2598 spin_lock_init(&adapter->tx_queue_lock); 2911 spin_lock_init(&adapter->tx_queue_lock);
2599 2912
@@ -2602,12 +2915,6 @@ static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2602 2915
2603 set_bit(__E1000_DOWN, &adapter->state); 2916 set_bit(__E1000_DOWN, &adapter->state);
2604 return 0; 2917 return 0;
2605
2606err:
2607 e_err("Unable to allocate memory for queues\n");
2608 kfree(adapter->rx_ring);
2609 kfree(adapter->tx_ring);
2610 return -ENOMEM;
2611} 2918}
2612 2919
2613/** 2920/**
@@ -2649,6 +2956,7 @@ static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2649 2956
2650 /* free the real vector and request a test handler */ 2957 /* free the real vector and request a test handler */
2651 e1000_free_irq(adapter); 2958 e1000_free_irq(adapter);
2959 e1000e_reset_interrupt_capability(adapter);
2652 2960
2653 /* Assume that the test fails, if it succeeds then the test 2961 /* Assume that the test fails, if it succeeds then the test
2654 * MSI irq handler will unset this flag */ 2962 * MSI irq handler will unset this flag */
@@ -2679,6 +2987,7 @@ static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2679 rmb(); 2987 rmb();
2680 2988
2681 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 2989 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
2990 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2682 err = -EIO; 2991 err = -EIO;
2683 e_info("MSI interrupt test failed!\n"); 2992 e_info("MSI interrupt test failed!\n");
2684 } 2993 }
@@ -2692,7 +3001,7 @@ static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2692 /* okay so the test worked, restore settings */ 3001 /* okay so the test worked, restore settings */
2693 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name); 3002 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name);
2694msi_test_failed: 3003msi_test_failed:
2695 /* restore the original vector, even if it failed */ 3004 e1000e_set_interrupt_capability(adapter);
2696 e1000_request_irq(adapter); 3005 e1000_request_irq(adapter);
2697 return err; 3006 return err;
2698} 3007}
@@ -2802,7 +3111,7 @@ static int e1000_open(struct net_device *netdev)
2802 * ignore e1000e MSI messages, which means we need to test our MSI 3111 * ignore e1000e MSI messages, which means we need to test our MSI
2803 * interrupt now 3112 * interrupt now
2804 */ 3113 */
2805 { 3114 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
2806 err = e1000_test_msi(adapter); 3115 err = e1000_test_msi(adapter);
2807 if (err) { 3116 if (err) {
2808 e_err("Interrupt allocation failed\n"); 3117 e_err("Interrupt allocation failed\n");
@@ -2997,7 +3306,8 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
2997 3306
2998 adapter->stats.algnerrc += er32(ALGNERRC); 3307 adapter->stats.algnerrc += er32(ALGNERRC);
2999 adapter->stats.rxerrc += er32(RXERRC); 3308 adapter->stats.rxerrc += er32(RXERRC);
3000 adapter->stats.tncrs += er32(TNCRS); 3309 if (hw->mac.type != e1000_82574)
3310 adapter->stats.tncrs += er32(TNCRS);
3001 adapter->stats.cexterr += er32(CEXTERR); 3311 adapter->stats.cexterr += er32(CEXTERR);
3002 adapter->stats.tsctc += er32(TSCTC); 3312 adapter->stats.tsctc += er32(TSCTC);
3003 adapter->stats.tsctfc += er32(TSCTFC); 3313 adapter->stats.tsctfc += er32(TSCTFC);
@@ -3193,6 +3503,27 @@ static void e1000_watchdog_task(struct work_struct *work)
3193 &adapter->link_duplex); 3503 &adapter->link_duplex);
3194 e1000_print_link_info(adapter); 3504 e1000_print_link_info(adapter);
3195 /* 3505 /*
3506 * On supported PHYs, check for duplex mismatch only
3507 * if link has autonegotiated at 10/100 half
3508 */
3509 if ((hw->phy.type == e1000_phy_igp_3 ||
3510 hw->phy.type == e1000_phy_bm) &&
3511 (hw->mac.autoneg == true) &&
3512 (adapter->link_speed == SPEED_10 ||
3513 adapter->link_speed == SPEED_100) &&
3514 (adapter->link_duplex == HALF_DUPLEX)) {
3515 u16 autoneg_exp;
3516
3517 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3518
3519 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3520 e_info("Autonegotiated half duplex but"
3521 " link partner cannot autoneg. "
3522 " Try forcing full duplex if "
3523 "link gets many collisions.\n");
3524 }
3525
3526 /*
3196 * tweak tx_queue_len according to speed/duplex 3527 * tweak tx_queue_len according to speed/duplex
3197 * and adjust the timeout factor 3528 * and adjust the timeout factor
3198 */ 3529 */
@@ -3307,7 +3638,10 @@ link_up:
3307 } 3638 }
3308 3639
3309 /* Cause software interrupt to ensure Rx ring is cleaned */ 3640 /* Cause software interrupt to ensure Rx ring is cleaned */
3310 ew32(ICS, E1000_ICS_RXDMT0); 3641 if (adapter->msix_entries)
3642 ew32(ICS, adapter->rx_ring->ims_val);
3643 else
3644 ew32(ICS, E1000_ICS_RXDMT0);
3311 3645
3312 /* Force detection of hung controller every watchdog period */ 3646 /* Force detection of hung controller every watchdog period */
3313 adapter->detect_tx_hung = 1; 3647 adapter->detect_tx_hung = 1;
@@ -4024,6 +4358,7 @@ static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4024 e1000e_down(adapter); 4358 e1000e_down(adapter);
4025 e1000_free_irq(adapter); 4359 e1000_free_irq(adapter);
4026 } 4360 }
4361 e1000e_reset_interrupt_capability(adapter);
4027 4362
4028 retval = pci_save_state(pdev); 4363 retval = pci_save_state(pdev);
4029 if (retval) 4364 if (retval)
@@ -4150,6 +4485,7 @@ static int e1000_resume(struct pci_dev *pdev)
4150 pci_enable_wake(pdev, PCI_D3hot, 0); 4485 pci_enable_wake(pdev, PCI_D3hot, 0);
4151 pci_enable_wake(pdev, PCI_D3cold, 0); 4486 pci_enable_wake(pdev, PCI_D3cold, 0);
4152 4487
4488 e1000e_set_interrupt_capability(adapter);
4153 if (netif_running(netdev)) { 4489 if (netif_running(netdev)) {
4154 err = e1000_request_irq(adapter); 4490 err = e1000_request_irq(adapter);
4155 if (err) 4491 if (err)
@@ -4327,13 +4663,15 @@ static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4327 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 4663 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
4328 if (!(le16_to_cpu(buf) & (1 << 0))) { 4664 if (!(le16_to_cpu(buf) & (1 << 0))) {
4329 /* Deep Smart Power Down (DSPD) */ 4665 /* Deep Smart Power Down (DSPD) */
4330 e_warn("Warning: detected DSPD enabled in EEPROM\n"); 4666 dev_warn(&adapter->pdev->dev,
4667 "Warning: detected DSPD enabled in EEPROM\n");
4331 } 4668 }
4332 4669
4333 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf); 4670 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
4334 if (le16_to_cpu(buf) & (3 << 2)) { 4671 if (le16_to_cpu(buf) & (3 << 2)) {
4335 /* ASPM enable */ 4672 /* ASPM enable */
4336 e_warn("Warning: detected ASPM enabled in EEPROM\n"); 4673 dev_warn(&adapter->pdev->dev,
4674 "Warning: detected ASPM enabled in EEPROM\n");
4337 } 4675 }
4338} 4676}
4339 4677
@@ -4702,6 +5040,7 @@ static void __devexit e1000_remove(struct pci_dev *pdev)
4702 if (!e1000_check_reset_block(&adapter->hw)) 5040 if (!e1000_check_reset_block(&adapter->hw))
4703 e1000_phy_hw_reset(&adapter->hw); 5041 e1000_phy_hw_reset(&adapter->hw);
4704 5042
5043 e1000e_reset_interrupt_capability(adapter);
4705 kfree(adapter->tx_ring); 5044 kfree(adapter->tx_ring);
4706 kfree(adapter->rx_ring); 5045 kfree(adapter->rx_ring);
4707 5046
@@ -4743,6 +5082,8 @@ static struct pci_device_id e1000_pci_tbl[] = {
4743 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 5082 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
4744 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 5083 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
4745 5084
5085 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
5086
4746 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 5087 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
4747 board_80003es2lan }, 5088 board_80003es2lan },
4748 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 5089 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
@@ -4765,6 +5106,7 @@ static struct pci_device_id e1000_pci_tbl[] = {
4765 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 5106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
4766 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 5107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
4767 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 5108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
5109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
4768 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 5110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
4769 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 5111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
4770 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 5112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
@@ -4773,6 +5115,9 @@ static struct pci_device_id e1000_pci_tbl[] = {
4773 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 5115 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
4774 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 5116 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
4775 5117
5118 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5119 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5120
4776 { } /* terminate list */ 5121 { } /* terminate list */
4777}; 5122};
4778MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 5123MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
diff --git a/drivers/net/e1000e/param.c b/drivers/net/e1000e/param.c
index d91dbf7ba434..77a3d7207a5f 100644
--- a/drivers/net/e1000e/param.c
+++ b/drivers/net/e1000e/param.c
@@ -114,6 +114,15 @@ E1000_PARAM(InterruptThrottleRate, "Interrupt Throttling Rate");
114#define DEFAULT_ITR 3 114#define DEFAULT_ITR 3
115#define MAX_ITR 100000 115#define MAX_ITR 100000
116#define MIN_ITR 100 116#define MIN_ITR 100
117/* IntMode (Interrupt Mode)
118 *
119 * Valid Range: 0 - 2
120 *
121 * Default Value: 2 (MSI-X)
122 */
123E1000_PARAM(IntMode, "Interrupt Mode");
124#define MAX_INTMODE 2
125#define MIN_INTMODE 0
117 126
118/* 127/*
119 * Enable Smart Power Down of the PHY 128 * Enable Smart Power Down of the PHY
@@ -361,6 +370,24 @@ void __devinit e1000e_check_options(struct e1000_adapter *adapter)
361 adapter->itr = 20000; 370 adapter->itr = 20000;
362 } 371 }
363 } 372 }
373 { /* Interrupt Mode */
374 struct e1000_option opt = {
375 .type = range_option,
376 .name = "Interrupt Mode",
377 .err = "defaulting to 2 (MSI-X)",
378 .def = E1000E_INT_MODE_MSIX,
379 .arg = { .r = { .min = MIN_INTMODE,
380 .max = MAX_INTMODE } }
381 };
382
383 if (num_IntMode > bd) {
384 unsigned int int_mode = IntMode[bd];
385 e1000_validate_option(&int_mode, &opt, adapter);
386 adapter->int_mode = int_mode;
387 } else {
388 adapter->int_mode = opt.def;
389 }
390 }
364 { /* Smart Power Down */ 391 { /* Smart Power Down */
365 const struct e1000_option opt = { 392 const struct e1000_option opt = {
366 .type = enable_option, 393 .type = enable_option,
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c
index b133dcf0e950..6cd333ae61d0 100644
--- a/drivers/net/e1000e/phy.c
+++ b/drivers/net/e1000e/phy.c
@@ -476,7 +476,9 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw)
476 if (ret_val) 476 if (ret_val)
477 return ret_val; 477 return ret_val;
478 478
479 if ((phy->type == e1000_phy_m88) && (phy->revision < 4)) { 479 if ((phy->type == e1000_phy_m88) &&
480 (phy->revision < E1000_REVISION_4) &&
481 (phy->id != BME1000_E_PHY_ID_R2)) {
480 /* 482 /*
481 * Force TX_CLK in the Extended PHY Specific Control Register 483 * Force TX_CLK in the Extended PHY Specific Control Register
482 * to 25MHz clock. 484 * to 25MHz clock.
@@ -504,6 +506,18 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw)
504 return ret_val; 506 return ret_val;
505 } 507 }
506 508
509 if ((phy->type == e1000_phy_bm) && (phy->id == BME1000_E_PHY_ID_R2)) {
510 /* Set PHY page 0, register 29 to 0x0003 */
511 ret_val = e1e_wphy(hw, 29, 0x0003);
512 if (ret_val)
513 return ret_val;
514
515 /* Set PHY page 0, register 30 to 0x0000 */
516 ret_val = e1e_wphy(hw, 30, 0x0000);
517 if (ret_val)
518 return ret_val;
519 }
520
507 /* Commit the changes. */ 521 /* Commit the changes. */
508 ret_val = e1000e_commit_phy(hw); 522 ret_val = e1000e_commit_phy(hw);
509 if (ret_val) 523 if (ret_val)
@@ -1720,6 +1734,91 @@ s32 e1000e_get_cfg_done(struct e1000_hw *hw)
1720 return 0; 1734 return 0;
1721} 1735}
1722 1736
1737/**
1738 * e1000e_phy_init_script_igp3 - Inits the IGP3 PHY
1739 * @hw: pointer to the HW structure
1740 *
1741 * Initializes a Intel Gigabit PHY3 when an EEPROM is not present.
1742 **/
1743s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw)
1744{
1745 hw_dbg(hw, "Running IGP 3 PHY init script\n");
1746
1747 /* PHY init IGP 3 */
1748 /* Enable rise/fall, 10-mode work in class-A */
1749 e1e_wphy(hw, 0x2F5B, 0x9018);
1750 /* Remove all caps from Replica path filter */
1751 e1e_wphy(hw, 0x2F52, 0x0000);
1752 /* Bias trimming for ADC, AFE and Driver (Default) */
1753 e1e_wphy(hw, 0x2FB1, 0x8B24);
1754 /* Increase Hybrid poly bias */
1755 e1e_wphy(hw, 0x2FB2, 0xF8F0);
1756 /* Add 4% to Tx amplitude in Gig mode */
1757 e1e_wphy(hw, 0x2010, 0x10B0);
1758 /* Disable trimming (TTT) */
1759 e1e_wphy(hw, 0x2011, 0x0000);
1760 /* Poly DC correction to 94.6% + 2% for all channels */
1761 e1e_wphy(hw, 0x20DD, 0x249A);
1762 /* ABS DC correction to 95.9% */
1763 e1e_wphy(hw, 0x20DE, 0x00D3);
1764 /* BG temp curve trim */
1765 e1e_wphy(hw, 0x28B4, 0x04CE);
1766 /* Increasing ADC OPAMP stage 1 currents to max */
1767 e1e_wphy(hw, 0x2F70, 0x29E4);
1768 /* Force 1000 ( required for enabling PHY regs configuration) */
1769 e1e_wphy(hw, 0x0000, 0x0140);
1770 /* Set upd_freq to 6 */
1771 e1e_wphy(hw, 0x1F30, 0x1606);
1772 /* Disable NPDFE */
1773 e1e_wphy(hw, 0x1F31, 0xB814);
1774 /* Disable adaptive fixed FFE (Default) */
1775 e1e_wphy(hw, 0x1F35, 0x002A);
1776 /* Enable FFE hysteresis */
1777 e1e_wphy(hw, 0x1F3E, 0x0067);
1778 /* Fixed FFE for short cable lengths */
1779 e1e_wphy(hw, 0x1F54, 0x0065);
1780 /* Fixed FFE for medium cable lengths */
1781 e1e_wphy(hw, 0x1F55, 0x002A);
1782 /* Fixed FFE for long cable lengths */
1783 e1e_wphy(hw, 0x1F56, 0x002A);
1784 /* Enable Adaptive Clip Threshold */
1785 e1e_wphy(hw, 0x1F72, 0x3FB0);
1786 /* AHT reset limit to 1 */
1787 e1e_wphy(hw, 0x1F76, 0xC0FF);
1788 /* Set AHT master delay to 127 msec */
1789 e1e_wphy(hw, 0x1F77, 0x1DEC);
1790 /* Set scan bits for AHT */
1791 e1e_wphy(hw, 0x1F78, 0xF9EF);
1792 /* Set AHT Preset bits */
1793 e1e_wphy(hw, 0x1F79, 0x0210);
1794 /* Change integ_factor of channel A to 3 */
1795 e1e_wphy(hw, 0x1895, 0x0003);
1796 /* Change prop_factor of channels BCD to 8 */
1797 e1e_wphy(hw, 0x1796, 0x0008);
1798 /* Change cg_icount + enable integbp for channels BCD */
1799 e1e_wphy(hw, 0x1798, 0xD008);
1800 /*
1801 * Change cg_icount + enable integbp + change prop_factor_master
1802 * to 8 for channel A
1803 */
1804 e1e_wphy(hw, 0x1898, 0xD918);
1805 /* Disable AHT in Slave mode on channel A */
1806 e1e_wphy(hw, 0x187A, 0x0800);
1807 /*
1808 * Enable LPLU and disable AN to 1000 in non-D0a states,
1809 * Enable SPD+B2B
1810 */
1811 e1e_wphy(hw, 0x0019, 0x008D);
1812 /* Enable restart AN on an1000_dis change */
1813 e1e_wphy(hw, 0x001B, 0x2080);
1814 /* Enable wh_fifo read clock in 10/100 modes */
1815 e1e_wphy(hw, 0x0014, 0x0045);
1816 /* Restart AN, Speed selection is 1000 */
1817 e1e_wphy(hw, 0x0000, 0x1340);
1818
1819 return 0;
1820}
1821
1723/* Internal function pointers */ 1822/* Internal function pointers */
1724 1823
1725/** 1824/**
@@ -1969,6 +2068,99 @@ out:
1969} 2068}
1970 2069
1971/** 2070/**
2071 * e1000e_read_phy_reg_bm2 - Read BM PHY register
2072 * @hw: pointer to the HW structure
2073 * @offset: register offset to be read
2074 * @data: pointer to the read data
2075 *
2076 * Acquires semaphore, if necessary, then reads the PHY register at offset
2077 * and storing the retrieved information in data. Release any acquired
2078 * semaphores before exiting.
2079 **/
2080s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)
2081{
2082 s32 ret_val;
2083 u16 page = (u16)(offset >> IGP_PAGE_SHIFT);
2084
2085 /* Page 800 works differently than the rest so it has its own func */
2086 if (page == BM_WUC_PAGE) {
2087 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
2088 true);
2089 return ret_val;
2090 }
2091
2092 ret_val = hw->phy.ops.acquire_phy(hw);
2093 if (ret_val)
2094 return ret_val;
2095
2096 hw->phy.addr = 1;
2097
2098 if (offset > MAX_PHY_MULTI_PAGE_REG) {
2099
2100 /* Page is shifted left, PHY expects (page x 32) */
2101 ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
2102 page);
2103
2104 if (ret_val) {
2105 hw->phy.ops.release_phy(hw);
2106 return ret_val;
2107 }
2108 }
2109
2110 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2111 data);
2112 hw->phy.ops.release_phy(hw);
2113
2114 return ret_val;
2115}
2116
2117/**
2118 * e1000e_write_phy_reg_bm2 - Write BM PHY register
2119 * @hw: pointer to the HW structure
2120 * @offset: register offset to write to
2121 * @data: data to write at register offset
2122 *
2123 * Acquires semaphore, if necessary, then writes the data to PHY register
2124 * at the offset. Release any acquired semaphores before exiting.
2125 **/
2126s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)
2127{
2128 s32 ret_val;
2129 u16 page = (u16)(offset >> IGP_PAGE_SHIFT);
2130
2131 /* Page 800 works differently than the rest so it has its own func */
2132 if (page == BM_WUC_PAGE) {
2133 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
2134 false);
2135 return ret_val;
2136 }
2137
2138 ret_val = hw->phy.ops.acquire_phy(hw);
2139 if (ret_val)
2140 return ret_val;
2141
2142 hw->phy.addr = 1;
2143
2144 if (offset > MAX_PHY_MULTI_PAGE_REG) {
2145 /* Page is shifted left, PHY expects (page x 32) */
2146 ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
2147 page);
2148
2149 if (ret_val) {
2150 hw->phy.ops.release_phy(hw);
2151 return ret_val;
2152 }
2153 }
2154
2155 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2156 data);
2157
2158 hw->phy.ops.release_phy(hw);
2159
2160 return ret_val;
2161}
2162
2163/**
1972 * e1000_access_phy_wakeup_reg_bm - Read BM PHY wakeup register 2164 * e1000_access_phy_wakeup_reg_bm - Read BM PHY wakeup register
1973 * @hw: pointer to the HW structure 2165 * @hw: pointer to the HW structure
1974 * @offset: register offset to be read or written 2166 * @offset: register offset to be read or written
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 18:35:06 -0500