diff options
Diffstat (limited to 'drivers/net/e1000e')
-rw-r--r-- | drivers/net/e1000e/82571.c | 36 | ||||
-rw-r--r-- | drivers/net/e1000e/e1000.h | 4 | ||||
-rw-r--r-- | drivers/net/e1000e/es2lan.c | 32 | ||||
-rw-r--r-- | drivers/net/e1000e/ethtool.c | 123 | ||||
-rw-r--r-- | drivers/net/e1000e/hw.h | 10 | ||||
-rw-r--r-- | drivers/net/e1000e/ich8lan.c | 30 | ||||
-rw-r--r-- | drivers/net/e1000e/lib.c | 6 | ||||
-rw-r--r-- | drivers/net/e1000e/netdev.c | 24 |
8 files changed, 139 insertions, 126 deletions
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c index f7e1619b974e..01c88664bad3 100644 --- a/drivers/net/e1000e/82571.c +++ b/drivers/net/e1000e/82571.c | |||
@@ -171,6 +171,10 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw) | |||
171 | * for setting word_size. | 171 | * for setting word_size. |
172 | */ | 172 | */ |
173 | size += NVM_WORD_SIZE_BASE_SHIFT; | 173 | size += NVM_WORD_SIZE_BASE_SHIFT; |
174 | |||
175 | /* EEPROM access above 16k is unsupported */ | ||
176 | if (size > 14) | ||
177 | size = 14; | ||
174 | nvm->word_size = 1 << size; | 178 | nvm->word_size = 1 << size; |
175 | break; | 179 | break; |
176 | } | 180 | } |
@@ -244,7 +248,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter) | |||
244 | return 0; | 248 | return 0; |
245 | } | 249 | } |
246 | 250 | ||
247 | static s32 e1000_get_invariants_82571(struct e1000_adapter *adapter) | 251 | static s32 e1000_get_variants_82571(struct e1000_adapter *adapter) |
248 | { | 252 | { |
249 | struct e1000_hw *hw = &adapter->hw; | 253 | struct e1000_hw *hw = &adapter->hw; |
250 | static int global_quad_port_a; /* global port a indication */ | 254 | static int global_quad_port_a; /* global port a indication */ |
@@ -832,19 +836,19 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw) | |||
832 | ret_val = e1000_setup_link_82571(hw); | 836 | ret_val = e1000_setup_link_82571(hw); |
833 | 837 | ||
834 | /* Set the transmit descriptor write-back policy */ | 838 | /* Set the transmit descriptor write-back policy */ |
835 | reg_data = er32(TXDCTL); | 839 | reg_data = er32(TXDCTL(0)); |
836 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | | 840 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | |
837 | E1000_TXDCTL_FULL_TX_DESC_WB | | 841 | E1000_TXDCTL_FULL_TX_DESC_WB | |
838 | E1000_TXDCTL_COUNT_DESC; | 842 | E1000_TXDCTL_COUNT_DESC; |
839 | ew32(TXDCTL, reg_data); | 843 | ew32(TXDCTL(0), reg_data); |
840 | 844 | ||
841 | /* ...for both queues. */ | 845 | /* ...for both queues. */ |
842 | if (mac->type != e1000_82573) { | 846 | if (mac->type != e1000_82573) { |
843 | reg_data = er32(TXDCTL1); | 847 | reg_data = er32(TXDCTL(1)); |
844 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | | 848 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | |
845 | E1000_TXDCTL_FULL_TX_DESC_WB | | 849 | E1000_TXDCTL_FULL_TX_DESC_WB | |
846 | E1000_TXDCTL_COUNT_DESC; | 850 | E1000_TXDCTL_COUNT_DESC; |
847 | ew32(TXDCTL1, reg_data); | 851 | ew32(TXDCTL(1), reg_data); |
848 | } else { | 852 | } else { |
849 | e1000e_enable_tx_pkt_filtering(hw); | 853 | e1000e_enable_tx_pkt_filtering(hw); |
850 | reg_data = er32(GCR); | 854 | reg_data = er32(GCR); |
@@ -874,17 +878,17 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) | |||
874 | u32 reg; | 878 | u32 reg; |
875 | 879 | ||
876 | /* Transmit Descriptor Control 0 */ | 880 | /* Transmit Descriptor Control 0 */ |
877 | reg = er32(TXDCTL); | 881 | reg = er32(TXDCTL(0)); |
878 | reg |= (1 << 22); | 882 | reg |= (1 << 22); |
879 | ew32(TXDCTL, reg); | 883 | ew32(TXDCTL(0), reg); |
880 | 884 | ||
881 | /* Transmit Descriptor Control 1 */ | 885 | /* Transmit Descriptor Control 1 */ |
882 | reg = er32(TXDCTL1); | 886 | reg = er32(TXDCTL(1)); |
883 | reg |= (1 << 22); | 887 | reg |= (1 << 22); |
884 | ew32(TXDCTL1, reg); | 888 | ew32(TXDCTL(1), reg); |
885 | 889 | ||
886 | /* Transmit Arbitration Control 0 */ | 890 | /* Transmit Arbitration Control 0 */ |
887 | reg = er32(TARC0); | 891 | reg = er32(TARC(0)); |
888 | reg &= ~(0xF << 27); /* 30:27 */ | 892 | reg &= ~(0xF << 27); /* 30:27 */ |
889 | switch (hw->mac.type) { | 893 | switch (hw->mac.type) { |
890 | case e1000_82571: | 894 | case e1000_82571: |
@@ -894,10 +898,10 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) | |||
894 | default: | 898 | default: |
895 | break; | 899 | break; |
896 | } | 900 | } |
897 | ew32(TARC0, reg); | 901 | ew32(TARC(0), reg); |
898 | 902 | ||
899 | /* Transmit Arbitration Control 1 */ | 903 | /* Transmit Arbitration Control 1 */ |
900 | reg = er32(TARC1); | 904 | reg = er32(TARC(1)); |
901 | switch (hw->mac.type) { | 905 | switch (hw->mac.type) { |
902 | case e1000_82571: | 906 | case e1000_82571: |
903 | case e1000_82572: | 907 | case e1000_82572: |
@@ -907,7 +911,7 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) | |||
907 | reg &= ~(1 << 28); | 911 | reg &= ~(1 << 28); |
908 | else | 912 | else |
909 | reg |= (1 << 28); | 913 | reg |= (1 << 28); |
910 | ew32(TARC1, reg); | 914 | ew32(TARC(1), reg); |
911 | break; | 915 | break; |
912 | default: | 916 | default: |
913 | break; | 917 | break; |
@@ -1333,7 +1337,7 @@ struct e1000_info e1000_82571_info = { | |||
1333 | | FLAG_TARC_SPEED_MODE_BIT /* errata */ | 1337 | | FLAG_TARC_SPEED_MODE_BIT /* errata */ |
1334 | | FLAG_APME_CHECK_PORT_B, | 1338 | | FLAG_APME_CHECK_PORT_B, |
1335 | .pba = 38, | 1339 | .pba = 38, |
1336 | .get_invariants = e1000_get_invariants_82571, | 1340 | .get_variants = e1000_get_variants_82571, |
1337 | .mac_ops = &e82571_mac_ops, | 1341 | .mac_ops = &e82571_mac_ops, |
1338 | .phy_ops = &e82_phy_ops_igp, | 1342 | .phy_ops = &e82_phy_ops_igp, |
1339 | .nvm_ops = &e82571_nvm_ops, | 1343 | .nvm_ops = &e82571_nvm_ops, |
@@ -1351,7 +1355,7 @@ struct e1000_info e1000_82572_info = { | |||
1351 | | FLAG_HAS_STATS_ICR_ICT | 1355 | | FLAG_HAS_STATS_ICR_ICT |
1352 | | FLAG_TARC_SPEED_MODE_BIT, /* errata */ | 1356 | | FLAG_TARC_SPEED_MODE_BIT, /* errata */ |
1353 | .pba = 38, | 1357 | .pba = 38, |
1354 | .get_invariants = e1000_get_invariants_82571, | 1358 | .get_variants = e1000_get_variants_82571, |
1355 | .mac_ops = &e82571_mac_ops, | 1359 | .mac_ops = &e82571_mac_ops, |
1356 | .phy_ops = &e82_phy_ops_igp, | 1360 | .phy_ops = &e82_phy_ops_igp, |
1357 | .nvm_ops = &e82571_nvm_ops, | 1361 | .nvm_ops = &e82571_nvm_ops, |
@@ -1371,7 +1375,7 @@ struct e1000_info e1000_82573_info = { | |||
1371 | | FLAG_HAS_ERT | 1375 | | FLAG_HAS_ERT |
1372 | | FLAG_HAS_SWSM_ON_LOAD, | 1376 | | FLAG_HAS_SWSM_ON_LOAD, |
1373 | .pba = 20, | 1377 | .pba = 20, |
1374 | .get_invariants = e1000_get_invariants_82571, | 1378 | .get_variants = e1000_get_variants_82571, |
1375 | .mac_ops = &e82571_mac_ops, | 1379 | .mac_ops = &e82571_mac_ops, |
1376 | .phy_ops = &e82_phy_ops_m88, | 1380 | .phy_ops = &e82_phy_ops_m88, |
1377 | .nvm_ops = &e82571_nvm_ops, | 1381 | .nvm_ops = &e82571_nvm_ops, |
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h index b941a6b509c4..5a89dff52264 100644 --- a/drivers/net/e1000e/e1000.h +++ b/drivers/net/e1000e/e1000.h | |||
@@ -271,7 +271,7 @@ struct e1000_info { | |||
271 | enum e1000_mac_type mac; | 271 | enum e1000_mac_type mac; |
272 | unsigned int flags; | 272 | unsigned int flags; |
273 | u32 pba; | 273 | u32 pba; |
274 | s32 (*get_invariants)(struct e1000_adapter *); | 274 | s32 (*get_variants)(struct e1000_adapter *); |
275 | struct e1000_mac_operations *mac_ops; | 275 | struct e1000_mac_operations *mac_ops; |
276 | struct e1000_phy_operations *phy_ops; | 276 | struct e1000_phy_operations *phy_ops; |
277 | struct e1000_nvm_operations *nvm_ops; | 277 | struct e1000_nvm_operations *nvm_ops; |
@@ -357,7 +357,7 @@ extern struct e1000_info e1000_ich8_info; | |||
357 | extern struct e1000_info e1000_ich9_info; | 357 | extern struct e1000_info e1000_ich9_info; |
358 | extern struct e1000_info e1000_es2_info; | 358 | extern struct e1000_info e1000_es2_info; |
359 | 359 | ||
360 | extern s32 e1000e_read_part_num(struct e1000_hw *hw, u32 *part_num); | 360 | extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num); |
361 | 361 | ||
362 | extern s32 e1000e_commit_phy(struct e1000_hw *hw); | 362 | extern s32 e1000e_commit_phy(struct e1000_hw *hw); |
363 | 363 | ||
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c index e3f4aeefeae2..d59a99ae44be 100644 --- a/drivers/net/e1000e/es2lan.c +++ b/drivers/net/e1000e/es2lan.c | |||
@@ -178,6 +178,10 @@ static s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw) | |||
178 | * for setting word_size. | 178 | * for setting word_size. |
179 | */ | 179 | */ |
180 | size += NVM_WORD_SIZE_BASE_SHIFT; | 180 | size += NVM_WORD_SIZE_BASE_SHIFT; |
181 | |||
182 | /* EEPROM access above 16k is unsupported */ | ||
183 | if (size > 14) | ||
184 | size = 14; | ||
181 | nvm->word_size = 1 << size; | 185 | nvm->word_size = 1 << size; |
182 | 186 | ||
183 | return 0; | 187 | return 0; |
@@ -234,7 +238,7 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_adapter *adapter) | |||
234 | return 0; | 238 | return 0; |
235 | } | 239 | } |
236 | 240 | ||
237 | static s32 e1000_get_invariants_80003es2lan(struct e1000_adapter *adapter) | 241 | static s32 e1000_get_variants_80003es2lan(struct e1000_adapter *adapter) |
238 | { | 242 | { |
239 | struct e1000_hw *hw = &adapter->hw; | 243 | struct e1000_hw *hw = &adapter->hw; |
240 | s32 rc; | 244 | s32 rc; |
@@ -788,16 +792,16 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw) | |||
788 | ret_val = e1000e_setup_link(hw); | 792 | ret_val = e1000e_setup_link(hw); |
789 | 793 | ||
790 | /* Set the transmit descriptor write-back policy */ | 794 | /* Set the transmit descriptor write-back policy */ |
791 | reg_data = er32(TXDCTL); | 795 | reg_data = er32(TXDCTL(0)); |
792 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | | 796 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | |
793 | E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC; | 797 | E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC; |
794 | ew32(TXDCTL, reg_data); | 798 | ew32(TXDCTL(0), reg_data); |
795 | 799 | ||
796 | /* ...for both queues. */ | 800 | /* ...for both queues. */ |
797 | reg_data = er32(TXDCTL1); | 801 | reg_data = er32(TXDCTL(1)); |
798 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | | 802 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | |
799 | E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC; | 803 | E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC; |
800 | ew32(TXDCTL1, reg_data); | 804 | ew32(TXDCTL(1), reg_data); |
801 | 805 | ||
802 | /* Enable retransmit on late collisions */ | 806 | /* Enable retransmit on late collisions */ |
803 | reg_data = er32(TCTL); | 807 | reg_data = er32(TCTL); |
@@ -842,29 +846,29 @@ static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw) | |||
842 | u32 reg; | 846 | u32 reg; |
843 | 847 | ||
844 | /* Transmit Descriptor Control 0 */ | 848 | /* Transmit Descriptor Control 0 */ |
845 | reg = er32(TXDCTL); | 849 | reg = er32(TXDCTL(0)); |
846 | reg |= (1 << 22); | 850 | reg |= (1 << 22); |
847 | ew32(TXDCTL, reg); | 851 | ew32(TXDCTL(0), reg); |
848 | 852 | ||
849 | /* Transmit Descriptor Control 1 */ | 853 | /* Transmit Descriptor Control 1 */ |
850 | reg = er32(TXDCTL1); | 854 | reg = er32(TXDCTL(1)); |
851 | reg |= (1 << 22); | 855 | reg |= (1 << 22); |
852 | ew32(TXDCTL1, reg); | 856 | ew32(TXDCTL(1), reg); |
853 | 857 | ||
854 | /* Transmit Arbitration Control 0 */ | 858 | /* Transmit Arbitration Control 0 */ |
855 | reg = er32(TARC0); | 859 | reg = er32(TARC(0)); |
856 | reg &= ~(0xF << 27); /* 30:27 */ | 860 | reg &= ~(0xF << 27); /* 30:27 */ |
857 | if (hw->phy.media_type != e1000_media_type_copper) | 861 | if (hw->phy.media_type != e1000_media_type_copper) |
858 | reg &= ~(1 << 20); | 862 | reg &= ~(1 << 20); |
859 | ew32(TARC0, reg); | 863 | ew32(TARC(0), reg); |
860 | 864 | ||
861 | /* Transmit Arbitration Control 1 */ | 865 | /* Transmit Arbitration Control 1 */ |
862 | reg = er32(TARC1); | 866 | reg = er32(TARC(1)); |
863 | if (er32(TCTL) & E1000_TCTL_MULR) | 867 | if (er32(TCTL) & E1000_TCTL_MULR) |
864 | reg &= ~(1 << 28); | 868 | reg &= ~(1 << 28); |
865 | else | 869 | else |
866 | reg |= (1 << 28); | 870 | reg |= (1 << 28); |
867 | ew32(TARC1, reg); | 871 | ew32(TARC(1), reg); |
868 | } | 872 | } |
869 | 873 | ||
870 | /** | 874 | /** |
@@ -1239,7 +1243,7 @@ struct e1000_info e1000_es2_info = { | |||
1239 | | FLAG_DISABLE_FC_PAUSE_TIME /* errata */ | 1243 | | FLAG_DISABLE_FC_PAUSE_TIME /* errata */ |
1240 | | FLAG_TIPG_MEDIUM_FOR_80003ESLAN, | 1244 | | FLAG_TIPG_MEDIUM_FOR_80003ESLAN, |
1241 | .pba = 38, | 1245 | .pba = 38, |
1242 | .get_invariants = e1000_get_invariants_80003es2lan, | 1246 | .get_variants = e1000_get_variants_80003es2lan, |
1243 | .mac_ops = &es2_mac_ops, | 1247 | .mac_ops = &es2_mac_ops, |
1244 | .phy_ops = &es2_phy_ops, | 1248 | .phy_ops = &es2_phy_ops, |
1245 | .nvm_ops = &es2_nvm_ops, | 1249 | .nvm_ops = &es2_nvm_ops, |
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c index 4ae00567bba6..6d1b257bbda6 100644 --- a/drivers/net/e1000e/ethtool.c +++ b/drivers/net/e1000e/ethtool.c | |||
@@ -641,10 +641,17 @@ static int e1000_set_ringparam(struct net_device *netdev, | |||
641 | tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); | 641 | tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); |
642 | if (!tx_ring) | 642 | if (!tx_ring) |
643 | goto err_alloc_tx; | 643 | goto err_alloc_tx; |
644 | /* | ||
645 | * use a memcpy to save any previously configured | ||
646 | * items like napi structs from having to be | ||
647 | * reinitialized | ||
648 | */ | ||
649 | memcpy(tx_ring, tx_old, sizeof(struct e1000_ring)); | ||
644 | 650 | ||
645 | rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); | 651 | rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); |
646 | if (!rx_ring) | 652 | if (!rx_ring) |
647 | goto err_alloc_rx; | 653 | goto err_alloc_rx; |
654 | memcpy(rx_ring, rx_old, sizeof(struct e1000_ring)); | ||
648 | 655 | ||
649 | adapter->tx_ring = tx_ring; | 656 | adapter->tx_ring = tx_ring; |
650 | adapter->rx_ring = rx_ring; | 657 | adapter->rx_ring = rx_ring; |
@@ -700,61 +707,55 @@ err_setup: | |||
700 | return err; | 707 | return err; |
701 | } | 708 | } |
702 | 709 | ||
703 | static bool reg_pattern_test_array(struct e1000_adapter *adapter, u64 *data, | 710 | static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, |
704 | int reg, int offset, u32 mask, u32 write) | 711 | int reg, int offset, u32 mask, u32 write) |
705 | { | 712 | { |
706 | int i; | 713 | u32 pat, val; |
707 | u32 read; | ||
708 | static const u32 test[] = | 714 | static const u32 test[] = |
709 | {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; | 715 | {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; |
710 | for (i = 0; i < ARRAY_SIZE(test); i++) { | 716 | for (pat = 0; pat < ARRAY_SIZE(test); pat++) { |
711 | E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset, | 717 | E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset, |
712 | (test[i] & write)); | 718 | (test[pat] & write)); |
713 | read = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset); | 719 | val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset); |
714 | if (read != (test[i] & write & mask)) { | 720 | if (val != (test[pat] & write & mask)) { |
715 | ndev_err(adapter->netdev, "pattern test reg %04X " | 721 | ndev_err(adapter->netdev, "pattern test reg %04X " |
716 | "failed: got 0x%08X expected 0x%08X\n", | 722 | "failed: got 0x%08X expected 0x%08X\n", |
717 | reg + offset, | 723 | reg + offset, |
718 | read, (test[i] & write & mask)); | 724 | val, (test[pat] & write & mask)); |
719 | *data = reg; | 725 | *data = reg; |
720 | return true; | 726 | return 1; |
721 | } | 727 | } |
722 | } | 728 | } |
723 | return false; | 729 | return 0; |
724 | } | 730 | } |
725 | 731 | ||
726 | static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, | 732 | static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, |
727 | int reg, u32 mask, u32 write) | 733 | int reg, u32 mask, u32 write) |
728 | { | 734 | { |
729 | u32 read; | 735 | u32 val; |
730 | __ew32(&adapter->hw, reg, write & mask); | 736 | __ew32(&adapter->hw, reg, write & mask); |
731 | read = __er32(&adapter->hw, reg); | 737 | val = __er32(&adapter->hw, reg); |
732 | if ((write & mask) != (read & mask)) { | 738 | if ((write & mask) != (val & mask)) { |
733 | ndev_err(adapter->netdev, "set/check reg %04X test failed: " | 739 | ndev_err(adapter->netdev, "set/check reg %04X test failed: " |
734 | "got 0x%08X expected 0x%08X\n", reg, (read & mask), | 740 | "got 0x%08X expected 0x%08X\n", reg, (val & mask), |
735 | (write & mask)); | 741 | (write & mask)); |
736 | *data = reg; | 742 | *data = reg; |
737 | return true; | 743 | return 1; |
738 | } | 744 | } |
739 | return false; | 745 | return 0; |
740 | } | 746 | } |
741 | 747 | #define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \ | |
742 | #define REG_PATTERN_TEST(R, M, W) \ | 748 | do { \ |
743 | do { \ | 749 | if (reg_pattern_test(adapter, data, reg, offset, mask, write)) \ |
744 | if (reg_pattern_test_array(adapter, data, R, 0, M, W)) \ | 750 | return 1; \ |
745 | return 1; \ | ||
746 | } while (0) | 751 | } while (0) |
752 | #define REG_PATTERN_TEST(reg, mask, write) \ | ||
753 | REG_PATTERN_TEST_ARRAY(reg, 0, mask, write) | ||
747 | 754 | ||
748 | #define REG_PATTERN_TEST_ARRAY(R, offset, M, W) \ | 755 | #define REG_SET_AND_CHECK(reg, mask, write) \ |
749 | do { \ | 756 | do { \ |
750 | if (reg_pattern_test_array(adapter, data, R, offset, M, W)) \ | 757 | if (reg_set_and_check(adapter, data, reg, mask, write)) \ |
751 | return 1; \ | 758 | return 1; \ |
752 | } while (0) | ||
753 | |||
754 | #define REG_SET_AND_CHECK(R, M, W) \ | ||
755 | do { \ | ||
756 | if (reg_set_and_check(adapter, data, R, M, W)) \ | ||
757 | return 1; \ | ||
758 | } while (0) | 759 | } while (0) |
759 | 760 | ||
760 | static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data) | 761 | static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data) |
@@ -1038,7 +1039,6 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter) | |||
1038 | struct pci_dev *pdev = adapter->pdev; | 1039 | struct pci_dev *pdev = adapter->pdev; |
1039 | struct e1000_hw *hw = &adapter->hw; | 1040 | struct e1000_hw *hw = &adapter->hw; |
1040 | u32 rctl; | 1041 | u32 rctl; |
1041 | int size; | ||
1042 | int i; | 1042 | int i; |
1043 | int ret_val; | 1043 | int ret_val; |
1044 | 1044 | ||
@@ -1047,13 +1047,13 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter) | |||
1047 | if (!tx_ring->count) | 1047 | if (!tx_ring->count) |
1048 | tx_ring->count = E1000_DEFAULT_TXD; | 1048 | tx_ring->count = E1000_DEFAULT_TXD; |
1049 | 1049 | ||
1050 | size = tx_ring->count * sizeof(struct e1000_buffer); | 1050 | tx_ring->buffer_info = kcalloc(tx_ring->count, |
1051 | tx_ring->buffer_info = kmalloc(size, GFP_KERNEL); | 1051 | sizeof(struct e1000_buffer), |
1052 | if (!tx_ring->buffer_info) { | 1052 | GFP_KERNEL); |
1053 | if (!(tx_ring->buffer_info)) { | ||
1053 | ret_val = 1; | 1054 | ret_val = 1; |
1054 | goto err_nomem; | 1055 | goto err_nomem; |
1055 | } | 1056 | } |
1056 | memset(tx_ring->buffer_info, 0, size); | ||
1057 | 1057 | ||
1058 | tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); | 1058 | tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); |
1059 | tx_ring->size = ALIGN(tx_ring->size, 4096); | 1059 | tx_ring->size = ALIGN(tx_ring->size, 4096); |
@@ -1063,21 +1063,17 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter) | |||
1063 | ret_val = 2; | 1063 | ret_val = 2; |
1064 | goto err_nomem; | 1064 | goto err_nomem; |
1065 | } | 1065 | } |
1066 | memset(tx_ring->desc, 0, tx_ring->size); | ||
1067 | tx_ring->next_to_use = 0; | 1066 | tx_ring->next_to_use = 0; |
1068 | tx_ring->next_to_clean = 0; | 1067 | tx_ring->next_to_clean = 0; |
1069 | 1068 | ||
1070 | ew32(TDBAL, | 1069 | ew32(TDBAL, ((u64) tx_ring->dma & 0x00000000FFFFFFFF)); |
1071 | ((u64) tx_ring->dma & 0x00000000FFFFFFFF)); | ||
1072 | ew32(TDBAH, ((u64) tx_ring->dma >> 32)); | 1070 | ew32(TDBAH, ((u64) tx_ring->dma >> 32)); |
1073 | ew32(TDLEN, | 1071 | ew32(TDLEN, tx_ring->count * sizeof(struct e1000_tx_desc)); |
1074 | tx_ring->count * sizeof(struct e1000_tx_desc)); | ||
1075 | ew32(TDH, 0); | 1072 | ew32(TDH, 0); |
1076 | ew32(TDT, 0); | 1073 | ew32(TDT, 0); |
1077 | ew32(TCTL, | 1074 | ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR | |
1078 | E1000_TCTL_PSP | E1000_TCTL_EN | | 1075 | E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT | |
1079 | E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT | | 1076 | E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT); |
1080 | E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT); | ||
1081 | 1077 | ||
1082 | for (i = 0; i < tx_ring->count; i++) { | 1078 | for (i = 0; i < tx_ring->count; i++) { |
1083 | struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i); | 1079 | struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i); |
@@ -1099,12 +1095,11 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter) | |||
1099 | ret_val = 4; | 1095 | ret_val = 4; |
1100 | goto err_nomem; | 1096 | goto err_nomem; |
1101 | } | 1097 | } |
1102 | tx_desc->buffer_addr = cpu_to_le64( | 1098 | tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma); |
1103 | tx_ring->buffer_info[i].dma); | ||
1104 | tx_desc->lower.data = cpu_to_le32(skb->len); | 1099 | tx_desc->lower.data = cpu_to_le32(skb->len); |
1105 | tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP | | 1100 | tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP | |
1106 | E1000_TXD_CMD_IFCS | | 1101 | E1000_TXD_CMD_IFCS | |
1107 | E1000_TXD_CMD_RPS); | 1102 | E1000_TXD_CMD_RS); |
1108 | tx_desc->upper.data = 0; | 1103 | tx_desc->upper.data = 0; |
1109 | } | 1104 | } |
1110 | 1105 | ||
@@ -1113,13 +1108,13 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter) | |||
1113 | if (!rx_ring->count) | 1108 | if (!rx_ring->count) |
1114 | rx_ring->count = E1000_DEFAULT_RXD; | 1109 | rx_ring->count = E1000_DEFAULT_RXD; |
1115 | 1110 | ||
1116 | size = rx_ring->count * sizeof(struct e1000_buffer); | 1111 | rx_ring->buffer_info = kcalloc(rx_ring->count, |
1117 | rx_ring->buffer_info = kmalloc(size, GFP_KERNEL); | 1112 | sizeof(struct e1000_buffer), |
1118 | if (!rx_ring->buffer_info) { | 1113 | GFP_KERNEL); |
1114 | if (!(rx_ring->buffer_info)) { | ||
1119 | ret_val = 5; | 1115 | ret_val = 5; |
1120 | goto err_nomem; | 1116 | goto err_nomem; |
1121 | } | 1117 | } |
1122 | memset(rx_ring->buffer_info, 0, size); | ||
1123 | 1118 | ||
1124 | rx_ring->size = rx_ring->count * sizeof(struct e1000_rx_desc); | 1119 | rx_ring->size = rx_ring->count * sizeof(struct e1000_rx_desc); |
1125 | rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size, | 1120 | rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size, |
@@ -1128,7 +1123,6 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter) | |||
1128 | ret_val = 6; | 1123 | ret_val = 6; |
1129 | goto err_nomem; | 1124 | goto err_nomem; |
1130 | } | 1125 | } |
1131 | memset(rx_ring->desc, 0, rx_ring->size); | ||
1132 | rx_ring->next_to_use = 0; | 1126 | rx_ring->next_to_use = 0; |
1133 | rx_ring->next_to_clean = 0; | 1127 | rx_ring->next_to_clean = 0; |
1134 | 1128 | ||
@@ -1140,6 +1134,8 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter) | |||
1140 | ew32(RDH, 0); | 1134 | ew32(RDH, 0); |
1141 | ew32(RDT, 0); | 1135 | ew32(RDT, 0); |
1142 | rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 | | 1136 | rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 | |
1137 | E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE | | ||
1138 | E1000_RCTL_SBP | E1000_RCTL_SECRC | | ||
1143 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | 1139 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | |
1144 | (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); | 1140 | (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); |
1145 | ew32(RCTL, rctl); | 1141 | ew32(RCTL, rctl); |
@@ -1203,7 +1199,8 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter) | |||
1203 | 1199 | ||
1204 | ctrl_reg = er32(CTRL); | 1200 | ctrl_reg = er32(CTRL); |
1205 | 1201 | ||
1206 | if (hw->phy.type == e1000_phy_ife) { | 1202 | switch (hw->phy.type) { |
1203 | case e1000_phy_ife: | ||
1207 | /* force 100, set loopback */ | 1204 | /* force 100, set loopback */ |
1208 | e1e_wphy(hw, PHY_CONTROL, 0x6100); | 1205 | e1e_wphy(hw, PHY_CONTROL, 0x6100); |
1209 | 1206 | ||
@@ -1213,9 +1210,11 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter) | |||
1213 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | 1210 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ |
1214 | E1000_CTRL_SPD_100 |/* Force Speed to 100 */ | 1211 | E1000_CTRL_SPD_100 |/* Force Speed to 100 */ |
1215 | E1000_CTRL_FD); /* Force Duplex to FULL */ | 1212 | E1000_CTRL_FD); /* Force Duplex to FULL */ |
1216 | } else { | 1213 | break; |
1214 | default: | ||
1217 | /* force 1000, set loopback */ | 1215 | /* force 1000, set loopback */ |
1218 | e1e_wphy(hw, PHY_CONTROL, 0x4140); | 1216 | e1e_wphy(hw, PHY_CONTROL, 0x4140); |
1217 | mdelay(250); | ||
1219 | 1218 | ||
1220 | /* Now set up the MAC to the same speed/duplex as the PHY. */ | 1219 | /* Now set up the MAC to the same speed/duplex as the PHY. */ |
1221 | ctrl_reg = er32(CTRL); | 1220 | ctrl_reg = er32(CTRL); |
@@ -1224,6 +1223,10 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter) | |||
1224 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | 1223 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ |
1225 | E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */ | 1224 | E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */ |
1226 | E1000_CTRL_FD); /* Force Duplex to FULL */ | 1225 | E1000_CTRL_FD); /* Force Duplex to FULL */ |
1226 | |||
1227 | if ((adapter->hw.mac.type == e1000_ich8lan) || | ||
1228 | (adapter->hw.mac.type == e1000_ich9lan)) | ||
1229 | ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */ | ||
1227 | } | 1230 | } |
1228 | 1231 | ||
1229 | if (hw->phy.media_type == e1000_media_type_copper && | 1232 | if (hw->phy.media_type == e1000_media_type_copper && |
@@ -1325,7 +1328,7 @@ static int e1000_set_es2lan_mac_loopback(struct e1000_adapter *adapter) | |||
1325 | #define KMRNCTRLSTA_OPMODE (0x1F << 16) | 1328 | #define KMRNCTRLSTA_OPMODE (0x1F << 16) |
1326 | #define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582 | 1329 | #define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582 |
1327 | ew32(KMRNCTRLSTA, | 1330 | ew32(KMRNCTRLSTA, |
1328 | (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII)); | 1331 | (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII)); |
1329 | 1332 | ||
1330 | return 0; | 1333 | return 0; |
1331 | } | 1334 | } |
@@ -1451,8 +1454,8 @@ static int e1000_run_loopback_test(struct e1000_adapter *adapter) | |||
1451 | l = 0; | 1454 | l = 0; |
1452 | for (j = 0; j <= lc; j++) { /* loop count loop */ | 1455 | for (j = 0; j <= lc; j++) { /* loop count loop */ |
1453 | for (i = 0; i < 64; i++) { /* send the packets */ | 1456 | for (i = 0; i < 64; i++) { /* send the packets */ |
1454 | e1000_create_lbtest_frame( | 1457 | e1000_create_lbtest_frame(tx_ring->buffer_info[k].skb, |
1455 | tx_ring->buffer_info[i].skb, 1024); | 1458 | 1024); |
1456 | pci_dma_sync_single_for_device(pdev, | 1459 | pci_dma_sync_single_for_device(pdev, |
1457 | tx_ring->buffer_info[k].dma, | 1460 | tx_ring->buffer_info[k].dma, |
1458 | tx_ring->buffer_info[k].length, | 1461 | tx_ring->buffer_info[k].length, |
@@ -1487,7 +1490,7 @@ static int e1000_run_loopback_test(struct e1000_adapter *adapter) | |||
1487 | ret_val = 13; /* ret_val is the same as mis-compare */ | 1490 | ret_val = 13; /* ret_val is the same as mis-compare */ |
1488 | break; | 1491 | break; |
1489 | } | 1492 | } |
1490 | if (jiffies >= (time + 2)) { | 1493 | if (jiffies >= (time + 20)) { |
1491 | ret_val = 14; /* error code for time out error */ | 1494 | ret_val = 14; /* error code for time out error */ |
1492 | break; | 1495 | break; |
1493 | } | 1496 | } |
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h index 0b4145a73229..53f1ac6327fa 100644 --- a/drivers/net/e1000e/hw.h +++ b/drivers/net/e1000e/hw.h | |||
@@ -93,6 +93,8 @@ enum e1e_registers { | |||
93 | E1000_RDH = 0x02810, /* Rx Descriptor Head - RW */ | 93 | E1000_RDH = 0x02810, /* Rx Descriptor Head - RW */ |
94 | E1000_RDT = 0x02818, /* Rx Descriptor Tail - RW */ | 94 | E1000_RDT = 0x02818, /* Rx Descriptor Tail - RW */ |
95 | E1000_RDTR = 0x02820, /* Rx Delay Timer - RW */ | 95 | E1000_RDTR = 0x02820, /* Rx Delay Timer - RW */ |
96 | E1000_RXDCTL_BASE = 0x02828, /* Rx Descriptor Control - RW */ | ||
97 | #define E1000_RXDCTL(_n) (E1000_RXDCTL_BASE + (_n << 8)) | ||
96 | E1000_RADV = 0x0282C, /* RX Interrupt Absolute Delay Timer - RW */ | 98 | E1000_RADV = 0x0282C, /* RX Interrupt Absolute Delay Timer - RW */ |
97 | 99 | ||
98 | /* Convenience macros | 100 | /* Convenience macros |
@@ -111,11 +113,11 @@ enum e1e_registers { | |||
111 | E1000_TDH = 0x03810, /* Tx Descriptor Head - RW */ | 113 | E1000_TDH = 0x03810, /* Tx Descriptor Head - RW */ |
112 | E1000_TDT = 0x03818, /* Tx Descriptor Tail - RW */ | 114 | E1000_TDT = 0x03818, /* Tx Descriptor Tail - RW */ |
113 | E1000_TIDV = 0x03820, /* Tx Interrupt Delay Value - RW */ | 115 | E1000_TIDV = 0x03820, /* Tx Interrupt Delay Value - RW */ |
114 | E1000_TXDCTL = 0x03828, /* Tx Descriptor Control - RW */ | 116 | E1000_TXDCTL_BASE = 0x03828, /* Tx Descriptor Control - RW */ |
117 | #define E1000_TXDCTL(_n) (E1000_TXDCTL_BASE + (_n << 8)) | ||
115 | E1000_TADV = 0x0382C, /* Tx Interrupt Absolute Delay Val - RW */ | 118 | E1000_TADV = 0x0382C, /* Tx Interrupt Absolute Delay Val - RW */ |
116 | E1000_TARC0 = 0x03840, /* Tx Arbitration Count (0) */ | 119 | E1000_TARC_BASE = 0x03840, /* Tx Arbitration Count (0) */ |
117 | E1000_TXDCTL1 = 0x03928, /* Tx Descriptor Control (1) - RW */ | 120 | #define E1000_TARC(_n) (E1000_TARC_BASE + (_n << 8)) |
118 | E1000_TARC1 = 0x03940, /* Tx Arbitration Count (1) */ | ||
119 | E1000_CRCERRS = 0x04000, /* CRC Error Count - R/clr */ | 121 | E1000_CRCERRS = 0x04000, /* CRC Error Count - R/clr */ |
120 | E1000_ALGNERRC = 0x04004, /* Alignment Error Count - R/clr */ | 122 | E1000_ALGNERRC = 0x04004, /* Alignment Error Count - R/clr */ |
121 | E1000_SYMERRS = 0x04008, /* Symbol Error Count - R/clr */ | 123 | E1000_SYMERRS = 0x04008, /* Symbol Error Count - R/clr */ |
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index e358a773e67a..768485dbb2c6 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -316,7 +316,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_adapter *adapter) | |||
316 | return 0; | 316 | return 0; |
317 | } | 317 | } |
318 | 318 | ||
319 | static s32 e1000_get_invariants_ich8lan(struct e1000_adapter *adapter) | 319 | static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter) |
320 | { | 320 | { |
321 | struct e1000_hw *hw = &adapter->hw; | 321 | struct e1000_hw *hw = &adapter->hw; |
322 | s32 rc; | 322 | s32 rc; |
@@ -1753,18 +1753,18 @@ static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw) | |||
1753 | ret_val = e1000_setup_link_ich8lan(hw); | 1753 | ret_val = e1000_setup_link_ich8lan(hw); |
1754 | 1754 | ||
1755 | /* Set the transmit descriptor write-back policy for both queues */ | 1755 | /* Set the transmit descriptor write-back policy for both queues */ |
1756 | txdctl = er32(TXDCTL); | 1756 | txdctl = er32(TXDCTL(0)); |
1757 | txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) | | 1757 | txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) | |
1758 | E1000_TXDCTL_FULL_TX_DESC_WB; | 1758 | E1000_TXDCTL_FULL_TX_DESC_WB; |
1759 | txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) | | 1759 | txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) | |
1760 | E1000_TXDCTL_MAX_TX_DESC_PREFETCH; | 1760 | E1000_TXDCTL_MAX_TX_DESC_PREFETCH; |
1761 | ew32(TXDCTL, txdctl); | 1761 | ew32(TXDCTL(0), txdctl); |
1762 | txdctl = er32(TXDCTL1); | 1762 | txdctl = er32(TXDCTL(1)); |
1763 | txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) | | 1763 | txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) | |
1764 | E1000_TXDCTL_FULL_TX_DESC_WB; | 1764 | E1000_TXDCTL_FULL_TX_DESC_WB; |
1765 | txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) | | 1765 | txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) | |
1766 | E1000_TXDCTL_MAX_TX_DESC_PREFETCH; | 1766 | E1000_TXDCTL_MAX_TX_DESC_PREFETCH; |
1767 | ew32(TXDCTL1, txdctl); | 1767 | ew32(TXDCTL(1), txdctl); |
1768 | 1768 | ||
1769 | /* | 1769 | /* |
1770 | * ICH8 has opposite polarity of no_snoop bits. | 1770 | * ICH8 has opposite polarity of no_snoop bits. |
@@ -1807,30 +1807,30 @@ static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw) | |||
1807 | ew32(CTRL_EXT, reg); | 1807 | ew32(CTRL_EXT, reg); |
1808 | 1808 | ||
1809 | /* Transmit Descriptor Control 0 */ | 1809 | /* Transmit Descriptor Control 0 */ |
1810 | reg = er32(TXDCTL); | 1810 | reg = er32(TXDCTL(0)); |
1811 | reg |= (1 << 22); | 1811 | reg |= (1 << 22); |
1812 | ew32(TXDCTL, reg); | 1812 | ew32(TXDCTL(0), reg); |
1813 | 1813 | ||
1814 | /* Transmit Descriptor Control 1 */ | 1814 | /* Transmit Descriptor Control 1 */ |
1815 | reg = er32(TXDCTL1); | 1815 | reg = er32(TXDCTL(1)); |
1816 | reg |= (1 << 22); | 1816 | reg |= (1 << 22); |
1817 | ew32(TXDCTL1, reg); | 1817 | ew32(TXDCTL(1), reg); |
1818 | 1818 | ||
1819 | /* Transmit Arbitration Control 0 */ | 1819 | /* Transmit Arbitration Control 0 */ |
1820 | reg = er32(TARC0); | 1820 | reg = er32(TARC(0)); |
1821 | if (hw->mac.type == e1000_ich8lan) | 1821 | if (hw->mac.type == e1000_ich8lan) |
1822 | reg |= (1 << 28) | (1 << 29); | 1822 | reg |= (1 << 28) | (1 << 29); |
1823 | reg |= (1 << 23) | (1 << 24) | (1 << 26) | (1 << 27); | 1823 | reg |= (1 << 23) | (1 << 24) | (1 << 26) | (1 << 27); |
1824 | ew32(TARC0, reg); | 1824 | ew32(TARC(0), reg); |
1825 | 1825 | ||
1826 | /* Transmit Arbitration Control 1 */ | 1826 | /* Transmit Arbitration Control 1 */ |
1827 | reg = er32(TARC1); | 1827 | reg = er32(TARC(1)); |
1828 | if (er32(TCTL) & E1000_TCTL_MULR) | 1828 | if (er32(TCTL) & E1000_TCTL_MULR) |
1829 | reg &= ~(1 << 28); | 1829 | reg &= ~(1 << 28); |
1830 | else | 1830 | else |
1831 | reg |= (1 << 28); | 1831 | reg |= (1 << 28); |
1832 | reg |= (1 << 24) | (1 << 26) | (1 << 30); | 1832 | reg |= (1 << 24) | (1 << 26) | (1 << 30); |
1833 | ew32(TARC1, reg); | 1833 | ew32(TARC(1), reg); |
1834 | 1834 | ||
1835 | /* Device Status */ | 1835 | /* Device Status */ |
1836 | if (hw->mac.type == e1000_ich8lan) { | 1836 | if (hw->mac.type == e1000_ich8lan) { |
@@ -2253,7 +2253,7 @@ struct e1000_info e1000_ich8_info = { | |||
2253 | | FLAG_HAS_FLASH | 2253 | | FLAG_HAS_FLASH |
2254 | | FLAG_APME_IN_WUC, | 2254 | | FLAG_APME_IN_WUC, |
2255 | .pba = 8, | 2255 | .pba = 8, |
2256 | .get_invariants = e1000_get_invariants_ich8lan, | 2256 | .get_variants = e1000_get_variants_ich8lan, |
2257 | .mac_ops = &ich8_mac_ops, | 2257 | .mac_ops = &ich8_mac_ops, |
2258 | .phy_ops = &ich8_phy_ops, | 2258 | .phy_ops = &ich8_phy_ops, |
2259 | .nvm_ops = &ich8_nvm_ops, | 2259 | .nvm_ops = &ich8_nvm_ops, |
@@ -2270,7 +2270,7 @@ struct e1000_info e1000_ich9_info = { | |||
2270 | | FLAG_HAS_FLASH | 2270 | | FLAG_HAS_FLASH |
2271 | | FLAG_APME_IN_WUC, | 2271 | | FLAG_APME_IN_WUC, |
2272 | .pba = 10, | 2272 | .pba = 10, |
2273 | .get_invariants = e1000_get_invariants_ich8lan, | 2273 | .get_variants = e1000_get_variants_ich8lan, |
2274 | .mac_ops = &ich8_mac_ops, | 2274 | .mac_ops = &ich8_mac_ops, |
2275 | .phy_ops = &ich8_phy_ops, | 2275 | .phy_ops = &ich8_phy_ops, |
2276 | .nvm_ops = &ich8_nvm_ops, | 2276 | .nvm_ops = &ich8_nvm_ops, |
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c index ea3ff6369c86..f1f4e9dfd0a0 100644 --- a/drivers/net/e1000e/lib.c +++ b/drivers/net/e1000e/lib.c | |||
@@ -2477,7 +2477,7 @@ bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw) | |||
2477 | return ret_val; | 2477 | return ret_val; |
2478 | } | 2478 | } |
2479 | 2479 | ||
2480 | s32 e1000e_read_part_num(struct e1000_hw *hw, u32 *part_num) | 2480 | s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num) |
2481 | { | 2481 | { |
2482 | s32 ret_val; | 2482 | s32 ret_val; |
2483 | u16 nvm_data; | 2483 | u16 nvm_data; |
@@ -2487,14 +2487,14 @@ s32 e1000e_read_part_num(struct e1000_hw *hw, u32 *part_num) | |||
2487 | hw_dbg(hw, "NVM Read Error\n"); | 2487 | hw_dbg(hw, "NVM Read Error\n"); |
2488 | return ret_val; | 2488 | return ret_val; |
2489 | } | 2489 | } |
2490 | *part_num = (u32)(nvm_data << 16); | 2490 | *pba_num = (u32)(nvm_data << 16); |
2491 | 2491 | ||
2492 | ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_1, 1, &nvm_data); | 2492 | ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_1, 1, &nvm_data); |
2493 | if (ret_val) { | 2493 | if (ret_val) { |
2494 | hw_dbg(hw, "NVM Read Error\n"); | 2494 | hw_dbg(hw, "NVM Read Error\n"); |
2495 | return ret_val; | 2495 | return ret_val; |
2496 | } | 2496 | } |
2497 | *part_num |= nvm_data; | 2497 | *pba_num |= nvm_data; |
2498 | 2498 | ||
2499 | return 0; | 2499 | return 0; |
2500 | } | 2500 | } |
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index d70bde03619e..c8dc47fd132a 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c | |||
@@ -1639,24 +1639,24 @@ static void e1000_configure_tx(struct e1000_adapter *adapter) | |||
1639 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); | 1639 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1640 | 1640 | ||
1641 | if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { | 1641 | if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { |
1642 | tarc = er32(TARC0); | 1642 | tarc = er32(TARC(0)); |
1643 | /* | 1643 | /* |
1644 | * set the speed mode bit, we'll clear it if we're not at | 1644 | * set the speed mode bit, we'll clear it if we're not at |
1645 | * gigabit link later | 1645 | * gigabit link later |
1646 | */ | 1646 | */ |
1647 | #define SPEED_MODE_BIT (1 << 21) | 1647 | #define SPEED_MODE_BIT (1 << 21) |
1648 | tarc |= SPEED_MODE_BIT; | 1648 | tarc |= SPEED_MODE_BIT; |
1649 | ew32(TARC0, tarc); | 1649 | ew32(TARC(0), tarc); |
1650 | } | 1650 | } |
1651 | 1651 | ||
1652 | /* errata: program both queues to unweighted RR */ | 1652 | /* errata: program both queues to unweighted RR */ |
1653 | if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { | 1653 | if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { |
1654 | tarc = er32(TARC0); | 1654 | tarc = er32(TARC(0)); |
1655 | tarc |= 1; | 1655 | tarc |= 1; |
1656 | ew32(TARC0, tarc); | 1656 | ew32(TARC(0), tarc); |
1657 | tarc = er32(TARC1); | 1657 | tarc = er32(TARC(1)); |
1658 | tarc |= 1; | 1658 | tarc |= 1; |
1659 | ew32(TARC1, tarc); | 1659 | ew32(TARC(1), tarc); |
1660 | } | 1660 | } |
1661 | 1661 | ||
1662 | e1000e_config_collision_dist(hw); | 1662 | e1000e_config_collision_dist(hw); |
@@ -2775,9 +2775,9 @@ static void e1000_watchdog_task(struct work_struct *work) | |||
2775 | if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && | 2775 | if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && |
2776 | !txb2b) { | 2776 | !txb2b) { |
2777 | u32 tarc0; | 2777 | u32 tarc0; |
2778 | tarc0 = er32(TARC0); | 2778 | tarc0 = er32(TARC(0)); |
2779 | tarc0 &= ~SPEED_MODE_BIT; | 2779 | tarc0 &= ~SPEED_MODE_BIT; |
2780 | ew32(TARC0, tarc0); | 2780 | ew32(TARC(0), tarc0); |
2781 | } | 2781 | } |
2782 | 2782 | ||
2783 | /* | 2783 | /* |
@@ -3824,7 +3824,7 @@ static void e1000_print_device_info(struct e1000_adapter *adapter) | |||
3824 | { | 3824 | { |
3825 | struct e1000_hw *hw = &adapter->hw; | 3825 | struct e1000_hw *hw = &adapter->hw; |
3826 | struct net_device *netdev = adapter->netdev; | 3826 | struct net_device *netdev = adapter->netdev; |
3827 | u32 part_num; | 3827 | u32 pba_num; |
3828 | 3828 | ||
3829 | /* print bus type/speed/width info */ | 3829 | /* print bus type/speed/width info */ |
3830 | ndev_info(netdev, "(PCI Express:2.5GB/s:%s) " | 3830 | ndev_info(netdev, "(PCI Express:2.5GB/s:%s) " |
@@ -3839,10 +3839,10 @@ static void e1000_print_device_info(struct e1000_adapter *adapter) | |||
3839 | ndev_info(netdev, "Intel(R) PRO/%s Network Connection\n", | 3839 | ndev_info(netdev, "Intel(R) PRO/%s Network Connection\n", |
3840 | (hw->phy.type == e1000_phy_ife) | 3840 | (hw->phy.type == e1000_phy_ife) |
3841 | ? "10/100" : "1000"); | 3841 | ? "10/100" : "1000"); |
3842 | e1000e_read_part_num(hw, &part_num); | 3842 | e1000e_read_pba_num(hw, &pba_num); |
3843 | ndev_info(netdev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n", | 3843 | ndev_info(netdev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n", |
3844 | hw->mac.type, hw->phy.type, | 3844 | hw->mac.type, hw->phy.type, |
3845 | (part_num >> 8), (part_num & 0xff)); | 3845 | (pba_num >> 8), (pba_num & 0xff)); |
3846 | } | 3846 | } |
3847 | 3847 | ||
3848 | /** | 3848 | /** |
@@ -3974,7 +3974,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev, | |||
3974 | memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); | 3974 | memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); |
3975 | memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); | 3975 | memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); |
3976 | 3976 | ||
3977 | err = ei->get_invariants(adapter); | 3977 | err = ei->get_variants(adapter); |
3978 | if (err) | 3978 | if (err) |
3979 | goto err_hw_init; | 3979 | goto err_hw_init; |
3980 | 3980 | ||