diff options
Diffstat (limited to 'drivers/net/e1000e/phy.c')
-rw-r--r-- | drivers/net/e1000e/phy.c | 92 |
1 files changed, 46 insertions, 46 deletions
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c index 95a8196cf44c..cff1df204031 100644 --- a/drivers/net/e1000e/phy.c +++ b/drivers/net/e1000e/phy.c | |||
@@ -212,7 +212,7 @@ s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) | |||
212 | u32 i, mdic = 0; | 212 | u32 i, mdic = 0; |
213 | 213 | ||
214 | if (offset > MAX_PHY_REG_ADDRESS) { | 214 | if (offset > MAX_PHY_REG_ADDRESS) { |
215 | hw_dbg(hw, "PHY Address %d is out of range\n", offset); | 215 | e_dbg("PHY Address %d is out of range\n", offset); |
216 | return -E1000_ERR_PARAM; | 216 | return -E1000_ERR_PARAM; |
217 | } | 217 | } |
218 | 218 | ||
@@ -239,11 +239,11 @@ s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) | |||
239 | break; | 239 | break; |
240 | } | 240 | } |
241 | if (!(mdic & E1000_MDIC_READY)) { | 241 | if (!(mdic & E1000_MDIC_READY)) { |
242 | hw_dbg(hw, "MDI Read did not complete\n"); | 242 | e_dbg("MDI Read did not complete\n"); |
243 | return -E1000_ERR_PHY; | 243 | return -E1000_ERR_PHY; |
244 | } | 244 | } |
245 | if (mdic & E1000_MDIC_ERROR) { | 245 | if (mdic & E1000_MDIC_ERROR) { |
246 | hw_dbg(hw, "MDI Error\n"); | 246 | e_dbg("MDI Error\n"); |
247 | return -E1000_ERR_PHY; | 247 | return -E1000_ERR_PHY; |
248 | } | 248 | } |
249 | *data = (u16) mdic; | 249 | *data = (u16) mdic; |
@@ -265,7 +265,7 @@ s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) | |||
265 | u32 i, mdic = 0; | 265 | u32 i, mdic = 0; |
266 | 266 | ||
267 | if (offset > MAX_PHY_REG_ADDRESS) { | 267 | if (offset > MAX_PHY_REG_ADDRESS) { |
268 | hw_dbg(hw, "PHY Address %d is out of range\n", offset); | 268 | e_dbg("PHY Address %d is out of range\n", offset); |
269 | return -E1000_ERR_PARAM; | 269 | return -E1000_ERR_PARAM; |
270 | } | 270 | } |
271 | 271 | ||
@@ -293,11 +293,11 @@ s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) | |||
293 | break; | 293 | break; |
294 | } | 294 | } |
295 | if (!(mdic & E1000_MDIC_READY)) { | 295 | if (!(mdic & E1000_MDIC_READY)) { |
296 | hw_dbg(hw, "MDI Write did not complete\n"); | 296 | e_dbg("MDI Write did not complete\n"); |
297 | return -E1000_ERR_PHY; | 297 | return -E1000_ERR_PHY; |
298 | } | 298 | } |
299 | if (mdic & E1000_MDIC_ERROR) { | 299 | if (mdic & E1000_MDIC_ERROR) { |
300 | hw_dbg(hw, "MDI Error\n"); | 300 | e_dbg("MDI Error\n"); |
301 | return -E1000_ERR_PHY; | 301 | return -E1000_ERR_PHY; |
302 | } | 302 | } |
303 | 303 | ||
@@ -786,7 +786,7 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw) | |||
786 | /* Commit the changes. */ | 786 | /* Commit the changes. */ |
787 | ret_val = e1000e_commit_phy(hw); | 787 | ret_val = e1000e_commit_phy(hw); |
788 | if (ret_val) { | 788 | if (ret_val) { |
789 | hw_dbg(hw, "Error committing the PHY changes\n"); | 789 | e_dbg("Error committing the PHY changes\n"); |
790 | return ret_val; | 790 | return ret_val; |
791 | } | 791 | } |
792 | 792 | ||
@@ -823,7 +823,7 @@ s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw) | |||
823 | 823 | ||
824 | ret_val = e1000_phy_hw_reset(hw); | 824 | ret_val = e1000_phy_hw_reset(hw); |
825 | if (ret_val) { | 825 | if (ret_val) { |
826 | hw_dbg(hw, "Error resetting the PHY.\n"); | 826 | e_dbg("Error resetting the PHY.\n"); |
827 | return ret_val; | 827 | return ret_val; |
828 | } | 828 | } |
829 | 829 | ||
@@ -836,7 +836,7 @@ s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw) | |||
836 | /* disable lplu d0 during driver init */ | 836 | /* disable lplu d0 during driver init */ |
837 | ret_val = e1000_set_d0_lplu_state(hw, 0); | 837 | ret_val = e1000_set_d0_lplu_state(hw, 0); |
838 | if (ret_val) { | 838 | if (ret_val) { |
839 | hw_dbg(hw, "Error Disabling LPLU D0\n"); | 839 | e_dbg("Error Disabling LPLU D0\n"); |
840 | return ret_val; | 840 | return ret_val; |
841 | } | 841 | } |
842 | /* Configure mdi-mdix settings */ | 842 | /* Configure mdi-mdix settings */ |
@@ -972,39 +972,39 @@ static s32 e1000_phy_setup_autoneg(struct e1000_hw *hw) | |||
972 | NWAY_AR_10T_HD_CAPS); | 972 | NWAY_AR_10T_HD_CAPS); |
973 | mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS); | 973 | mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS); |
974 | 974 | ||
975 | hw_dbg(hw, "autoneg_advertised %x\n", phy->autoneg_advertised); | 975 | e_dbg("autoneg_advertised %x\n", phy->autoneg_advertised); |
976 | 976 | ||
977 | /* Do we want to advertise 10 Mb Half Duplex? */ | 977 | /* Do we want to advertise 10 Mb Half Duplex? */ |
978 | if (phy->autoneg_advertised & ADVERTISE_10_HALF) { | 978 | if (phy->autoneg_advertised & ADVERTISE_10_HALF) { |
979 | hw_dbg(hw, "Advertise 10mb Half duplex\n"); | 979 | e_dbg("Advertise 10mb Half duplex\n"); |
980 | mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS; | 980 | mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS; |
981 | } | 981 | } |
982 | 982 | ||
983 | /* Do we want to advertise 10 Mb Full Duplex? */ | 983 | /* Do we want to advertise 10 Mb Full Duplex? */ |
984 | if (phy->autoneg_advertised & ADVERTISE_10_FULL) { | 984 | if (phy->autoneg_advertised & ADVERTISE_10_FULL) { |
985 | hw_dbg(hw, "Advertise 10mb Full duplex\n"); | 985 | e_dbg("Advertise 10mb Full duplex\n"); |
986 | mii_autoneg_adv_reg |= NWAY_AR_10T_FD_CAPS; | 986 | mii_autoneg_adv_reg |= NWAY_AR_10T_FD_CAPS; |
987 | } | 987 | } |
988 | 988 | ||
989 | /* Do we want to advertise 100 Mb Half Duplex? */ | 989 | /* Do we want to advertise 100 Mb Half Duplex? */ |
990 | if (phy->autoneg_advertised & ADVERTISE_100_HALF) { | 990 | if (phy->autoneg_advertised & ADVERTISE_100_HALF) { |
991 | hw_dbg(hw, "Advertise 100mb Half duplex\n"); | 991 | e_dbg("Advertise 100mb Half duplex\n"); |
992 | mii_autoneg_adv_reg |= NWAY_AR_100TX_HD_CAPS; | 992 | mii_autoneg_adv_reg |= NWAY_AR_100TX_HD_CAPS; |
993 | } | 993 | } |
994 | 994 | ||
995 | /* Do we want to advertise 100 Mb Full Duplex? */ | 995 | /* Do we want to advertise 100 Mb Full Duplex? */ |
996 | if (phy->autoneg_advertised & ADVERTISE_100_FULL) { | 996 | if (phy->autoneg_advertised & ADVERTISE_100_FULL) { |
997 | hw_dbg(hw, "Advertise 100mb Full duplex\n"); | 997 | e_dbg("Advertise 100mb Full duplex\n"); |
998 | mii_autoneg_adv_reg |= NWAY_AR_100TX_FD_CAPS; | 998 | mii_autoneg_adv_reg |= NWAY_AR_100TX_FD_CAPS; |
999 | } | 999 | } |
1000 | 1000 | ||
1001 | /* We do not allow the Phy to advertise 1000 Mb Half Duplex */ | 1001 | /* We do not allow the Phy to advertise 1000 Mb Half Duplex */ |
1002 | if (phy->autoneg_advertised & ADVERTISE_1000_HALF) | 1002 | if (phy->autoneg_advertised & ADVERTISE_1000_HALF) |
1003 | hw_dbg(hw, "Advertise 1000mb Half duplex request denied!\n"); | 1003 | e_dbg("Advertise 1000mb Half duplex request denied!\n"); |
1004 | 1004 | ||
1005 | /* Do we want to advertise 1000 Mb Full Duplex? */ | 1005 | /* Do we want to advertise 1000 Mb Full Duplex? */ |
1006 | if (phy->autoneg_advertised & ADVERTISE_1000_FULL) { | 1006 | if (phy->autoneg_advertised & ADVERTISE_1000_FULL) { |
1007 | hw_dbg(hw, "Advertise 1000mb Full duplex\n"); | 1007 | e_dbg("Advertise 1000mb Full duplex\n"); |
1008 | mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS; | 1008 | mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS; |
1009 | } | 1009 | } |
1010 | 1010 | ||
@@ -1063,7 +1063,7 @@ static s32 e1000_phy_setup_autoneg(struct e1000_hw *hw) | |||
1063 | mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); | 1063 | mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); |
1064 | break; | 1064 | break; |
1065 | default: | 1065 | default: |
1066 | hw_dbg(hw, "Flow control param set incorrectly\n"); | 1066 | e_dbg("Flow control param set incorrectly\n"); |
1067 | ret_val = -E1000_ERR_CONFIG; | 1067 | ret_val = -E1000_ERR_CONFIG; |
1068 | return ret_val; | 1068 | return ret_val; |
1069 | } | 1069 | } |
@@ -1072,7 +1072,7 @@ static s32 e1000_phy_setup_autoneg(struct e1000_hw *hw) | |||
1072 | if (ret_val) | 1072 | if (ret_val) |
1073 | return ret_val; | 1073 | return ret_val; |
1074 | 1074 | ||
1075 | hw_dbg(hw, "Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); | 1075 | e_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); |
1076 | 1076 | ||
1077 | if (phy->autoneg_mask & ADVERTISE_1000_FULL) { | 1077 | if (phy->autoneg_mask & ADVERTISE_1000_FULL) { |
1078 | ret_val = e1e_wphy(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg); | 1078 | ret_val = e1e_wphy(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg); |
@@ -1109,13 +1109,13 @@ static s32 e1000_copper_link_autoneg(struct e1000_hw *hw) | |||
1109 | if (phy->autoneg_advertised == 0) | 1109 | if (phy->autoneg_advertised == 0) |
1110 | phy->autoneg_advertised = phy->autoneg_mask; | 1110 | phy->autoneg_advertised = phy->autoneg_mask; |
1111 | 1111 | ||
1112 | hw_dbg(hw, "Reconfiguring auto-neg advertisement params\n"); | 1112 | e_dbg("Reconfiguring auto-neg advertisement params\n"); |
1113 | ret_val = e1000_phy_setup_autoneg(hw); | 1113 | ret_val = e1000_phy_setup_autoneg(hw); |
1114 | if (ret_val) { | 1114 | if (ret_val) { |
1115 | hw_dbg(hw, "Error Setting up Auto-Negotiation\n"); | 1115 | e_dbg("Error Setting up Auto-Negotiation\n"); |
1116 | return ret_val; | 1116 | return ret_val; |
1117 | } | 1117 | } |
1118 | hw_dbg(hw, "Restarting Auto-Neg\n"); | 1118 | e_dbg("Restarting Auto-Neg\n"); |
1119 | 1119 | ||
1120 | /* | 1120 | /* |
1121 | * Restart auto-negotiation by setting the Auto Neg Enable bit and | 1121 | * Restart auto-negotiation by setting the Auto Neg Enable bit and |
@@ -1137,7 +1137,7 @@ static s32 e1000_copper_link_autoneg(struct e1000_hw *hw) | |||
1137 | if (phy->autoneg_wait_to_complete) { | 1137 | if (phy->autoneg_wait_to_complete) { |
1138 | ret_val = e1000_wait_autoneg(hw); | 1138 | ret_val = e1000_wait_autoneg(hw); |
1139 | if (ret_val) { | 1139 | if (ret_val) { |
1140 | hw_dbg(hw, "Error while waiting for " | 1140 | e_dbg("Error while waiting for " |
1141 | "autoneg to complete\n"); | 1141 | "autoneg to complete\n"); |
1142 | return ret_val; | 1142 | return ret_val; |
1143 | } | 1143 | } |
@@ -1175,10 +1175,10 @@ s32 e1000e_setup_copper_link(struct e1000_hw *hw) | |||
1175 | * PHY will be set to 10H, 10F, 100H or 100F | 1175 | * PHY will be set to 10H, 10F, 100H or 100F |
1176 | * depending on user settings. | 1176 | * depending on user settings. |
1177 | */ | 1177 | */ |
1178 | hw_dbg(hw, "Forcing Speed and Duplex\n"); | 1178 | e_dbg("Forcing Speed and Duplex\n"); |
1179 | ret_val = e1000_phy_force_speed_duplex(hw); | 1179 | ret_val = e1000_phy_force_speed_duplex(hw); |
1180 | if (ret_val) { | 1180 | if (ret_val) { |
1181 | hw_dbg(hw, "Error Forcing Speed and Duplex\n"); | 1181 | e_dbg("Error Forcing Speed and Duplex\n"); |
1182 | return ret_val; | 1182 | return ret_val; |
1183 | } | 1183 | } |
1184 | } | 1184 | } |
@@ -1195,11 +1195,11 @@ s32 e1000e_setup_copper_link(struct e1000_hw *hw) | |||
1195 | return ret_val; | 1195 | return ret_val; |
1196 | 1196 | ||
1197 | if (link) { | 1197 | if (link) { |
1198 | hw_dbg(hw, "Valid link established!!!\n"); | 1198 | e_dbg("Valid link established!!!\n"); |
1199 | e1000e_config_collision_dist(hw); | 1199 | e1000e_config_collision_dist(hw); |
1200 | ret_val = e1000e_config_fc_after_link_up(hw); | 1200 | ret_val = e1000e_config_fc_after_link_up(hw); |
1201 | } else { | 1201 | } else { |
1202 | hw_dbg(hw, "Unable to establish link!!!\n"); | 1202 | e_dbg("Unable to establish link!!!\n"); |
1203 | } | 1203 | } |
1204 | 1204 | ||
1205 | return ret_val; | 1205 | return ret_val; |
@@ -1245,12 +1245,12 @@ s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw) | |||
1245 | if (ret_val) | 1245 | if (ret_val) |
1246 | return ret_val; | 1246 | return ret_val; |
1247 | 1247 | ||
1248 | hw_dbg(hw, "IGP PSCR: %X\n", phy_data); | 1248 | e_dbg("IGP PSCR: %X\n", phy_data); |
1249 | 1249 | ||
1250 | udelay(1); | 1250 | udelay(1); |
1251 | 1251 | ||
1252 | if (phy->autoneg_wait_to_complete) { | 1252 | if (phy->autoneg_wait_to_complete) { |
1253 | hw_dbg(hw, "Waiting for forced speed/duplex link on IGP phy.\n"); | 1253 | e_dbg("Waiting for forced speed/duplex link on IGP phy.\n"); |
1254 | 1254 | ||
1255 | ret_val = e1000e_phy_has_link_generic(hw, | 1255 | ret_val = e1000e_phy_has_link_generic(hw, |
1256 | PHY_FORCE_LIMIT, | 1256 | PHY_FORCE_LIMIT, |
@@ -1260,7 +1260,7 @@ s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw) | |||
1260 | return ret_val; | 1260 | return ret_val; |
1261 | 1261 | ||
1262 | if (!link) | 1262 | if (!link) |
1263 | hw_dbg(hw, "Link taking longer than expected.\n"); | 1263 | e_dbg("Link taking longer than expected.\n"); |
1264 | 1264 | ||
1265 | /* Try once more */ | 1265 | /* Try once more */ |
1266 | ret_val = e1000e_phy_has_link_generic(hw, | 1266 | ret_val = e1000e_phy_has_link_generic(hw, |
@@ -1304,7 +1304,7 @@ s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw) | |||
1304 | if (ret_val) | 1304 | if (ret_val) |
1305 | return ret_val; | 1305 | return ret_val; |
1306 | 1306 | ||
1307 | hw_dbg(hw, "M88E1000 PSCR: %X\n", phy_data); | 1307 | e_dbg("M88E1000 PSCR: %X\n", phy_data); |
1308 | 1308 | ||
1309 | ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data); | 1309 | ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data); |
1310 | if (ret_val) | 1310 | if (ret_val) |
@@ -1322,7 +1322,7 @@ s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw) | |||
1322 | return ret_val; | 1322 | return ret_val; |
1323 | 1323 | ||
1324 | if (phy->autoneg_wait_to_complete) { | 1324 | if (phy->autoneg_wait_to_complete) { |
1325 | hw_dbg(hw, "Waiting for forced speed/duplex link on M88 phy.\n"); | 1325 | e_dbg("Waiting for forced speed/duplex link on M88 phy.\n"); |
1326 | 1326 | ||
1327 | ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT, | 1327 | ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT, |
1328 | 100000, &link); | 1328 | 100000, &link); |
@@ -1413,11 +1413,11 @@ void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl) | |||
1413 | if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) { | 1413 | if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) { |
1414 | ctrl &= ~E1000_CTRL_FD; | 1414 | ctrl &= ~E1000_CTRL_FD; |
1415 | *phy_ctrl &= ~MII_CR_FULL_DUPLEX; | 1415 | *phy_ctrl &= ~MII_CR_FULL_DUPLEX; |
1416 | hw_dbg(hw, "Half Duplex\n"); | 1416 | e_dbg("Half Duplex\n"); |
1417 | } else { | 1417 | } else { |
1418 | ctrl |= E1000_CTRL_FD; | 1418 | ctrl |= E1000_CTRL_FD; |
1419 | *phy_ctrl |= MII_CR_FULL_DUPLEX; | 1419 | *phy_ctrl |= MII_CR_FULL_DUPLEX; |
1420 | hw_dbg(hw, "Full Duplex\n"); | 1420 | e_dbg("Full Duplex\n"); |
1421 | } | 1421 | } |
1422 | 1422 | ||
1423 | /* Forcing 10mb or 100mb? */ | 1423 | /* Forcing 10mb or 100mb? */ |
@@ -1425,12 +1425,12 @@ void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl) | |||
1425 | ctrl |= E1000_CTRL_SPD_100; | 1425 | ctrl |= E1000_CTRL_SPD_100; |
1426 | *phy_ctrl |= MII_CR_SPEED_100; | 1426 | *phy_ctrl |= MII_CR_SPEED_100; |
1427 | *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_10); | 1427 | *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_10); |
1428 | hw_dbg(hw, "Forcing 100mb\n"); | 1428 | e_dbg("Forcing 100mb\n"); |
1429 | } else { | 1429 | } else { |
1430 | ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100); | 1430 | ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100); |
1431 | *phy_ctrl |= MII_CR_SPEED_10; | 1431 | *phy_ctrl |= MII_CR_SPEED_10; |
1432 | *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_100); | 1432 | *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_100); |
1433 | hw_dbg(hw, "Forcing 10mb\n"); | 1433 | e_dbg("Forcing 10mb\n"); |
1434 | } | 1434 | } |
1435 | 1435 | ||
1436 | e1000e_config_collision_dist(hw); | 1436 | e1000e_config_collision_dist(hw); |
@@ -1826,7 +1826,7 @@ s32 e1000e_get_phy_info_m88(struct e1000_hw *hw) | |||
1826 | bool link; | 1826 | bool link; |
1827 | 1827 | ||
1828 | if (hw->phy.media_type != e1000_media_type_copper) { | 1828 | if (hw->phy.media_type != e1000_media_type_copper) { |
1829 | hw_dbg(hw, "Phy info is only valid for copper media\n"); | 1829 | e_dbg("Phy info is only valid for copper media\n"); |
1830 | return -E1000_ERR_CONFIG; | 1830 | return -E1000_ERR_CONFIG; |
1831 | } | 1831 | } |
1832 | 1832 | ||
@@ -1835,7 +1835,7 @@ s32 e1000e_get_phy_info_m88(struct e1000_hw *hw) | |||
1835 | return ret_val; | 1835 | return ret_val; |
1836 | 1836 | ||
1837 | if (!link) { | 1837 | if (!link) { |
1838 | hw_dbg(hw, "Phy info is only valid if link is up\n"); | 1838 | e_dbg("Phy info is only valid if link is up\n"); |
1839 | return -E1000_ERR_CONFIG; | 1839 | return -E1000_ERR_CONFIG; |
1840 | } | 1840 | } |
1841 | 1841 | ||
@@ -1903,7 +1903,7 @@ s32 e1000e_get_phy_info_igp(struct e1000_hw *hw) | |||
1903 | return ret_val; | 1903 | return ret_val; |
1904 | 1904 | ||
1905 | if (!link) { | 1905 | if (!link) { |
1906 | hw_dbg(hw, "Phy info is only valid if link is up\n"); | 1906 | e_dbg("Phy info is only valid if link is up\n"); |
1907 | return -E1000_ERR_CONFIG; | 1907 | return -E1000_ERR_CONFIG; |
1908 | } | 1908 | } |
1909 | 1909 | ||
@@ -2031,7 +2031,7 @@ s32 e1000e_get_cfg_done(struct e1000_hw *hw) | |||
2031 | **/ | 2031 | **/ |
2032 | s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw) | 2032 | s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw) |
2033 | { | 2033 | { |
2034 | hw_dbg(hw, "Running IGP 3 PHY init script\n"); | 2034 | e_dbg("Running IGP 3 PHY init script\n"); |
2035 | 2035 | ||
2036 | /* PHY init IGP 3 */ | 2036 | /* PHY init IGP 3 */ |
2037 | /* Enable rise/fall, 10-mode work in class-A */ | 2037 | /* Enable rise/fall, 10-mode work in class-A */ |
@@ -2474,7 +2474,7 @@ static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, | |||
2474 | /* Gig must be disabled for MDIO accesses to page 800 */ | 2474 | /* Gig must be disabled for MDIO accesses to page 800 */ |
2475 | if ((hw->mac.type == e1000_pchlan) && | 2475 | if ((hw->mac.type == e1000_pchlan) && |
2476 | (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE))) | 2476 | (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE))) |
2477 | hw_dbg(hw, "Attempting to access page 800 while gig enabled\n"); | 2477 | e_dbg("Attempting to access page 800 while gig enabled\n"); |
2478 | 2478 | ||
2479 | /* All operations in this function are phy address 1 */ | 2479 | /* All operations in this function are phy address 1 */ |
2480 | hw->phy.addr = 1; | 2480 | hw->phy.addr = 1; |
@@ -2884,7 +2884,7 @@ static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, | |||
2884 | /* masking with 0x3F to remove the page from offset */ | 2884 | /* masking with 0x3F to remove the page from offset */ |
2885 | ret_val = e1000e_write_phy_reg_mdic(hw, addr_reg, (u16)offset & 0x3F); | 2885 | ret_val = e1000e_write_phy_reg_mdic(hw, addr_reg, (u16)offset & 0x3F); |
2886 | if (ret_val) { | 2886 | if (ret_val) { |
2887 | hw_dbg(hw, "Could not write PHY the HV address register\n"); | 2887 | e_dbg("Could not write PHY the HV address register\n"); |
2888 | goto out; | 2888 | goto out; |
2889 | } | 2889 | } |
2890 | 2890 | ||
@@ -2895,7 +2895,7 @@ static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, | |||
2895 | ret_val = e1000e_write_phy_reg_mdic(hw, data_reg, *data); | 2895 | ret_val = e1000e_write_phy_reg_mdic(hw, data_reg, *data); |
2896 | 2896 | ||
2897 | if (ret_val) { | 2897 | if (ret_val) { |
2898 | hw_dbg(hw, "Could not read data value from HV data register\n"); | 2898 | e_dbg("Could not read data value from HV data register\n"); |
2899 | goto out; | 2899 | goto out; |
2900 | } | 2900 | } |
2901 | 2901 | ||
@@ -3021,12 +3021,12 @@ s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw) | |||
3021 | if (ret_val) | 3021 | if (ret_val) |
3022 | goto out; | 3022 | goto out; |
3023 | 3023 | ||
3024 | hw_dbg(hw, "I82577_PHY_CTRL_2: %X\n", phy_data); | 3024 | e_dbg("I82577_PHY_CTRL_2: %X\n", phy_data); |
3025 | 3025 | ||
3026 | udelay(1); | 3026 | udelay(1); |
3027 | 3027 | ||
3028 | if (phy->autoneg_wait_to_complete) { | 3028 | if (phy->autoneg_wait_to_complete) { |
3029 | hw_dbg(hw, "Waiting for forced speed/duplex link on 82577 phy\n"); | 3029 | e_dbg("Waiting for forced speed/duplex link on 82577 phy\n"); |
3030 | 3030 | ||
3031 | ret_val = e1000e_phy_has_link_generic(hw, | 3031 | ret_val = e1000e_phy_has_link_generic(hw, |
3032 | PHY_FORCE_LIMIT, | 3032 | PHY_FORCE_LIMIT, |
@@ -3036,7 +3036,7 @@ s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw) | |||
3036 | goto out; | 3036 | goto out; |
3037 | 3037 | ||
3038 | if (!link) | 3038 | if (!link) |
3039 | hw_dbg(hw, "Link taking longer than expected.\n"); | 3039 | e_dbg("Link taking longer than expected.\n"); |
3040 | 3040 | ||
3041 | /* Try once more */ | 3041 | /* Try once more */ |
3042 | ret_val = e1000e_phy_has_link_generic(hw, | 3042 | ret_val = e1000e_phy_has_link_generic(hw, |
@@ -3072,7 +3072,7 @@ s32 e1000_get_phy_info_82577(struct e1000_hw *hw) | |||
3072 | goto out; | 3072 | goto out; |
3073 | 3073 | ||
3074 | if (!link) { | 3074 | if (!link) { |
3075 | hw_dbg(hw, "Phy info is only valid if link is up\n"); | 3075 | e_dbg("Phy info is only valid if link is up\n"); |
3076 | ret_val = -E1000_ERR_CONFIG; | 3076 | ret_val = -E1000_ERR_CONFIG; |
3077 | goto out; | 3077 | goto out; |
3078 | } | 3078 | } |