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path: root/drivers/net/e1000e/phy.c
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Diffstat (limited to 'drivers/net/e1000e/phy.c')
-rw-r--r--drivers/net/e1000e/phy.c71
1 files changed, 26 insertions, 45 deletions
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c
index f9d33ab05e97..85f955f70417 100644
--- a/drivers/net/e1000e/phy.c
+++ b/drivers/net/e1000e/phy.c
@@ -71,7 +71,6 @@ static const u16 e1000_igp_2_cable_length_table[] =
71#define I82577_CFG_ASSERT_CRS_ON_TX (1 << 15) 71#define I82577_CFG_ASSERT_CRS_ON_TX (1 << 15)
72#define I82577_CFG_ENABLE_DOWNSHIFT (3 << 10) /* auto downshift 100/10 */ 72#define I82577_CFG_ENABLE_DOWNSHIFT (3 << 10) /* auto downshift 100/10 */
73#define I82577_CTRL_REG 23 73#define I82577_CTRL_REG 23
74#define I82577_CTRL_DOWNSHIFT_MASK (7 << 10)
75 74
76/* 82577 specific PHY registers */ 75/* 82577 specific PHY registers */
77#define I82577_PHY_CTRL_2 18 76#define I82577_PHY_CTRL_2 18
@@ -95,13 +94,6 @@ static const u16 e1000_igp_2_cable_length_table[] =
95/* BM PHY Copper Specific Control 1 */ 94/* BM PHY Copper Specific Control 1 */
96#define BM_CS_CTRL1 16 95#define BM_CS_CTRL1 16
97 96
98/* BM PHY Copper Specific Status */
99#define BM_CS_STATUS 17
100#define BM_CS_STATUS_LINK_UP 0x0400
101#define BM_CS_STATUS_RESOLVED 0x0800
102#define BM_CS_STATUS_SPEED_MASK 0xC000
103#define BM_CS_STATUS_SPEED_1000 0x8000
104
105#define HV_MUX_DATA_CTRL PHY_REG(776, 16) 97#define HV_MUX_DATA_CTRL PHY_REG(776, 16)
106#define HV_MUX_DATA_CTRL_GEN_TO_MAC 0x0400 98#define HV_MUX_DATA_CTRL_GEN_TO_MAC 0x0400
107#define HV_MUX_DATA_CTRL_FORCE_SPEED 0x0004 99#define HV_MUX_DATA_CTRL_FORCE_SPEED 0x0004
@@ -563,7 +555,7 @@ s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)
563} 555}
564 556
565/** 557/**
566 * e1000_read_kmrn_reg_locked - Read kumeran register 558 * e1000e_read_kmrn_reg_locked - Read kumeran register
567 * @hw: pointer to the HW structure 559 * @hw: pointer to the HW structure
568 * @offset: register offset to be read 560 * @offset: register offset to be read
569 * @data: pointer to the read data 561 * @data: pointer to the read data
@@ -572,7 +564,7 @@ s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)
572 * information retrieved is stored in data. 564 * information retrieved is stored in data.
573 * Assumes semaphore already acquired. 565 * Assumes semaphore already acquired.
574 **/ 566 **/
575s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data) 567s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)
576{ 568{
577 return __e1000_read_kmrn_reg(hw, offset, data, true); 569 return __e1000_read_kmrn_reg(hw, offset, data, true);
578} 570}
@@ -631,7 +623,7 @@ s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data)
631} 623}
632 624
633/** 625/**
634 * e1000_write_kmrn_reg_locked - Write kumeran register 626 * e1000e_write_kmrn_reg_locked - Write kumeran register
635 * @hw: pointer to the HW structure 627 * @hw: pointer to the HW structure
636 * @offset: register offset to write to 628 * @offset: register offset to write to
637 * @data: data to write at register offset 629 * @data: data to write at register offset
@@ -639,7 +631,7 @@ s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data)
639 * Write the data to PHY register at the offset using the kumeran interface. 631 * Write the data to PHY register at the offset using the kumeran interface.
640 * Assumes semaphore already acquired. 632 * Assumes semaphore already acquired.
641 **/ 633 **/
642s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data) 634s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)
643{ 635{
644 return __e1000_write_kmrn_reg(hw, offset, data, true); 636 return __e1000_write_kmrn_reg(hw, offset, data, true);
645} 637}
@@ -667,15 +659,6 @@ s32 e1000_copper_link_setup_82577(struct e1000_hw *hw)
667 phy_data |= I82577_CFG_ENABLE_DOWNSHIFT; 659 phy_data |= I82577_CFG_ENABLE_DOWNSHIFT;
668 660
669 ret_val = phy->ops.write_phy_reg(hw, I82577_CFG_REG, phy_data); 661 ret_val = phy->ops.write_phy_reg(hw, I82577_CFG_REG, phy_data);
670 if (ret_val)
671 goto out;
672
673 /* Set number of link attempts before downshift */
674 ret_val = phy->ops.read_phy_reg(hw, I82577_CTRL_REG, &phy_data);
675 if (ret_val)
676 goto out;
677 phy_data &= ~I82577_CTRL_DOWNSHIFT_MASK;
678 ret_val = phy->ops.write_phy_reg(hw, I82577_CTRL_REG, phy_data);
679 662
680out: 663out:
681 return ret_val; 664 return ret_val;
@@ -2665,19 +2648,18 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
2665 page = 0; 2648 page = 0;
2666 2649
2667 if (reg > MAX_PHY_MULTI_PAGE_REG) { 2650 if (reg > MAX_PHY_MULTI_PAGE_REG) {
2668 if ((hw->phy.type != e1000_phy_82578) || 2651 u32 phy_addr = hw->phy.addr;
2669 ((reg != I82578_ADDR_REG) &&
2670 (reg != I82578_ADDR_REG + 1))) {
2671 u32 phy_addr = hw->phy.addr;
2672 2652
2673 hw->phy.addr = 1; 2653 hw->phy.addr = 1;
2674 2654
2675 /* Page is shifted left, PHY expects (page x 32) */ 2655 /* Page is shifted left, PHY expects (page x 32) */
2676 ret_val = e1000e_write_phy_reg_mdic(hw, 2656 ret_val = e1000e_write_phy_reg_mdic(hw,
2677 IGP01E1000_PHY_PAGE_SELECT, 2657 IGP01E1000_PHY_PAGE_SELECT,
2678 (page << IGP_PAGE_SHIFT)); 2658 (page << IGP_PAGE_SHIFT));
2679 hw->phy.addr = phy_addr; 2659 hw->phy.addr = phy_addr;
2680 } 2660
2661 if (ret_val)
2662 goto out;
2681 } 2663 }
2682 2664
2683 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, 2665 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
@@ -2685,7 +2667,7 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
2685out: 2667out:
2686 /* Revert to MDIO fast mode, if applicable */ 2668 /* Revert to MDIO fast mode, if applicable */
2687 if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) 2669 if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
2688 ret_val = e1000_set_mdio_slow_mode_hv(hw, false); 2670 ret_val |= e1000_set_mdio_slow_mode_hv(hw, false);
2689 2671
2690 if (!locked) 2672 if (!locked)
2691 hw->phy.ops.release_phy(hw); 2673 hw->phy.ops.release_phy(hw);
@@ -2791,19 +2773,18 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
2791 } 2773 }
2792 2774
2793 if (reg > MAX_PHY_MULTI_PAGE_REG) { 2775 if (reg > MAX_PHY_MULTI_PAGE_REG) {
2794 if ((hw->phy.type != e1000_phy_82578) || 2776 u32 phy_addr = hw->phy.addr;
2795 ((reg != I82578_ADDR_REG) &&
2796 (reg != I82578_ADDR_REG + 1))) {
2797 u32 phy_addr = hw->phy.addr;
2798 2777
2799 hw->phy.addr = 1; 2778 hw->phy.addr = 1;
2800 2779
2801 /* Page is shifted left, PHY expects (page x 32) */ 2780 /* Page is shifted left, PHY expects (page x 32) */
2802 ret_val = e1000e_write_phy_reg_mdic(hw, 2781 ret_val = e1000e_write_phy_reg_mdic(hw,
2803 IGP01E1000_PHY_PAGE_SELECT, 2782 IGP01E1000_PHY_PAGE_SELECT,
2804 (page << IGP_PAGE_SHIFT)); 2783 (page << IGP_PAGE_SHIFT));
2805 hw->phy.addr = phy_addr; 2784 hw->phy.addr = phy_addr;
2806 } 2785
2786 if (ret_val)
2787 goto out;
2807 } 2788 }
2808 2789
2809 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, 2790 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
@@ -2812,7 +2793,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
2812out: 2793out:
2813 /* Revert to MDIO fast mode, if applicable */ 2794 /* Revert to MDIO fast mode, if applicable */
2814 if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) 2795 if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
2815 ret_val = e1000_set_mdio_slow_mode_hv(hw, false); 2796 ret_val |= e1000_set_mdio_slow_mode_hv(hw, false);
2816 2797
2817 if (!locked) 2798 if (!locked)
2818 hw->phy.ops.release_phy(hw); 2799 hw->phy.ops.release_phy(hw);