diff options
Diffstat (limited to 'drivers/net/e1000e/lib.c')
-rw-r--r-- | drivers/net/e1000e/lib.c | 65 |
1 files changed, 31 insertions, 34 deletions
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c index 9c3ce719e8da..ea3ff6369c86 100644 --- a/drivers/net/e1000e/lib.c +++ b/drivers/net/e1000e/lib.c | |||
@@ -603,7 +603,6 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw) | |||
603 | **/ | 603 | **/ |
604 | static s32 e1000_set_default_fc_generic(struct e1000_hw *hw) | 604 | static s32 e1000_set_default_fc_generic(struct e1000_hw *hw) |
605 | { | 605 | { |
606 | struct e1000_mac_info *mac = &hw->mac; | ||
607 | s32 ret_val; | 606 | s32 ret_val; |
608 | u16 nvm_data; | 607 | u16 nvm_data; |
609 | 608 | ||
@@ -624,12 +623,12 @@ static s32 e1000_set_default_fc_generic(struct e1000_hw *hw) | |||
624 | } | 623 | } |
625 | 624 | ||
626 | if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0) | 625 | if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0) |
627 | mac->fc = e1000_fc_none; | 626 | hw->fc.type = e1000_fc_none; |
628 | else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == | 627 | else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == |
629 | NVM_WORD0F_ASM_DIR) | 628 | NVM_WORD0F_ASM_DIR) |
630 | mac->fc = e1000_fc_tx_pause; | 629 | hw->fc.type = e1000_fc_tx_pause; |
631 | else | 630 | else |
632 | mac->fc = e1000_fc_full; | 631 | hw->fc.type = e1000_fc_full; |
633 | 632 | ||
634 | return 0; | 633 | return 0; |
635 | } | 634 | } |
@@ -660,7 +659,7 @@ s32 e1000e_setup_link(struct e1000_hw *hw) | |||
660 | * If flow control is set to default, set flow control based on | 659 | * If flow control is set to default, set flow control based on |
661 | * the EEPROM flow control settings. | 660 | * the EEPROM flow control settings. |
662 | */ | 661 | */ |
663 | if (mac->fc == e1000_fc_default) { | 662 | if (hw->fc.type == e1000_fc_default) { |
664 | ret_val = e1000_set_default_fc_generic(hw); | 663 | ret_val = e1000_set_default_fc_generic(hw); |
665 | if (ret_val) | 664 | if (ret_val) |
666 | return ret_val; | 665 | return ret_val; |
@@ -671,9 +670,9 @@ s32 e1000e_setup_link(struct e1000_hw *hw) | |||
671 | * in case we get disconnected and then reconnected into a different | 670 | * in case we get disconnected and then reconnected into a different |
672 | * hub or switch with different Flow Control capabilities. | 671 | * hub or switch with different Flow Control capabilities. |
673 | */ | 672 | */ |
674 | mac->original_fc = mac->fc; | 673 | hw->fc.original_type = hw->fc.type; |
675 | 674 | ||
676 | hw_dbg(hw, "After fix-ups FlowControl is now = %x\n", mac->fc); | 675 | hw_dbg(hw, "After fix-ups FlowControl is now = %x\n", hw->fc.type); |
677 | 676 | ||
678 | /* Call the necessary media_type subroutine to configure the link. */ | 677 | /* Call the necessary media_type subroutine to configure the link. */ |
679 | ret_val = mac->ops.setup_physical_interface(hw); | 678 | ret_val = mac->ops.setup_physical_interface(hw); |
@@ -691,7 +690,7 @@ s32 e1000e_setup_link(struct e1000_hw *hw) | |||
691 | ew32(FCAH, FLOW_CONTROL_ADDRESS_HIGH); | 690 | ew32(FCAH, FLOW_CONTROL_ADDRESS_HIGH); |
692 | ew32(FCAL, FLOW_CONTROL_ADDRESS_LOW); | 691 | ew32(FCAL, FLOW_CONTROL_ADDRESS_LOW); |
693 | 692 | ||
694 | ew32(FCTTV, mac->fc_pause_time); | 693 | ew32(FCTTV, hw->fc.pause_time); |
695 | 694 | ||
696 | return e1000e_set_fc_watermarks(hw); | 695 | return e1000e_set_fc_watermarks(hw); |
697 | } | 696 | } |
@@ -725,7 +724,7 @@ static s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw) | |||
725 | * do not support receiving pause frames). | 724 | * do not support receiving pause frames). |
726 | * 3: Both Rx and Tx flow control (symmetric) are enabled. | 725 | * 3: Both Rx and Tx flow control (symmetric) are enabled. |
727 | */ | 726 | */ |
728 | switch (mac->fc) { | 727 | switch (hw->fc.type) { |
729 | case e1000_fc_none: | 728 | case e1000_fc_none: |
730 | /* Flow control completely disabled by a software over-ride. */ | 729 | /* Flow control completely disabled by a software over-ride. */ |
731 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD); | 730 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD); |
@@ -857,7 +856,7 @@ s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw) | |||
857 | * detect a signal. If we have a signal, then poll for a "Link-Up" | 856 | * detect a signal. If we have a signal, then poll for a "Link-Up" |
858 | * indication. | 857 | * indication. |
859 | */ | 858 | */ |
860 | if (hw->media_type == e1000_media_type_internal_serdes || | 859 | if (hw->phy.media_type == e1000_media_type_internal_serdes || |
861 | (er32(CTRL) & E1000_CTRL_SWDPIN1)) { | 860 | (er32(CTRL) & E1000_CTRL_SWDPIN1)) { |
862 | ret_val = e1000_poll_fiber_serdes_link_generic(hw); | 861 | ret_val = e1000_poll_fiber_serdes_link_generic(hw); |
863 | } else { | 862 | } else { |
@@ -898,7 +897,6 @@ void e1000e_config_collision_dist(struct e1000_hw *hw) | |||
898 | **/ | 897 | **/ |
899 | s32 e1000e_set_fc_watermarks(struct e1000_hw *hw) | 898 | s32 e1000e_set_fc_watermarks(struct e1000_hw *hw) |
900 | { | 899 | { |
901 | struct e1000_mac_info *mac = &hw->mac; | ||
902 | u32 fcrtl = 0, fcrth = 0; | 900 | u32 fcrtl = 0, fcrth = 0; |
903 | 901 | ||
904 | /* | 902 | /* |
@@ -908,15 +906,15 @@ s32 e1000e_set_fc_watermarks(struct e1000_hw *hw) | |||
908 | * ability to transmit pause frames is not enabled, then these | 906 | * ability to transmit pause frames is not enabled, then these |
909 | * registers will be set to 0. | 907 | * registers will be set to 0. |
910 | */ | 908 | */ |
911 | if (mac->fc & e1000_fc_tx_pause) { | 909 | if (hw->fc.type & e1000_fc_tx_pause) { |
912 | /* | 910 | /* |
913 | * We need to set up the Receive Threshold high and low water | 911 | * We need to set up the Receive Threshold high and low water |
914 | * marks as well as (optionally) enabling the transmission of | 912 | * marks as well as (optionally) enabling the transmission of |
915 | * XON frames. | 913 | * XON frames. |
916 | */ | 914 | */ |
917 | fcrtl = mac->fc_low_water; | 915 | fcrtl = hw->fc.low_water; |
918 | fcrtl |= E1000_FCRTL_XONE; | 916 | fcrtl |= E1000_FCRTL_XONE; |
919 | fcrth = mac->fc_high_water; | 917 | fcrth = hw->fc.high_water; |
920 | } | 918 | } |
921 | ew32(FCRTL, fcrtl); | 919 | ew32(FCRTL, fcrtl); |
922 | ew32(FCRTH, fcrth); | 920 | ew32(FCRTH, fcrth); |
@@ -936,7 +934,6 @@ s32 e1000e_set_fc_watermarks(struct e1000_hw *hw) | |||
936 | **/ | 934 | **/ |
937 | s32 e1000e_force_mac_fc(struct e1000_hw *hw) | 935 | s32 e1000e_force_mac_fc(struct e1000_hw *hw) |
938 | { | 936 | { |
939 | struct e1000_mac_info *mac = &hw->mac; | ||
940 | u32 ctrl; | 937 | u32 ctrl; |
941 | 938 | ||
942 | ctrl = er32(CTRL); | 939 | ctrl = er32(CTRL); |
@@ -948,7 +945,7 @@ s32 e1000e_force_mac_fc(struct e1000_hw *hw) | |||
948 | * receive flow control. | 945 | * receive flow control. |
949 | * | 946 | * |
950 | * The "Case" statement below enables/disable flow control | 947 | * The "Case" statement below enables/disable flow control |
951 | * according to the "mac->fc" parameter. | 948 | * according to the "hw->fc.type" parameter. |
952 | * | 949 | * |
953 | * The possible values of the "fc" parameter are: | 950 | * The possible values of the "fc" parameter are: |
954 | * 0: Flow control is completely disabled | 951 | * 0: Flow control is completely disabled |
@@ -959,9 +956,9 @@ s32 e1000e_force_mac_fc(struct e1000_hw *hw) | |||
959 | * 3: Both Rx and Tx flow control (symmetric) is enabled. | 956 | * 3: Both Rx and Tx flow control (symmetric) is enabled. |
960 | * other: No other values should be possible at this point. | 957 | * other: No other values should be possible at this point. |
961 | */ | 958 | */ |
962 | hw_dbg(hw, "mac->fc = %u\n", mac->fc); | 959 | hw_dbg(hw, "hw->fc.type = %u\n", hw->fc.type); |
963 | 960 | ||
964 | switch (mac->fc) { | 961 | switch (hw->fc.type) { |
965 | case e1000_fc_none: | 962 | case e1000_fc_none: |
966 | ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE)); | 963 | ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE)); |
967 | break; | 964 | break; |
@@ -1009,11 +1006,11 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1009 | * configuration of the MAC to match the "fc" parameter. | 1006 | * configuration of the MAC to match the "fc" parameter. |
1010 | */ | 1007 | */ |
1011 | if (mac->autoneg_failed) { | 1008 | if (mac->autoneg_failed) { |
1012 | if (hw->media_type == e1000_media_type_fiber || | 1009 | if (hw->phy.media_type == e1000_media_type_fiber || |
1013 | hw->media_type == e1000_media_type_internal_serdes) | 1010 | hw->phy.media_type == e1000_media_type_internal_serdes) |
1014 | ret_val = e1000e_force_mac_fc(hw); | 1011 | ret_val = e1000e_force_mac_fc(hw); |
1015 | } else { | 1012 | } else { |
1016 | if (hw->media_type == e1000_media_type_copper) | 1013 | if (hw->phy.media_type == e1000_media_type_copper) |
1017 | ret_val = e1000e_force_mac_fc(hw); | 1014 | ret_val = e1000e_force_mac_fc(hw); |
1018 | } | 1015 | } |
1019 | 1016 | ||
@@ -1028,7 +1025,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1028 | * has completed, and if so, how the PHY and link partner has | 1025 | * has completed, and if so, how the PHY and link partner has |
1029 | * flow control configured. | 1026 | * flow control configured. |
1030 | */ | 1027 | */ |
1031 | if ((hw->media_type == e1000_media_type_copper) && mac->autoneg) { | 1028 | if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) { |
1032 | /* | 1029 | /* |
1033 | * Read the MII Status Register and check to see if AutoNeg | 1030 | * Read the MII Status Register and check to see if AutoNeg |
1034 | * has completed. We read this twice because this reg has | 1031 | * has completed. We read this twice because this reg has |
@@ -1105,11 +1102,11 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1105 | * ONLY. Hence, we must now check to see if we need to | 1102 | * ONLY. Hence, we must now check to see if we need to |
1106 | * turn OFF the TRANSMISSION of PAUSE frames. | 1103 | * turn OFF the TRANSMISSION of PAUSE frames. |
1107 | */ | 1104 | */ |
1108 | if (mac->original_fc == e1000_fc_full) { | 1105 | if (hw->fc.original_type == e1000_fc_full) { |
1109 | mac->fc = e1000_fc_full; | 1106 | hw->fc.type = e1000_fc_full; |
1110 | hw_dbg(hw, "Flow Control = FULL.\r\n"); | 1107 | hw_dbg(hw, "Flow Control = FULL.\r\n"); |
1111 | } else { | 1108 | } else { |
1112 | mac->fc = e1000_fc_rx_pause; | 1109 | hw->fc.type = e1000_fc_rx_pause; |
1113 | hw_dbg(hw, "Flow Control = " | 1110 | hw_dbg(hw, "Flow Control = " |
1114 | "RX PAUSE frames only.\r\n"); | 1111 | "RX PAUSE frames only.\r\n"); |
1115 | } | 1112 | } |
@@ -1127,8 +1124,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1127 | (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && | 1124 | (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && |
1128 | (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && | 1125 | (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && |
1129 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { | 1126 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { |
1130 | mac->fc = e1000_fc_tx_pause; | 1127 | hw->fc.type = e1000_fc_tx_pause; |
1131 | hw_dbg(hw, "Flow Control = TX PAUSE frames only.\r\n"); | 1128 | hw_dbg(hw, "Flow Control = Tx PAUSE frames only.\r\n"); |
1132 | } | 1129 | } |
1133 | /* | 1130 | /* |
1134 | * For transmitting PAUSE frames ONLY. | 1131 | * For transmitting PAUSE frames ONLY. |
@@ -1143,14 +1140,14 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1143 | (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && | 1140 | (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && |
1144 | !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && | 1141 | !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && |
1145 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { | 1142 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { |
1146 | mac->fc = e1000_fc_rx_pause; | 1143 | hw->fc.type = e1000_fc_rx_pause; |
1147 | hw_dbg(hw, "Flow Control = RX PAUSE frames only.\r\n"); | 1144 | hw_dbg(hw, "Flow Control = Rx PAUSE frames only.\r\n"); |
1148 | } else { | 1145 | } else { |
1149 | /* | 1146 | /* |
1150 | * Per the IEEE spec, at this point flow control | 1147 | * Per the IEEE spec, at this point flow control |
1151 | * should be disabled. | 1148 | * should be disabled. |
1152 | */ | 1149 | */ |
1153 | mac->fc = e1000_fc_none; | 1150 | hw->fc.type = e1000_fc_none; |
1154 | hw_dbg(hw, "Flow Control = NONE.\r\n"); | 1151 | hw_dbg(hw, "Flow Control = NONE.\r\n"); |
1155 | } | 1152 | } |
1156 | 1153 | ||
@@ -1166,7 +1163,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1166 | } | 1163 | } |
1167 | 1164 | ||
1168 | if (duplex == HALF_DUPLEX) | 1165 | if (duplex == HALF_DUPLEX) |
1169 | mac->fc = e1000_fc_none; | 1166 | hw->fc.type = e1000_fc_none; |
1170 | 1167 | ||
1171 | /* | 1168 | /* |
1172 | * Now we call a subroutine to actually force the MAC | 1169 | * Now we call a subroutine to actually force the MAC |
@@ -1436,7 +1433,7 @@ s32 e1000e_blink_led(struct e1000_hw *hw) | |||
1436 | u32 ledctl_blink = 0; | 1433 | u32 ledctl_blink = 0; |
1437 | u32 i; | 1434 | u32 i; |
1438 | 1435 | ||
1439 | if (hw->media_type == e1000_media_type_fiber) { | 1436 | if (hw->phy.media_type == e1000_media_type_fiber) { |
1440 | /* always blink LED0 for PCI-E fiber */ | 1437 | /* always blink LED0 for PCI-E fiber */ |
1441 | ledctl_blink = E1000_LEDCTL_LED0_BLINK | | 1438 | ledctl_blink = E1000_LEDCTL_LED0_BLINK | |
1442 | (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT); | 1439 | (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT); |
@@ -1468,7 +1465,7 @@ s32 e1000e_led_on_generic(struct e1000_hw *hw) | |||
1468 | { | 1465 | { |
1469 | u32 ctrl; | 1466 | u32 ctrl; |
1470 | 1467 | ||
1471 | switch (hw->media_type) { | 1468 | switch (hw->phy.media_type) { |
1472 | case e1000_media_type_fiber: | 1469 | case e1000_media_type_fiber: |
1473 | ctrl = er32(CTRL); | 1470 | ctrl = er32(CTRL); |
1474 | ctrl &= ~E1000_CTRL_SWDPIN0; | 1471 | ctrl &= ~E1000_CTRL_SWDPIN0; |
@@ -1495,7 +1492,7 @@ s32 e1000e_led_off_generic(struct e1000_hw *hw) | |||
1495 | { | 1492 | { |
1496 | u32 ctrl; | 1493 | u32 ctrl; |
1497 | 1494 | ||
1498 | switch (hw->media_type) { | 1495 | switch (hw->phy.media_type) { |
1499 | case e1000_media_type_fiber: | 1496 | case e1000_media_type_fiber: |
1500 | ctrl = er32(CTRL); | 1497 | ctrl = er32(CTRL); |
1501 | ctrl |= E1000_CTRL_SWDPIN0; | 1498 | ctrl |= E1000_CTRL_SWDPIN0; |