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path: root/drivers/net/e1000e/es2lan.c
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Diffstat (limited to 'drivers/net/e1000e/es2lan.c')
-rw-r--r--drivers/net/e1000e/es2lan.c23
1 files changed, 11 insertions, 12 deletions
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c
index 6fd46f5f8a3c..f5601c5ff7af 100644
--- a/drivers/net/e1000e/es2lan.c
+++ b/drivers/net/e1000e/es2lan.c
@@ -394,8 +394,7 @@ static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
394 } 394 }
395 395
396 if (i == timeout) { 396 if (i == timeout) {
397 hw_dbg(hw, 397 e_dbg("Driver can't access resource, SW_FW_SYNC timeout.\n");
398 "Driver can't access resource, SW_FW_SYNC timeout.\n");
399 return -E1000_ERR_SWFW_SYNC; 398 return -E1000_ERR_SWFW_SYNC;
400 } 399 }
401 400
@@ -597,7 +596,7 @@ static s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw)
597 timeout--; 596 timeout--;
598 } 597 }
599 if (!timeout) { 598 if (!timeout) {
600 hw_dbg(hw, "MNG configuration cycle has not completed.\n"); 599 e_dbg("MNG configuration cycle has not completed.\n");
601 return -E1000_ERR_RESET; 600 return -E1000_ERR_RESET;
602 } 601 }
603 602
@@ -630,7 +629,7 @@ static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
630 if (ret_val) 629 if (ret_val)
631 return ret_val; 630 return ret_val;
632 631
633 hw_dbg(hw, "GG82563 PSCR: %X\n", phy_data); 632 e_dbg("GG82563 PSCR: %X\n", phy_data);
634 633
635 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data); 634 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data);
636 if (ret_val) 635 if (ret_val)
@@ -648,7 +647,7 @@ static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
648 udelay(1); 647 udelay(1);
649 648
650 if (hw->phy.autoneg_wait_to_complete) { 649 if (hw->phy.autoneg_wait_to_complete) {
651 hw_dbg(hw, "Waiting for forced speed/duplex link " 650 e_dbg("Waiting for forced speed/duplex link "
652 "on GG82563 phy.\n"); 651 "on GG82563 phy.\n");
653 652
654 ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT, 653 ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
@@ -771,9 +770,9 @@ static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)
771 */ 770 */
772 ret_val = e1000e_disable_pcie_master(hw); 771 ret_val = e1000e_disable_pcie_master(hw);
773 if (ret_val) 772 if (ret_val)
774 hw_dbg(hw, "PCI-E Master disable polling has failed.\n"); 773 e_dbg("PCI-E Master disable polling has failed.\n");
775 774
776 hw_dbg(hw, "Masking off all interrupts\n"); 775 e_dbg("Masking off all interrupts\n");
777 ew32(IMC, 0xffffffff); 776 ew32(IMC, 0xffffffff);
778 777
779 ew32(RCTL, 0); 778 ew32(RCTL, 0);
@@ -785,7 +784,7 @@ static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)
785 ctrl = er32(CTRL); 784 ctrl = er32(CTRL);
786 785
787 ret_val = e1000_acquire_phy_80003es2lan(hw); 786 ret_val = e1000_acquire_phy_80003es2lan(hw);
788 hw_dbg(hw, "Issuing a global reset to MAC\n"); 787 e_dbg("Issuing a global reset to MAC\n");
789 ew32(CTRL, ctrl | E1000_CTRL_RST); 788 ew32(CTRL, ctrl | E1000_CTRL_RST);
790 e1000_release_phy_80003es2lan(hw); 789 e1000_release_phy_80003es2lan(hw);
791 790
@@ -820,19 +819,19 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
820 /* Initialize identification LED */ 819 /* Initialize identification LED */
821 ret_val = e1000e_id_led_init(hw); 820 ret_val = e1000e_id_led_init(hw);
822 if (ret_val) { 821 if (ret_val) {
823 hw_dbg(hw, "Error initializing identification LED\n"); 822 e_dbg("Error initializing identification LED\n");
824 return ret_val; 823 return ret_val;
825 } 824 }
826 825
827 /* Disabling VLAN filtering */ 826 /* Disabling VLAN filtering */
828 hw_dbg(hw, "Initializing the IEEE VLAN\n"); 827 e_dbg("Initializing the IEEE VLAN\n");
829 e1000e_clear_vfta(hw); 828 e1000e_clear_vfta(hw);
830 829
831 /* Setup the receive address. */ 830 /* Setup the receive address. */
832 e1000e_init_rx_addrs(hw, mac->rar_entry_count); 831 e1000e_init_rx_addrs(hw, mac->rar_entry_count);
833 832
834 /* Zero out the Multicast HASH table */ 833 /* Zero out the Multicast HASH table */
835 hw_dbg(hw, "Zeroing the MTA\n"); 834 e_dbg("Zeroing the MTA\n");
836 for (i = 0; i < mac->mta_reg_count; i++) 835 for (i = 0; i < mac->mta_reg_count; i++)
837 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); 836 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
838 837
@@ -989,7 +988,7 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
989 /* SW Reset the PHY so all changes take effect */ 988 /* SW Reset the PHY so all changes take effect */
990 ret_val = e1000e_commit_phy(hw); 989 ret_val = e1000e_commit_phy(hw);
991 if (ret_val) { 990 if (ret_val) {
992 hw_dbg(hw, "Error Resetting the PHY\n"); 991 e_dbg("Error Resetting the PHY\n");
993 return ret_val; 992 return ret_val;
994 } 993 }
995 994