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path: root/drivers/net/e1000e/es2lan.c
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Diffstat (limited to 'drivers/net/e1000e/es2lan.c')
-rw-r--r--drivers/net/e1000e/es2lan.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c
index 2689e4b83f9b..10e17cf6485e 100644
--- a/drivers/net/e1000e/es2lan.c
+++ b/drivers/net/e1000e/es2lan.c
@@ -792,16 +792,16 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
792 ret_val = e1000e_setup_link(hw); 792 ret_val = e1000e_setup_link(hw);
793 793
794 /* Set the transmit descriptor write-back policy */ 794 /* Set the transmit descriptor write-back policy */
795 reg_data = er32(TXDCTL); 795 reg_data = er32(TXDCTL(0));
796 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | 796 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
797 E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC; 797 E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
798 ew32(TXDCTL, reg_data); 798 ew32(TXDCTL(0), reg_data);
799 799
800 /* ...for both queues. */ 800 /* ...for both queues. */
801 reg_data = er32(TXDCTL1); 801 reg_data = er32(TXDCTL(1));
802 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | 802 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
803 E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC; 803 E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
804 ew32(TXDCTL1, reg_data); 804 ew32(TXDCTL(1), reg_data);
805 805
806 /* Enable retransmit on late collisions */ 806 /* Enable retransmit on late collisions */
807 reg_data = er32(TCTL); 807 reg_data = er32(TCTL);
@@ -846,29 +846,29 @@ static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw)
846 u32 reg; 846 u32 reg;
847 847
848 /* Transmit Descriptor Control 0 */ 848 /* Transmit Descriptor Control 0 */
849 reg = er32(TXDCTL); 849 reg = er32(TXDCTL(0));
850 reg |= (1 << 22); 850 reg |= (1 << 22);
851 ew32(TXDCTL, reg); 851 ew32(TXDCTL(0), reg);
852 852
853 /* Transmit Descriptor Control 1 */ 853 /* Transmit Descriptor Control 1 */
854 reg = er32(TXDCTL1); 854 reg = er32(TXDCTL(1));
855 reg |= (1 << 22); 855 reg |= (1 << 22);
856 ew32(TXDCTL1, reg); 856 ew32(TXDCTL(1), reg);
857 857
858 /* Transmit Arbitration Control 0 */ 858 /* Transmit Arbitration Control 0 */
859 reg = er32(TARC0); 859 reg = er32(TARC(0));
860 reg &= ~(0xF << 27); /* 30:27 */ 860 reg &= ~(0xF << 27); /* 30:27 */
861 if (hw->phy.media_type != e1000_media_type_copper) 861 if (hw->phy.media_type != e1000_media_type_copper)
862 reg &= ~(1 << 20); 862 reg &= ~(1 << 20);
863 ew32(TARC0, reg); 863 ew32(TARC(0), reg);
864 864
865 /* Transmit Arbitration Control 1 */ 865 /* Transmit Arbitration Control 1 */
866 reg = er32(TARC1); 866 reg = er32(TARC(1));
867 if (er32(TCTL) & E1000_TCTL_MULR) 867 if (er32(TCTL) & E1000_TCTL_MULR)
868 reg &= ~(1 << 28); 868 reg &= ~(1 << 28);
869 else 869 else
870 reg |= (1 << 28); 870 reg |= (1 << 28);
871 ew32(TARC1, reg); 871 ew32(TARC(1), reg);
872} 872}
873 873
874/** 874/**