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path: root/drivers/net/e1000e/e1000.h
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Diffstat (limited to 'drivers/net/e1000e/e1000.h')
-rw-r--r--drivers/net/e1000e/e1000.h34
1 files changed, 26 insertions, 8 deletions
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index 5a89dff52264..38bfd0d261fe 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -64,11 +64,14 @@ struct e1000_info;
64/* Tx/Rx descriptor defines */ 64/* Tx/Rx descriptor defines */
65#define E1000_DEFAULT_TXD 256 65#define E1000_DEFAULT_TXD 256
66#define E1000_MAX_TXD 4096 66#define E1000_MAX_TXD 4096
67#define E1000_MIN_TXD 80 67#define E1000_MIN_TXD 64
68 68
69#define E1000_DEFAULT_RXD 256 69#define E1000_DEFAULT_RXD 256
70#define E1000_MAX_RXD 4096 70#define E1000_MAX_RXD 4096
71#define E1000_MIN_RXD 80 71#define E1000_MIN_RXD 64
72
73#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
74#define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */
72 75
73/* Early Receive defines */ 76/* Early Receive defines */
74#define E1000_ERT_2048 0x100 77#define E1000_ERT_2048 0x100
@@ -147,6 +150,18 @@ struct e1000_ring {
147 struct e1000_queue_stats stats; 150 struct e1000_queue_stats stats;
148}; 151};
149 152
153/* PHY register snapshot values */
154struct e1000_phy_regs {
155 u16 bmcr; /* basic mode control register */
156 u16 bmsr; /* basic mode status register */
157 u16 advertise; /* auto-negotiation advertisement */
158 u16 lpa; /* link partner ability register */
159 u16 expansion; /* auto-negotiation expansion reg */
160 u16 ctrl1000; /* 1000BASE-T control register */
161 u16 stat1000; /* 1000BASE-T status register */
162 u16 estatus; /* extended status register */
163};
164
150/* board specific private data structure */ 165/* board specific private data structure */
151struct e1000_adapter { 166struct e1000_adapter {
152 struct timer_list watchdog_timer; 167 struct timer_list watchdog_timer;
@@ -202,8 +217,8 @@ struct e1000_adapter {
202 /* Tx stats */ 217 /* Tx stats */
203 u64 tpt_old; 218 u64 tpt_old;
204 u64 colc_old; 219 u64 colc_old;
205 u64 gotcl_old; 220 u32 gotc;
206 u32 gotcl; 221 u64 gotc_old;
207 u32 tx_timeout_count; 222 u32 tx_timeout_count;
208 u32 tx_fifo_head; 223 u32 tx_fifo_head;
209 u32 tx_head_addr; 224 u32 tx_head_addr;
@@ -227,8 +242,8 @@ struct e1000_adapter {
227 u64 hw_csum_err; 242 u64 hw_csum_err;
228 u64 hw_csum_good; 243 u64 hw_csum_good;
229 u64 rx_hdr_split; 244 u64 rx_hdr_split;
230 u64 gorcl_old; 245 u32 gorc;
231 u32 gorcl; 246 u64 gorc_old;
232 u32 alloc_rx_buff_failed; 247 u32 alloc_rx_buff_failed;
233 u32 rx_dma_failed; 248 u32 rx_dma_failed;
234 249
@@ -250,6 +265,9 @@ struct e1000_adapter {
250 struct e1000_phy_info phy_info; 265 struct e1000_phy_info phy_info;
251 struct e1000_phy_stats phy_stats; 266 struct e1000_phy_stats phy_stats;
252 267
268 /* Snapshot of PHY registers */
269 struct e1000_phy_regs phy_regs;
270
253 struct e1000_ring test_tx_ring; 271 struct e1000_ring test_tx_ring;
254 struct e1000_ring test_rx_ring; 272 struct e1000_ring test_rx_ring;
255 u32 test_icr; 273 u32 test_icr;
@@ -286,8 +304,6 @@ struct e1000_info {
286#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5) 304#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
287#define FLAG_HAS_SWSM_ON_LOAD (1 << 6) 305#define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
288#define FLAG_HAS_JUMBO_FRAMES (1 << 7) 306#define FLAG_HAS_JUMBO_FRAMES (1 << 7)
289#define FLAG_HAS_STATS_ICR_ICT (1 << 9)
290#define FLAG_HAS_STATS_PTC_PRC (1 << 10)
291#define FLAG_HAS_SMART_POWER_DOWN (1 << 11) 307#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
292#define FLAG_IS_QUAD_PORT_A (1 << 12) 308#define FLAG_IS_QUAD_PORT_A (1 << 12)
293#define FLAG_IS_QUAD_PORT (1 << 13) 309#define FLAG_IS_QUAD_PORT (1 << 13)
@@ -433,6 +449,8 @@ extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
433extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, 449extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
434 u32 usec_interval, bool *success); 450 u32 usec_interval, bool *success);
435extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); 451extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
452extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
453extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
436extern s32 e1000e_check_downshift(struct e1000_hw *hw); 454extern s32 e1000e_check_downshift(struct e1000_hw *hw);
437 455
438static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw) 456static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)