diff options
Diffstat (limited to 'drivers/net/e1000e/defines.h')
-rw-r--r-- | drivers/net/e1000e/defines.h | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h index 93b3bedae8d2..c516a7440bec 100644 --- a/drivers/net/e1000e/defines.h +++ b/drivers/net/e1000e/defines.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | Intel PRO/1000 Linux driver | 3 | Intel PRO/1000 Linux driver |
4 | Copyright(c) 1999 - 2010 Intel Corporation. | 4 | Copyright(c) 1999 - 2011 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms and conditions of the GNU General Public License, | 7 | under the terms and conditions of the GNU General Public License, |
@@ -86,6 +86,7 @@ | |||
86 | #define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */ | 86 | #define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */ |
87 | #define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */ | 87 | #define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */ |
88 | #define E1000_CTRL_EXT_PBA_CLR 0x80000000 /* PBA Clear */ | 88 | #define E1000_CTRL_EXT_PBA_CLR 0x80000000 /* PBA Clear */ |
89 | #define E1000_CTRL_EXT_LSECCK 0x00001000 | ||
89 | #define E1000_CTRL_EXT_PHYPDEN 0x00100000 | 90 | #define E1000_CTRL_EXT_PHYPDEN 0x00100000 |
90 | 91 | ||
91 | /* Receive Descriptor bit definitions */ | 92 | /* Receive Descriptor bit definitions */ |
@@ -446,7 +447,9 @@ | |||
446 | 447 | ||
447 | /* Transmit Descriptor Control */ | 448 | /* Transmit Descriptor Control */ |
448 | #define E1000_TXDCTL_PTHRESH 0x0000003F /* TXDCTL Prefetch Threshold */ | 449 | #define E1000_TXDCTL_PTHRESH 0x0000003F /* TXDCTL Prefetch Threshold */ |
450 | #define E1000_TXDCTL_HTHRESH 0x00003F00 /* TXDCTL Host Threshold */ | ||
449 | #define E1000_TXDCTL_WTHRESH 0x003F0000 /* TXDCTL Writeback Threshold */ | 451 | #define E1000_TXDCTL_WTHRESH 0x003F0000 /* TXDCTL Writeback Threshold */ |
452 | #define E1000_TXDCTL_GRAN 0x01000000 /* TXDCTL Granularity */ | ||
450 | #define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */ | 453 | #define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */ |
451 | #define E1000_TXDCTL_MAX_TX_DESC_PREFETCH 0x0100001F /* GRAN=1, PTHRESH=31 */ | 454 | #define E1000_TXDCTL_MAX_TX_DESC_PREFETCH 0x0100001F /* GRAN=1, PTHRESH=31 */ |
452 | /* Enable the counting of desc. still to be processed. */ | 455 | /* Enable the counting of desc. still to be processed. */ |
@@ -486,6 +489,9 @@ | |||
486 | #define E1000_BLK_PHY_RESET 12 | 489 | #define E1000_BLK_PHY_RESET 12 |
487 | #define E1000_ERR_SWFW_SYNC 13 | 490 | #define E1000_ERR_SWFW_SYNC 13 |
488 | #define E1000_NOT_IMPLEMENTED 14 | 491 | #define E1000_NOT_IMPLEMENTED 14 |
492 | #define E1000_ERR_INVALID_ARGUMENT 16 | ||
493 | #define E1000_ERR_NO_SPACE 17 | ||
494 | #define E1000_ERR_NVM_PBA_SECTION 18 | ||
489 | 495 | ||
490 | /* Loop limit on how long we wait for auto-negotiation to complete */ | 496 | /* Loop limit on how long we wait for auto-negotiation to complete */ |
491 | #define FIBER_LINK_UP_LIMIT 50 | 497 | #define FIBER_LINK_UP_LIMIT 50 |
@@ -514,6 +520,7 @@ | |||
514 | #define E1000_TXCW_ANE 0x80000000 /* Auto-neg enable */ | 520 | #define E1000_TXCW_ANE 0x80000000 /* Auto-neg enable */ |
515 | 521 | ||
516 | /* Receive Configuration Word */ | 522 | /* Receive Configuration Word */ |
523 | #define E1000_RXCW_CW 0x0000ffff /* RxConfigWord mask */ | ||
517 | #define E1000_RXCW_IV 0x08000000 /* Receive config invalid */ | 524 | #define E1000_RXCW_IV 0x08000000 /* Receive config invalid */ |
518 | #define E1000_RXCW_C 0x20000000 /* Receive config */ | 525 | #define E1000_RXCW_C 0x20000000 /* Receive config */ |
519 | #define E1000_RXCW_SYNCH 0x40000000 /* Receive config synch */ | 526 | #define E1000_RXCW_SYNCH 0x40000000 /* Receive config synch */ |
@@ -647,13 +654,16 @@ | |||
647 | /* Mask bits for fields in Word 0x03 of the EEPROM */ | 654 | /* Mask bits for fields in Word 0x03 of the EEPROM */ |
648 | #define NVM_COMPAT_LOM 0x0800 | 655 | #define NVM_COMPAT_LOM 0x0800 |
649 | 656 | ||
657 | /* length of string needed to store PBA number */ | ||
658 | #define E1000_PBANUM_LENGTH 11 | ||
659 | |||
650 | /* For checksumming, the sum of all words in the NVM should equal 0xBABA. */ | 660 | /* For checksumming, the sum of all words in the NVM should equal 0xBABA. */ |
651 | #define NVM_SUM 0xBABA | 661 | #define NVM_SUM 0xBABA |
652 | 662 | ||
653 | /* PBA (printed board assembly) number words */ | 663 | /* PBA (printed board assembly) number words */ |
654 | #define NVM_PBA_OFFSET_0 8 | 664 | #define NVM_PBA_OFFSET_0 8 |
655 | #define NVM_PBA_OFFSET_1 9 | 665 | #define NVM_PBA_OFFSET_1 9 |
656 | 666 | #define NVM_PBA_PTR_GUARD 0xFAFA | |
657 | #define NVM_WORD_SIZE_BASE_SHIFT 6 | 667 | #define NVM_WORD_SIZE_BASE_SHIFT 6 |
658 | 668 | ||
659 | /* NVM Commands - SPI */ | 669 | /* NVM Commands - SPI */ |