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Diffstat (limited to 'drivers/net/e1000e/82571.c')
-rw-r--r--drivers/net/e1000e/82571.c163
1 files changed, 98 insertions, 65 deletions
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index 7fe20310eb5f..01c88664bad3 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel PRO/1000 Linux driver 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation. 4 Copyright(c) 1999 - 2008 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
@@ -29,6 +29,9 @@
29/* 29/*
30 * 82571EB Gigabit Ethernet Controller 30 * 82571EB Gigabit Ethernet Controller
31 * 82571EB Gigabit Ethernet Controller (Fiber) 31 * 82571EB Gigabit Ethernet Controller (Fiber)
32 * 82571EB Dual Port Gigabit Mezzanine Adapter
33 * 82571EB Quad Port Gigabit Mezzanine Adapter
34 * 82571PT Gigabit PT Quad Port Server ExpressModule
32 * 82572EI Gigabit Ethernet Controller (Copper) 35 * 82572EI Gigabit Ethernet Controller (Copper)
33 * 82572EI Gigabit Ethernet Controller (Fiber) 36 * 82572EI Gigabit Ethernet Controller (Fiber)
34 * 82572EI Gigabit Ethernet Controller 37 * 82572EI Gigabit Ethernet Controller
@@ -72,7 +75,7 @@ static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
72 struct e1000_phy_info *phy = &hw->phy; 75 struct e1000_phy_info *phy = &hw->phy;
73 s32 ret_val; 76 s32 ret_val;
74 77
75 if (hw->media_type != e1000_media_type_copper) { 78 if (hw->phy.media_type != e1000_media_type_copper) {
76 phy->type = e1000_phy_none; 79 phy->type = e1000_phy_none;
77 return 0; 80 return 0;
78 } 81 }
@@ -150,7 +153,8 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)
150 if (((eecd >> 15) & 0x3) == 0x3) { 153 if (((eecd >> 15) & 0x3) == 0x3) {
151 nvm->type = e1000_nvm_flash_hw; 154 nvm->type = e1000_nvm_flash_hw;
152 nvm->word_size = 2048; 155 nvm->word_size = 2048;
153 /* Autonomous Flash update bit must be cleared due 156 /*
157 * Autonomous Flash update bit must be cleared due
154 * to Flash update issue. 158 * to Flash update issue.
155 */ 159 */
156 eecd &= ~E1000_EECD_AUPDEN; 160 eecd &= ~E1000_EECD_AUPDEN;
@@ -159,13 +163,18 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)
159 } 163 }
160 /* Fall Through */ 164 /* Fall Through */
161 default: 165 default:
162 nvm->type = e1000_nvm_eeprom_spi; 166 nvm->type = e1000_nvm_eeprom_spi;
163 size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >> 167 size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
164 E1000_EECD_SIZE_EX_SHIFT); 168 E1000_EECD_SIZE_EX_SHIFT);
165 /* Added to a constant, "size" becomes the left-shift value 169 /*
170 * Added to a constant, "size" becomes the left-shift value
166 * for setting word_size. 171 * for setting word_size.
167 */ 172 */
168 size += NVM_WORD_SIZE_BASE_SHIFT; 173 size += NVM_WORD_SIZE_BASE_SHIFT;
174
175 /* EEPROM access above 16k is unsupported */
176 if (size > 14)
177 size = 14;
169 nvm->word_size = 1 << size; 178 nvm->word_size = 1 << size;
170 break; 179 break;
171 } 180 }
@@ -190,16 +199,16 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
190 case E1000_DEV_ID_82571EB_FIBER: 199 case E1000_DEV_ID_82571EB_FIBER:
191 case E1000_DEV_ID_82572EI_FIBER: 200 case E1000_DEV_ID_82572EI_FIBER:
192 case E1000_DEV_ID_82571EB_QUAD_FIBER: 201 case E1000_DEV_ID_82571EB_QUAD_FIBER:
193 hw->media_type = e1000_media_type_fiber; 202 hw->phy.media_type = e1000_media_type_fiber;
194 break; 203 break;
195 case E1000_DEV_ID_82571EB_SERDES: 204 case E1000_DEV_ID_82571EB_SERDES:
196 case E1000_DEV_ID_82572EI_SERDES: 205 case E1000_DEV_ID_82572EI_SERDES:
197 case E1000_DEV_ID_82571EB_SERDES_DUAL: 206 case E1000_DEV_ID_82571EB_SERDES_DUAL:
198 case E1000_DEV_ID_82571EB_SERDES_QUAD: 207 case E1000_DEV_ID_82571EB_SERDES_QUAD:
199 hw->media_type = e1000_media_type_internal_serdes; 208 hw->phy.media_type = e1000_media_type_internal_serdes;
200 break; 209 break;
201 default: 210 default:
202 hw->media_type = e1000_media_type_copper; 211 hw->phy.media_type = e1000_media_type_copper;
203 break; 212 break;
204 } 213 }
205 214
@@ -208,25 +217,28 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
208 /* Set rar entry count */ 217 /* Set rar entry count */
209 mac->rar_entry_count = E1000_RAR_ENTRIES; 218 mac->rar_entry_count = E1000_RAR_ENTRIES;
210 /* Set if manageability features are enabled. */ 219 /* Set if manageability features are enabled. */
211 mac->arc_subsystem_valid = 220 mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK) ? 1 : 0;
212 (er32(FWSM) & E1000_FWSM_MODE_MASK) ? 1 : 0;
213 221
214 /* check for link */ 222 /* check for link */
215 switch (hw->media_type) { 223 switch (hw->phy.media_type) {
216 case e1000_media_type_copper: 224 case e1000_media_type_copper:
217 func->setup_physical_interface = e1000_setup_copper_link_82571; 225 func->setup_physical_interface = e1000_setup_copper_link_82571;
218 func->check_for_link = e1000e_check_for_copper_link; 226 func->check_for_link = e1000e_check_for_copper_link;
219 func->get_link_up_info = e1000e_get_speed_and_duplex_copper; 227 func->get_link_up_info = e1000e_get_speed_and_duplex_copper;
220 break; 228 break;
221 case e1000_media_type_fiber: 229 case e1000_media_type_fiber:
222 func->setup_physical_interface = e1000_setup_fiber_serdes_link_82571; 230 func->setup_physical_interface =
231 e1000_setup_fiber_serdes_link_82571;
223 func->check_for_link = e1000e_check_for_fiber_link; 232 func->check_for_link = e1000e_check_for_fiber_link;
224 func->get_link_up_info = e1000e_get_speed_and_duplex_fiber_serdes; 233 func->get_link_up_info =
234 e1000e_get_speed_and_duplex_fiber_serdes;
225 break; 235 break;
226 case e1000_media_type_internal_serdes: 236 case e1000_media_type_internal_serdes:
227 func->setup_physical_interface = e1000_setup_fiber_serdes_link_82571; 237 func->setup_physical_interface =
238 e1000_setup_fiber_serdes_link_82571;
228 func->check_for_link = e1000e_check_for_serdes_link; 239 func->check_for_link = e1000e_check_for_serdes_link;
229 func->get_link_up_info = e1000e_get_speed_and_duplex_fiber_serdes; 240 func->get_link_up_info =
241 e1000e_get_speed_and_duplex_fiber_serdes;
230 break; 242 break;
231 default: 243 default:
232 return -E1000_ERR_CONFIG; 244 return -E1000_ERR_CONFIG;
@@ -236,7 +248,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
236 return 0; 248 return 0;
237} 249}
238 250
239static s32 e1000_get_invariants_82571(struct e1000_adapter *adapter) 251static s32 e1000_get_variants_82571(struct e1000_adapter *adapter)
240{ 252{
241 struct e1000_hw *hw = &adapter->hw; 253 struct e1000_hw *hw = &adapter->hw;
242 static int global_quad_port_a; /* global port a indication */ 254 static int global_quad_port_a; /* global port a indication */
@@ -322,10 +334,12 @@ static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)
322 switch (hw->mac.type) { 334 switch (hw->mac.type) {
323 case e1000_82571: 335 case e1000_82571:
324 case e1000_82572: 336 case e1000_82572:
325 /* The 82571 firmware may still be configuring the PHY. 337 /*
338 * The 82571 firmware may still be configuring the PHY.
326 * In this case, we cannot access the PHY until the 339 * In this case, we cannot access the PHY until the
327 * configuration is done. So we explicitly set the 340 * configuration is done. So we explicitly set the
328 * PHY ID. */ 341 * PHY ID.
342 */
329 phy->id = IGP01E1000_I_PHY_ID; 343 phy->id = IGP01E1000_I_PHY_ID;
330 break; 344 break;
331 case e1000_82573: 345 case e1000_82573:
@@ -479,8 +493,10 @@ static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)
479 if (ret_val) 493 if (ret_val)
480 return ret_val; 494 return ret_val;
481 495
482 /* If our nvm is an EEPROM, then we're done 496 /*
483 * otherwise, commit the checksum to the flash NVM. */ 497 * If our nvm is an EEPROM, then we're done
498 * otherwise, commit the checksum to the flash NVM.
499 */
484 if (hw->nvm.type != e1000_nvm_flash_hw) 500 if (hw->nvm.type != e1000_nvm_flash_hw)
485 return ret_val; 501 return ret_val;
486 502
@@ -496,7 +512,8 @@ static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)
496 512
497 /* Reset the firmware if using STM opcode. */ 513 /* Reset the firmware if using STM opcode. */
498 if ((er32(FLOP) & 0xFF00) == E1000_STM_OPCODE) { 514 if ((er32(FLOP) & 0xFF00) == E1000_STM_OPCODE) {
499 /* The enabling of and the actual reset must be done 515 /*
516 * The enabling of and the actual reset must be done
500 * in two write cycles. 517 * in two write cycles.
501 */ 518 */
502 ew32(HICR, E1000_HICR_FW_RESET_ENABLE); 519 ew32(HICR, E1000_HICR_FW_RESET_ENABLE);
@@ -557,8 +574,10 @@ static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
557 u32 eewr = 0; 574 u32 eewr = 0;
558 s32 ret_val = 0; 575 s32 ret_val = 0;
559 576
560 /* A check for invalid values: offset too large, too many words, 577 /*
561 * and not enough words. */ 578 * A check for invalid values: offset too large, too many words,
579 * and not enough words.
580 */
562 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || 581 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
563 (words == 0)) { 582 (words == 0)) {
564 hw_dbg(hw, "nvm parameter(s) out of bounds\n"); 583 hw_dbg(hw, "nvm parameter(s) out of bounds\n");
@@ -645,30 +664,32 @@ static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)
645 } else { 664 } else {
646 data &= ~IGP02E1000_PM_D0_LPLU; 665 data &= ~IGP02E1000_PM_D0_LPLU;
647 ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, data); 666 ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, data);
648 /* LPLU and SmartSpeed are mutually exclusive. LPLU is used 667 /*
668 * LPLU and SmartSpeed are mutually exclusive. LPLU is used
649 * during Dx states where the power conservation is most 669 * during Dx states where the power conservation is most
650 * important. During driver activity we should enable 670 * important. During driver activity we should enable
651 * SmartSpeed, so performance is maintained. */ 671 * SmartSpeed, so performance is maintained.
672 */
652 if (phy->smart_speed == e1000_smart_speed_on) { 673 if (phy->smart_speed == e1000_smart_speed_on) {
653 ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, 674 ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,
654 &data); 675 &data);
655 if (ret_val) 676 if (ret_val)
656 return ret_val; 677 return ret_val;
657 678
658 data |= IGP01E1000_PSCFR_SMART_SPEED; 679 data |= IGP01E1000_PSCFR_SMART_SPEED;
659 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, 680 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,
660 data); 681 data);
661 if (ret_val) 682 if (ret_val)
662 return ret_val; 683 return ret_val;
663 } else if (phy->smart_speed == e1000_smart_speed_off) { 684 } else if (phy->smart_speed == e1000_smart_speed_off) {
664 ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, 685 ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,
665 &data); 686 &data);
666 if (ret_val) 687 if (ret_val)
667 return ret_val; 688 return ret_val;
668 689
669 data &= ~IGP01E1000_PSCFR_SMART_SPEED; 690 data &= ~IGP01E1000_PSCFR_SMART_SPEED;
670 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, 691 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,
671 data); 692 data);
672 if (ret_val) 693 if (ret_val)
673 return ret_val; 694 return ret_val;
674 } 695 }
@@ -693,7 +714,8 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
693 s32 ret_val; 714 s32 ret_val;
694 u16 i = 0; 715 u16 i = 0;
695 716
696 /* Prevent the PCI-E bus from sticking if there is no TLP connection 717 /*
718 * Prevent the PCI-E bus from sticking if there is no TLP connection
697 * on the last TLP read/write transaction when MAC is reset. 719 * on the last TLP read/write transaction when MAC is reset.
698 */ 720 */
699 ret_val = e1000e_disable_pcie_master(hw); 721 ret_val = e1000e_disable_pcie_master(hw);
@@ -709,8 +731,10 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
709 731
710 msleep(10); 732 msleep(10);
711 733
712 /* Must acquire the MDIO ownership before MAC reset. 734 /*
713 * Ownership defaults to firmware after a reset. */ 735 * Must acquire the MDIO ownership before MAC reset.
736 * Ownership defaults to firmware after a reset.
737 */
714 if (hw->mac.type == e1000_82573) { 738 if (hw->mac.type == e1000_82573) {
715 extcnf_ctrl = er32(EXTCNF_CTRL); 739 extcnf_ctrl = er32(EXTCNF_CTRL);
716 extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP; 740 extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
@@ -747,7 +771,8 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
747 /* We don't want to continue accessing MAC registers. */ 771 /* We don't want to continue accessing MAC registers. */
748 return ret_val; 772 return ret_val;
749 773
750 /* Phy configuration from NVM just starts after EECD_AUTO_RD is set. 774 /*
775 * Phy configuration from NVM just starts after EECD_AUTO_RD is set.
751 * Need to wait for Phy configuration completion before accessing 776 * Need to wait for Phy configuration completion before accessing
752 * NVM and Phy. 777 * NVM and Phy.
753 */ 778 */
@@ -793,7 +818,8 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw)
793 e1000e_clear_vfta(hw); 818 e1000e_clear_vfta(hw);
794 819
795 /* Setup the receive address. */ 820 /* Setup the receive address. */
796 /* If, however, a locally administered address was assigned to the 821 /*
822 * If, however, a locally administered address was assigned to the
797 * 82571, we must reserve a RAR for it to work around an issue where 823 * 82571, we must reserve a RAR for it to work around an issue where
798 * resetting one port will reload the MAC on the other port. 824 * resetting one port will reload the MAC on the other port.
799 */ 825 */
@@ -810,19 +836,19 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw)
810 ret_val = e1000_setup_link_82571(hw); 836 ret_val = e1000_setup_link_82571(hw);
811 837
812 /* Set the transmit descriptor write-back policy */ 838 /* Set the transmit descriptor write-back policy */
813 reg_data = er32(TXDCTL); 839 reg_data = er32(TXDCTL(0));
814 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | 840 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
815 E1000_TXDCTL_FULL_TX_DESC_WB | 841 E1000_TXDCTL_FULL_TX_DESC_WB |
816 E1000_TXDCTL_COUNT_DESC; 842 E1000_TXDCTL_COUNT_DESC;
817 ew32(TXDCTL, reg_data); 843 ew32(TXDCTL(0), reg_data);
818 844
819 /* ...for both queues. */ 845 /* ...for both queues. */
820 if (mac->type != e1000_82573) { 846 if (mac->type != e1000_82573) {
821 reg_data = er32(TXDCTL1); 847 reg_data = er32(TXDCTL(1));
822 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | 848 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
823 E1000_TXDCTL_FULL_TX_DESC_WB | 849 E1000_TXDCTL_FULL_TX_DESC_WB |
824 E1000_TXDCTL_COUNT_DESC; 850 E1000_TXDCTL_COUNT_DESC;
825 ew32(TXDCTL1, reg_data); 851 ew32(TXDCTL(1), reg_data);
826 } else { 852 } else {
827 e1000e_enable_tx_pkt_filtering(hw); 853 e1000e_enable_tx_pkt_filtering(hw);
828 reg_data = er32(GCR); 854 reg_data = er32(GCR);
@@ -830,7 +856,8 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw)
830 ew32(GCR, reg_data); 856 ew32(GCR, reg_data);
831 } 857 }
832 858
833 /* Clear all of the statistics registers (clear on read). It is 859 /*
860 * Clear all of the statistics registers (clear on read). It is
834 * important that we do this after we have tried to establish link 861 * important that we do this after we have tried to establish link
835 * because the symbol error count will increment wildly if there 862 * because the symbol error count will increment wildly if there
836 * is no link. 863 * is no link.
@@ -851,17 +878,17 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
851 u32 reg; 878 u32 reg;
852 879
853 /* Transmit Descriptor Control 0 */ 880 /* Transmit Descriptor Control 0 */
854 reg = er32(TXDCTL); 881 reg = er32(TXDCTL(0));
855 reg |= (1 << 22); 882 reg |= (1 << 22);
856 ew32(TXDCTL, reg); 883 ew32(TXDCTL(0), reg);
857 884
858 /* Transmit Descriptor Control 1 */ 885 /* Transmit Descriptor Control 1 */
859 reg = er32(TXDCTL1); 886 reg = er32(TXDCTL(1));
860 reg |= (1 << 22); 887 reg |= (1 << 22);
861 ew32(TXDCTL1, reg); 888 ew32(TXDCTL(1), reg);
862 889
863 /* Transmit Arbitration Control 0 */ 890 /* Transmit Arbitration Control 0 */
864 reg = er32(TARC0); 891 reg = er32(TARC(0));
865 reg &= ~(0xF << 27); /* 30:27 */ 892 reg &= ~(0xF << 27); /* 30:27 */
866 switch (hw->mac.type) { 893 switch (hw->mac.type) {
867 case e1000_82571: 894 case e1000_82571:
@@ -871,10 +898,10 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
871 default: 898 default:
872 break; 899 break;
873 } 900 }
874 ew32(TARC0, reg); 901 ew32(TARC(0), reg);
875 902
876 /* Transmit Arbitration Control 1 */ 903 /* Transmit Arbitration Control 1 */
877 reg = er32(TARC1); 904 reg = er32(TARC(1));
878 switch (hw->mac.type) { 905 switch (hw->mac.type) {
879 case e1000_82571: 906 case e1000_82571:
880 case e1000_82572: 907 case e1000_82572:
@@ -884,7 +911,7 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
884 reg &= ~(1 << 28); 911 reg &= ~(1 << 28);
885 else 912 else
886 reg |= (1 << 28); 913 reg |= (1 << 28);
887 ew32(TARC1, reg); 914 ew32(TARC(1), reg);
888 break; 915 break;
889 default: 916 default:
890 break; 917 break;
@@ -922,7 +949,8 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
922 949
923 if (hw->mac.type == e1000_82573) { 950 if (hw->mac.type == e1000_82573) {
924 if (hw->mng_cookie.vlan_id != 0) { 951 if (hw->mng_cookie.vlan_id != 0) {
925 /* The VFTA is a 4096b bit-field, each identifying 952 /*
953 * The VFTA is a 4096b bit-field, each identifying
926 * a single VLAN ID. The following operations 954 * a single VLAN ID. The following operations
927 * determine which 32b entry (i.e. offset) into the 955 * determine which 32b entry (i.e. offset) into the
928 * array we want to set the VLAN ID (i.e. bit) of 956 * array we want to set the VLAN ID (i.e. bit) of
@@ -936,7 +964,8 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
936 } 964 }
937 } 965 }
938 for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) { 966 for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
939 /* If the offset we want to clear is the same offset of the 967 /*
968 * If the offset we want to clear is the same offset of the
940 * manageability VLAN ID, then clear all bits except that of 969 * manageability VLAN ID, then clear all bits except that of
941 * the manageability unit. 970 * the manageability unit.
942 */ 971 */
@@ -947,7 +976,7 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
947} 976}
948 977
949/** 978/**
950 * e1000_mc_addr_list_update_82571 - Update Multicast addresses 979 * e1000_update_mc_addr_list_82571 - Update Multicast addresses
951 * @hw: pointer to the HW structure 980 * @hw: pointer to the HW structure
952 * @mc_addr_list: array of multicast addresses to program 981 * @mc_addr_list: array of multicast addresses to program
953 * @mc_addr_count: number of multicast addresses to program 982 * @mc_addr_count: number of multicast addresses to program
@@ -959,7 +988,7 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
959 * The parameter rar_count will usually be hw->mac.rar_entry_count 988 * The parameter rar_count will usually be hw->mac.rar_entry_count
960 * unless there are workarounds that change this. 989 * unless there are workarounds that change this.
961 **/ 990 **/
962static void e1000_mc_addr_list_update_82571(struct e1000_hw *hw, 991static void e1000_update_mc_addr_list_82571(struct e1000_hw *hw,
963 u8 *mc_addr_list, 992 u8 *mc_addr_list,
964 u32 mc_addr_count, 993 u32 mc_addr_count,
965 u32 rar_used_count, 994 u32 rar_used_count,
@@ -968,8 +997,8 @@ static void e1000_mc_addr_list_update_82571(struct e1000_hw *hw,
968 if (e1000e_get_laa_state_82571(hw)) 997 if (e1000e_get_laa_state_82571(hw))
969 rar_count--; 998 rar_count--;
970 999
971 e1000e_mc_addr_list_update_generic(hw, mc_addr_list, mc_addr_count, 1000 e1000e_update_mc_addr_list_generic(hw, mc_addr_list, mc_addr_count,
972 rar_used_count, rar_count); 1001 rar_used_count, rar_count);
973} 1002}
974 1003
975/** 1004/**
@@ -984,12 +1013,13 @@ static void e1000_mc_addr_list_update_82571(struct e1000_hw *hw,
984 **/ 1013 **/
985static s32 e1000_setup_link_82571(struct e1000_hw *hw) 1014static s32 e1000_setup_link_82571(struct e1000_hw *hw)
986{ 1015{
987 /* 82573 does not have a word in the NVM to determine 1016 /*
1017 * 82573 does not have a word in the NVM to determine
988 * the default flow control setting, so we explicitly 1018 * the default flow control setting, so we explicitly
989 * set it to full. 1019 * set it to full.
990 */ 1020 */
991 if (hw->mac.type == e1000_82573) 1021 if (hw->mac.type == e1000_82573)
992 hw->mac.fc = e1000_fc_full; 1022 hw->fc.type = e1000_fc_full;
993 1023
994 return e1000e_setup_link(hw); 1024 return e1000e_setup_link(hw);
995} 1025}
@@ -1050,14 +1080,14 @@ static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
1050 switch (hw->mac.type) { 1080 switch (hw->mac.type) {
1051 case e1000_82571: 1081 case e1000_82571:
1052 case e1000_82572: 1082 case e1000_82572:
1053 /* If SerDes loopback mode is entered, there is no form 1083 /*
1084 * If SerDes loopback mode is entered, there is no form
1054 * of reset to take the adapter out of that mode. So we 1085 * of reset to take the adapter out of that mode. So we
1055 * have to explicitly take the adapter out of loopback 1086 * have to explicitly take the adapter out of loopback
1056 * mode. This prevents drivers from twiddling their thumbs 1087 * mode. This prevents drivers from twiddling their thumbs
1057 * if another tool failed to take it out of loopback mode. 1088 * if another tool failed to take it out of loopback mode.
1058 */ 1089 */
1059 ew32(SCTL, 1090 ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
1060 E1000_SCTL_DISABLE_SERDES_LOOPBACK);
1061 break; 1091 break;
1062 default: 1092 default:
1063 break; 1093 break;
@@ -1124,7 +1154,8 @@ void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state)
1124 1154
1125 /* If workaround is activated... */ 1155 /* If workaround is activated... */
1126 if (state) 1156 if (state)
1127 /* Hold a copy of the LAA in RAR[14] This is done so that 1157 /*
1158 * Hold a copy of the LAA in RAR[14] This is done so that
1128 * between the time RAR[0] gets clobbered and the time it 1159 * between the time RAR[0] gets clobbered and the time it
1129 * gets fixed, the actual LAA is in one of the RARs and no 1160 * gets fixed, the actual LAA is in one of the RARs and no
1130 * incoming packets directed to this port are dropped. 1161 * incoming packets directed to this port are dropped.
@@ -1152,7 +1183,8 @@ static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw)
1152 if (nvm->type != e1000_nvm_flash_hw) 1183 if (nvm->type != e1000_nvm_flash_hw)
1153 return 0; 1184 return 0;
1154 1185
1155 /* Check bit 4 of word 10h. If it is 0, firmware is done updating 1186 /*
1187 * Check bit 4 of word 10h. If it is 0, firmware is done updating
1156 * 10h-12h. Checksum may need to be fixed. 1188 * 10h-12h. Checksum may need to be fixed.
1157 */ 1189 */
1158 ret_val = e1000_read_nvm(hw, 0x10, 1, &data); 1190 ret_val = e1000_read_nvm(hw, 0x10, 1, &data);
@@ -1160,7 +1192,8 @@ static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw)
1160 return ret_val; 1192 return ret_val;
1161 1193
1162 if (!(data & 0x10)) { 1194 if (!(data & 0x10)) {
1163 /* Read 0x23 and check bit 15. This bit is a 1 1195 /*
1196 * Read 0x23 and check bit 15. This bit is a 1
1164 * when the checksum has already been fixed. If 1197 * when the checksum has already been fixed. If
1165 * the checksum is still wrong and this bit is a 1198 * the checksum is still wrong and this bit is a
1166 * 1, we need to return bad checksum. Otherwise, 1199 * 1, we need to return bad checksum. Otherwise,
@@ -1240,7 +1273,7 @@ static struct e1000_mac_operations e82571_mac_ops = {
1240 /* .get_link_up_info: media type dependent */ 1273 /* .get_link_up_info: media type dependent */
1241 .led_on = e1000e_led_on_generic, 1274 .led_on = e1000e_led_on_generic,
1242 .led_off = e1000e_led_off_generic, 1275 .led_off = e1000e_led_off_generic,
1243 .mc_addr_list_update = e1000_mc_addr_list_update_82571, 1276 .update_mc_addr_list = e1000_update_mc_addr_list_82571,
1244 .reset_hw = e1000_reset_hw_82571, 1277 .reset_hw = e1000_reset_hw_82571,
1245 .init_hw = e1000_init_hw_82571, 1278 .init_hw = e1000_init_hw_82571,
1246 .setup_link = e1000_setup_link_82571, 1279 .setup_link = e1000_setup_link_82571,
@@ -1304,7 +1337,7 @@ struct e1000_info e1000_82571_info = {
1304 | FLAG_TARC_SPEED_MODE_BIT /* errata */ 1337 | FLAG_TARC_SPEED_MODE_BIT /* errata */
1305 | FLAG_APME_CHECK_PORT_B, 1338 | FLAG_APME_CHECK_PORT_B,
1306 .pba = 38, 1339 .pba = 38,
1307 .get_invariants = e1000_get_invariants_82571, 1340 .get_variants = e1000_get_variants_82571,
1308 .mac_ops = &e82571_mac_ops, 1341 .mac_ops = &e82571_mac_ops,
1309 .phy_ops = &e82_phy_ops_igp, 1342 .phy_ops = &e82_phy_ops_igp,
1310 .nvm_ops = &e82571_nvm_ops, 1343 .nvm_ops = &e82571_nvm_ops,
@@ -1322,7 +1355,7 @@ struct e1000_info e1000_82572_info = {
1322 | FLAG_HAS_STATS_ICR_ICT 1355 | FLAG_HAS_STATS_ICR_ICT
1323 | FLAG_TARC_SPEED_MODE_BIT, /* errata */ 1356 | FLAG_TARC_SPEED_MODE_BIT, /* errata */
1324 .pba = 38, 1357 .pba = 38,
1325 .get_invariants = e1000_get_invariants_82571, 1358 .get_variants = e1000_get_variants_82571,
1326 .mac_ops = &e82571_mac_ops, 1359 .mac_ops = &e82571_mac_ops,
1327 .phy_ops = &e82_phy_ops_igp, 1360 .phy_ops = &e82_phy_ops_igp,
1328 .nvm_ops = &e82571_nvm_ops, 1361 .nvm_ops = &e82571_nvm_ops,
@@ -1342,7 +1375,7 @@ struct e1000_info e1000_82573_info = {
1342 | FLAG_HAS_ERT 1375 | FLAG_HAS_ERT
1343 | FLAG_HAS_SWSM_ON_LOAD, 1376 | FLAG_HAS_SWSM_ON_LOAD,
1344 .pba = 20, 1377 .pba = 20,
1345 .get_invariants = e1000_get_invariants_82571, 1378 .get_variants = e1000_get_variants_82571,
1346 .mac_ops = &e82571_mac_ops, 1379 .mac_ops = &e82571_mac_ops,
1347 .phy_ops = &e82_phy_ops_m88, 1380 .phy_ops = &e82_phy_ops_m88,
1348 .nvm_ops = &e82571_nvm_ops, 1381 .nvm_ops = &e82571_nvm_ops,