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path: root/drivers/net/e1000e/82571.c
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Diffstat (limited to 'drivers/net/e1000e/82571.c')
-rw-r--r--drivers/net/e1000e/82571.c273
1 files changed, 251 insertions, 22 deletions
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index 0890162953e9..6c01a2072c87 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -40,6 +40,7 @@
40 * 82573E Gigabit Ethernet Controller (Copper) 40 * 82573E Gigabit Ethernet Controller (Copper)
41 * 82573L Gigabit Ethernet Controller 41 * 82573L Gigabit Ethernet Controller
42 * 82574L Gigabit Network Connection 42 * 82574L Gigabit Network Connection
43 * 82583V Gigabit Network Connection
43 */ 44 */
44 45
45#include <linux/netdevice.h> 46#include <linux/netdevice.h>
@@ -61,6 +62,7 @@
61static s32 e1000_get_phy_id_82571(struct e1000_hw *hw); 62static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);
62static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw); 63static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);
63static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw); 64static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);
65static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw);
64static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset, 66static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
65 u16 words, u16 *data); 67 u16 words, u16 *data);
66static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw); 68static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);
@@ -99,6 +101,7 @@ static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
99 phy->type = e1000_phy_m88; 101 phy->type = e1000_phy_m88;
100 break; 102 break;
101 case e1000_82574: 103 case e1000_82574:
104 case e1000_82583:
102 phy->type = e1000_phy_bm; 105 phy->type = e1000_phy_bm;
103 break; 106 break;
104 default: 107 default:
@@ -121,6 +124,7 @@ static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
121 return -E1000_ERR_PHY; 124 return -E1000_ERR_PHY;
122 break; 125 break;
123 case e1000_82574: 126 case e1000_82574:
127 case e1000_82583:
124 if (phy->id != BME1000_E_PHY_ID_R2) 128 if (phy->id != BME1000_E_PHY_ID_R2)
125 return -E1000_ERR_PHY; 129 return -E1000_ERR_PHY;
126 break; 130 break;
@@ -164,6 +168,7 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)
164 switch (hw->mac.type) { 168 switch (hw->mac.type) {
165 case e1000_82573: 169 case e1000_82573:
166 case e1000_82574: 170 case e1000_82574:
171 case e1000_82583:
167 if (((eecd >> 15) & 0x3) == 0x3) { 172 if (((eecd >> 15) & 0x3) == 0x3) {
168 nvm->type = e1000_nvm_flash_hw; 173 nvm->type = e1000_nvm_flash_hw;
169 nvm->word_size = 2048; 174 nvm->word_size = 2048;
@@ -250,7 +255,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
250 case e1000_media_type_internal_serdes: 255 case e1000_media_type_internal_serdes:
251 func->setup_physical_interface = 256 func->setup_physical_interface =
252 e1000_setup_fiber_serdes_link_82571; 257 e1000_setup_fiber_serdes_link_82571;
253 func->check_for_link = e1000e_check_for_serdes_link; 258 func->check_for_link = e1000_check_for_serdes_link_82571;
254 func->get_link_up_info = 259 func->get_link_up_info =
255 e1000e_get_speed_and_duplex_fiber_serdes; 260 e1000e_get_speed_and_duplex_fiber_serdes;
256 break; 261 break;
@@ -261,6 +266,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
261 266
262 switch (hw->mac.type) { 267 switch (hw->mac.type) {
263 case e1000_82574: 268 case e1000_82574:
269 case e1000_82583:
264 func->check_mng_mode = e1000_check_mng_mode_82574; 270 func->check_mng_mode = e1000_check_mng_mode_82574;
265 func->led_on = e1000_led_on_82574; 271 func->led_on = e1000_led_on_82574;
266 break; 272 break;
@@ -374,6 +380,7 @@ static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)
374 return e1000e_get_phy_id(hw); 380 return e1000e_get_phy_id(hw);
375 break; 381 break;
376 case e1000_82574: 382 case e1000_82574:
383 case e1000_82583:
377 ret_val = e1e_rphy(hw, PHY_ID1, &phy_id); 384 ret_val = e1e_rphy(hw, PHY_ID1, &phy_id);
378 if (ret_val) 385 if (ret_val)
379 return ret_val; 386 return ret_val;
@@ -463,8 +470,15 @@ static s32 e1000_acquire_nvm_82571(struct e1000_hw *hw)
463 if (ret_val) 470 if (ret_val)
464 return ret_val; 471 return ret_val;
465 472
466 if (hw->mac.type != e1000_82573 && hw->mac.type != e1000_82574) 473 switch (hw->mac.type) {
474 case e1000_82573:
475 case e1000_82574:
476 case e1000_82583:
477 break;
478 default:
467 ret_val = e1000e_acquire_nvm(hw); 479 ret_val = e1000e_acquire_nvm(hw);
480 break;
481 }
468 482
469 if (ret_val) 483 if (ret_val)
470 e1000_put_hw_semaphore_82571(hw); 484 e1000_put_hw_semaphore_82571(hw);
@@ -504,6 +518,7 @@ static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words,
504 switch (hw->mac.type) { 518 switch (hw->mac.type) {
505 case e1000_82573: 519 case e1000_82573:
506 case e1000_82574: 520 case e1000_82574:
521 case e1000_82583:
507 ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data); 522 ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data);
508 break; 523 break;
509 case e1000_82571: 524 case e1000_82571:
@@ -778,7 +793,10 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
778 * Must acquire the MDIO ownership before MAC reset. 793 * Must acquire the MDIO ownership before MAC reset.
779 * Ownership defaults to firmware after a reset. 794 * Ownership defaults to firmware after a reset.
780 */ 795 */
781 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) { 796 switch (hw->mac.type) {
797 case e1000_82573:
798 case e1000_82574:
799 case e1000_82583:
782 extcnf_ctrl = er32(EXTCNF_CTRL); 800 extcnf_ctrl = er32(EXTCNF_CTRL);
783 extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP; 801 extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
784 802
@@ -794,6 +812,9 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
794 msleep(2); 812 msleep(2);
795 i++; 813 i++;
796 } while (i < MDIO_OWNERSHIP_TIMEOUT); 814 } while (i < MDIO_OWNERSHIP_TIMEOUT);
815 break;
816 default:
817 break;
797 } 818 }
798 819
799 ctrl = er32(CTRL); 820 ctrl = er32(CTRL);
@@ -819,8 +840,16 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
819 * Need to wait for Phy configuration completion before accessing 840 * Need to wait for Phy configuration completion before accessing
820 * NVM and Phy. 841 * NVM and Phy.
821 */ 842 */
822 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) 843
844 switch (hw->mac.type) {
845 case e1000_82573:
846 case e1000_82574:
847 case e1000_82583:
823 msleep(25); 848 msleep(25);
849 break;
850 default:
851 break;
852 }
824 853
825 /* Clear any pending interrupt events. */ 854 /* Clear any pending interrupt events. */
826 ew32(IMC, 0xffffffff); 855 ew32(IMC, 0xffffffff);
@@ -830,6 +859,10 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
830 hw->dev_spec.e82571.alt_mac_addr_is_present) 859 hw->dev_spec.e82571.alt_mac_addr_is_present)
831 e1000e_set_laa_state_82571(hw, true); 860 e1000e_set_laa_state_82571(hw, true);
832 861
862 /* Reinitialize the 82571 serdes link state machine */
863 if (hw->phy.media_type == e1000_media_type_internal_serdes)
864 hw->mac.serdes_link_state = e1000_serdes_link_down;
865
833 return 0; 866 return 0;
834} 867}
835 868
@@ -886,17 +919,22 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw)
886 ew32(TXDCTL(0), reg_data); 919 ew32(TXDCTL(0), reg_data);
887 920
888 /* ...for both queues. */ 921 /* ...for both queues. */
889 if (mac->type != e1000_82573 && mac->type != e1000_82574) { 922 switch (mac->type) {
923 case e1000_82573:
924 case e1000_82574:
925 case e1000_82583:
926 e1000e_enable_tx_pkt_filtering(hw);
927 reg_data = er32(GCR);
928 reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
929 ew32(GCR, reg_data);
930 break;
931 default:
890 reg_data = er32(TXDCTL(1)); 932 reg_data = er32(TXDCTL(1));
891 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | 933 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
892 E1000_TXDCTL_FULL_TX_DESC_WB | 934 E1000_TXDCTL_FULL_TX_DESC_WB |
893 E1000_TXDCTL_COUNT_DESC; 935 E1000_TXDCTL_COUNT_DESC;
894 ew32(TXDCTL(1), reg_data); 936 ew32(TXDCTL(1), reg_data);
895 } else { 937 break;
896 e1000e_enable_tx_pkt_filtering(hw);
897 reg_data = er32(GCR);
898 reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
899 ew32(GCR, reg_data);
900 } 938 }
901 939
902 /* 940 /*
@@ -961,18 +999,30 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
961 } 999 }
962 1000
963 /* Device Control */ 1001 /* Device Control */
964 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) { 1002 switch (hw->mac.type) {
1003 case e1000_82573:
1004 case e1000_82574:
1005 case e1000_82583:
965 reg = er32(CTRL); 1006 reg = er32(CTRL);
966 reg &= ~(1 << 29); 1007 reg &= ~(1 << 29);
967 ew32(CTRL, reg); 1008 ew32(CTRL, reg);
1009 break;
1010 default:
1011 break;
968 } 1012 }
969 1013
970 /* Extended Device Control */ 1014 /* Extended Device Control */
971 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) { 1015 switch (hw->mac.type) {
1016 case e1000_82573:
1017 case e1000_82574:
1018 case e1000_82583:
972 reg = er32(CTRL_EXT); 1019 reg = er32(CTRL_EXT);
973 reg &= ~(1 << 23); 1020 reg &= ~(1 << 23);
974 reg |= (1 << 22); 1021 reg |= (1 << 22);
975 ew32(CTRL_EXT, reg); 1022 ew32(CTRL_EXT, reg);
1023 break;
1024 default:
1025 break;
976 } 1026 }
977 1027
978 if (hw->mac.type == e1000_82571) { 1028 if (hw->mac.type == e1000_82571) {
@@ -980,9 +1030,23 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
980 reg |= E1000_PBA_ECC_CORR_EN; 1030 reg |= E1000_PBA_ECC_CORR_EN;
981 ew32(PBA_ECC, reg); 1031 ew32(PBA_ECC, reg);
982 } 1032 }
1033 /*
1034 * Workaround for hardware errata.
1035 * Ensure that DMA Dynamic Clock gating is disabled on 82571 and 82572
1036 */
1037
1038 if ((hw->mac.type == e1000_82571) ||
1039 (hw->mac.type == e1000_82572)) {
1040 reg = er32(CTRL_EXT);
1041 reg &= ~E1000_CTRL_EXT_DMA_DYN_CLK_EN;
1042 ew32(CTRL_EXT, reg);
1043 }
1044
983 1045
984 /* PCI-Ex Control Registers */ 1046 /* PCI-Ex Control Registers */
985 if (hw->mac.type == e1000_82574) { 1047 switch (hw->mac.type) {
1048 case e1000_82574:
1049 case e1000_82583:
986 reg = er32(GCR); 1050 reg = er32(GCR);
987 reg |= (1 << 22); 1051 reg |= (1 << 22);
988 ew32(GCR, reg); 1052 ew32(GCR, reg);
@@ -990,6 +1054,9 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
990 reg = er32(GCR2); 1054 reg = er32(GCR2);
991 reg |= 1; 1055 reg |= 1;
992 ew32(GCR2, reg); 1056 ew32(GCR2, reg);
1057 break;
1058 default:
1059 break;
993 } 1060 }
994 1061
995 return; 1062 return;
@@ -1009,7 +1076,10 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
1009 u32 vfta_offset = 0; 1076 u32 vfta_offset = 0;
1010 u32 vfta_bit_in_reg = 0; 1077 u32 vfta_bit_in_reg = 0;
1011 1078
1012 if (hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) { 1079 switch (hw->mac.type) {
1080 case e1000_82573:
1081 case e1000_82574:
1082 case e1000_82583:
1013 if (hw->mng_cookie.vlan_id != 0) { 1083 if (hw->mng_cookie.vlan_id != 0) {
1014 /* 1084 /*
1015 * The VFTA is a 4096b bit-field, each identifying 1085 * The VFTA is a 4096b bit-field, each identifying
@@ -1024,6 +1094,9 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
1024 vfta_bit_in_reg = 1 << (hw->mng_cookie.vlan_id & 1094 vfta_bit_in_reg = 1 << (hw->mng_cookie.vlan_id &
1025 E1000_VFTA_ENTRY_BIT_SHIFT_MASK); 1095 E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
1026 } 1096 }
1097 break;
1098 default:
1099 break;
1027 } 1100 }
1028 for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) { 1101 for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
1029 /* 1102 /*
@@ -1122,9 +1195,16 @@ static s32 e1000_setup_link_82571(struct e1000_hw *hw)
1122 * the default flow control setting, so we explicitly 1195 * the default flow control setting, so we explicitly
1123 * set it to full. 1196 * set it to full.
1124 */ 1197 */
1125 if ((hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) && 1198 switch (hw->mac.type) {
1126 hw->fc.requested_mode == e1000_fc_default) 1199 case e1000_82573:
1127 hw->fc.requested_mode = e1000_fc_full; 1200 case e1000_82574:
1201 case e1000_82583:
1202 if (hw->fc.requested_mode == e1000_fc_default)
1203 hw->fc.requested_mode = e1000_fc_full;
1204 break;
1205 default:
1206 break;
1207 }
1128 1208
1129 return e1000e_setup_link(hw); 1209 return e1000e_setup_link(hw);
1130} 1210}
@@ -1203,6 +1283,131 @@ static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
1203} 1283}
1204 1284
1205/** 1285/**
1286 * e1000_check_for_serdes_link_82571 - Check for link (Serdes)
1287 * @hw: pointer to the HW structure
1288 *
1289 * Checks for link up on the hardware. If link is not up and we have
1290 * a signal, then we need to force link up.
1291 **/
1292static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw)
1293{
1294 struct e1000_mac_info *mac = &hw->mac;
1295 u32 rxcw;
1296 u32 ctrl;
1297 u32 status;
1298 s32 ret_val = 0;
1299
1300 ctrl = er32(CTRL);
1301 status = er32(STATUS);
1302 rxcw = er32(RXCW);
1303
1304 if ((rxcw & E1000_RXCW_SYNCH) && !(rxcw & E1000_RXCW_IV)) {
1305
1306 /* Receiver is synchronized with no invalid bits. */
1307 switch (mac->serdes_link_state) {
1308 case e1000_serdes_link_autoneg_complete:
1309 if (!(status & E1000_STATUS_LU)) {
1310 /*
1311 * We have lost link, retry autoneg before
1312 * reporting link failure
1313 */
1314 mac->serdes_link_state =
1315 e1000_serdes_link_autoneg_progress;
1316 hw_dbg(hw, "AN_UP -> AN_PROG\n");
1317 }
1318 break;
1319
1320 case e1000_serdes_link_forced_up:
1321 /*
1322 * If we are receiving /C/ ordered sets, re-enable
1323 * auto-negotiation in the TXCW register and disable
1324 * forced link in the Device Control register in an
1325 * attempt to auto-negotiate with our link partner.
1326 */
1327 if (rxcw & E1000_RXCW_C) {
1328 /* Enable autoneg, and unforce link up */
1329 ew32(TXCW, mac->txcw);
1330 ew32(CTRL,
1331 (ctrl & ~E1000_CTRL_SLU));
1332 mac->serdes_link_state =
1333 e1000_serdes_link_autoneg_progress;
1334 hw_dbg(hw, "FORCED_UP -> AN_PROG\n");
1335 }
1336 break;
1337
1338 case e1000_serdes_link_autoneg_progress:
1339 /*
1340 * If the LU bit is set in the STATUS register,
1341 * autoneg has completed sucessfully. If not,
1342 * try foring the link because the far end may be
1343 * available but not capable of autonegotiation.
1344 */
1345 if (status & E1000_STATUS_LU) {
1346 mac->serdes_link_state =
1347 e1000_serdes_link_autoneg_complete;
1348 hw_dbg(hw, "AN_PROG -> AN_UP\n");
1349 } else {
1350 /*
1351 * Disable autoneg, force link up and
1352 * full duplex, and change state to forced
1353 */
1354 ew32(TXCW,
1355 (mac->txcw & ~E1000_TXCW_ANE));
1356 ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD);
1357 ew32(CTRL, ctrl);
1358
1359 /* Configure Flow Control after link up. */
1360 ret_val =
1361 e1000e_config_fc_after_link_up(hw);
1362 if (ret_val) {
1363 hw_dbg(hw, "Error config flow control\n");
1364 break;
1365 }
1366 mac->serdes_link_state =
1367 e1000_serdes_link_forced_up;
1368 hw_dbg(hw, "AN_PROG -> FORCED_UP\n");
1369 }
1370 mac->serdes_has_link = true;
1371 break;
1372
1373 case e1000_serdes_link_down:
1374 default:
1375 /* The link was down but the receiver has now gained
1376 * valid sync, so lets see if we can bring the link
1377 * up. */
1378 ew32(TXCW, mac->txcw);
1379 ew32(CTRL,
1380 (ctrl & ~E1000_CTRL_SLU));
1381 mac->serdes_link_state =
1382 e1000_serdes_link_autoneg_progress;
1383 hw_dbg(hw, "DOWN -> AN_PROG\n");
1384 break;
1385 }
1386 } else {
1387 if (!(rxcw & E1000_RXCW_SYNCH)) {
1388 mac->serdes_has_link = false;
1389 mac->serdes_link_state = e1000_serdes_link_down;
1390 hw_dbg(hw, "ANYSTATE -> DOWN\n");
1391 } else {
1392 /*
1393 * We have sync, and can tolerate one
1394 * invalid (IV) codeword before declaring
1395 * link down, so reread to look again
1396 */
1397 udelay(10);
1398 rxcw = er32(RXCW);
1399 if (rxcw & E1000_RXCW_IV) {
1400 mac->serdes_link_state = e1000_serdes_link_down;
1401 mac->serdes_has_link = false;
1402 hw_dbg(hw, "ANYSTATE -> DOWN\n");
1403 }
1404 }
1405 }
1406
1407 return ret_val;
1408}
1409
1410/**
1206 * e1000_valid_led_default_82571 - Verify a valid default LED config 1411 * e1000_valid_led_default_82571 - Verify a valid default LED config
1207 * @hw: pointer to the HW structure 1412 * @hw: pointer to the HW structure
1208 * @data: pointer to the NVM (EEPROM) 1413 * @data: pointer to the NVM (EEPROM)
@@ -1220,11 +1425,19 @@ static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data)
1220 return ret_val; 1425 return ret_val;
1221 } 1426 }
1222 1427
1223 if ((hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574) && 1428 switch (hw->mac.type) {
1224 *data == ID_LED_RESERVED_F746) 1429 case e1000_82573:
1225 *data = ID_LED_DEFAULT_82573; 1430 case e1000_82574:
1226 else if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) 1431 case e1000_82583:
1227 *data = ID_LED_DEFAULT; 1432 if (*data == ID_LED_RESERVED_F746)
1433 *data = ID_LED_DEFAULT_82573;
1434 break;
1435 default:
1436 if (*data == ID_LED_RESERVED_0000 ||
1437 *data == ID_LED_RESERVED_FFFF)
1438 *data = ID_LED_DEFAULT;
1439 break;
1440 }
1228 1441
1229 return 0; 1442 return 0;
1230} 1443}
@@ -1517,3 +1730,19 @@ struct e1000_info e1000_82574_info = {
1517 .nvm_ops = &e82571_nvm_ops, 1730 .nvm_ops = &e82571_nvm_ops,
1518}; 1731};
1519 1732
1733struct e1000_info e1000_82583_info = {
1734 .mac = e1000_82583,
1735 .flags = FLAG_HAS_HW_VLAN_FILTER
1736 | FLAG_HAS_WOL
1737 | FLAG_APME_IN_CTRL3
1738 | FLAG_RX_CSUM_ENABLED
1739 | FLAG_HAS_SMART_POWER_DOWN
1740 | FLAG_HAS_AMT
1741 | FLAG_HAS_CTRLEXT_ON_LOAD,
1742 .pba = 20,
1743 .get_variants = e1000_get_variants_82571,
1744 .mac_ops = &e82571_mac_ops,
1745 .phy_ops = &e82_phy_ops_bm,
1746 .nvm_ops = &e82571_nvm_ops,
1747};
1748