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path: root/drivers/net/e1000/e1000_hw.h
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Diffstat (limited to 'drivers/net/e1000/e1000_hw.h')
-rw-r--r--drivers/net/e1000/e1000_hw.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index 798dc031a7c6..47f34f213ac5 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -313,7 +313,7 @@ int32_t e1000_setup_link(struct e1000_hw *hw);
313int32_t e1000_phy_setup_autoneg(struct e1000_hw *hw); 313int32_t e1000_phy_setup_autoneg(struct e1000_hw *hw);
314void e1000_config_collision_dist(struct e1000_hw *hw); 314void e1000_config_collision_dist(struct e1000_hw *hw);
315int32_t e1000_check_for_link(struct e1000_hw *hw); 315int32_t e1000_check_for_link(struct e1000_hw *hw);
316int32_t e1000_get_speed_and_duplex(struct e1000_hw *hw, uint16_t * speed, uint16_t * duplex); 316int32_t e1000_get_speed_and_duplex(struct e1000_hw *hw, uint16_t *speed, uint16_t *duplex);
317int32_t e1000_force_mac_fc(struct e1000_hw *hw); 317int32_t e1000_force_mac_fc(struct e1000_hw *hw);
318 318
319/* PHY */ 319/* PHY */
@@ -321,9 +321,9 @@ int32_t e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy
321int32_t e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data); 321int32_t e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data);
322int32_t e1000_phy_hw_reset(struct e1000_hw *hw); 322int32_t e1000_phy_hw_reset(struct e1000_hw *hw);
323int32_t e1000_phy_reset(struct e1000_hw *hw); 323int32_t e1000_phy_reset(struct e1000_hw *hw);
324void e1000_phy_powerdown_workaround(struct e1000_hw *hw);
325int32_t e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info); 324int32_t e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
326int32_t e1000_validate_mdi_setting(struct e1000_hw *hw); 325int32_t e1000_validate_mdi_setting(struct e1000_hw *hw);
326void e1000_phy_powerdown_workaround(struct e1000_hw *hw);
327 327
328/* EEPROM Functions */ 328/* EEPROM Functions */
329int32_t e1000_init_eeprom_params(struct e1000_hw *hw); 329int32_t e1000_init_eeprom_params(struct e1000_hw *hw);
@@ -392,7 +392,6 @@ int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uin
392int32_t e1000_validate_eeprom_checksum(struct e1000_hw *hw); 392int32_t e1000_validate_eeprom_checksum(struct e1000_hw *hw);
393int32_t e1000_update_eeprom_checksum(struct e1000_hw *hw); 393int32_t e1000_update_eeprom_checksum(struct e1000_hw *hw);
394int32_t e1000_write_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data); 394int32_t e1000_write_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data);
395int32_t e1000_read_part_num(struct e1000_hw *hw, uint32_t * part_num);
396int32_t e1000_read_mac_addr(struct e1000_hw * hw); 395int32_t e1000_read_mac_addr(struct e1000_hw * hw);
397 396
398/* Filters (multicast, vlan, receive) */ 397/* Filters (multicast, vlan, receive) */
@@ -1612,16 +1611,17 @@ struct e1000_hw {
1612#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 1611#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
1613#define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000 1612#define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000
1614#define E1000_CTRL_EXT_LINK_MODE_TBI 0x00C00000 1613#define E1000_CTRL_EXT_LINK_MODE_TBI 0x00C00000
1615#define E1000_CTRL_EXT_LINK_MODE_KMRN 0x00000000 1614#define E1000_CTRL_EXT_LINK_MODE_KMRN 0x00000000
1616#define E1000_CTRL_EXT_LINK_MODE_SERDES 0x00C00000 1615#define E1000_CTRL_EXT_LINK_MODE_SERDES 0x00C00000
1616#define E1000_CTRL_EXT_LINK_MODE_SGMII 0x00800000
1617#define E1000_CTRL_EXT_WR_WMARK_MASK 0x03000000 1617#define E1000_CTRL_EXT_WR_WMARK_MASK 0x03000000
1618#define E1000_CTRL_EXT_WR_WMARK_256 0x00000000 1618#define E1000_CTRL_EXT_WR_WMARK_256 0x00000000
1619#define E1000_CTRL_EXT_WR_WMARK_320 0x01000000 1619#define E1000_CTRL_EXT_WR_WMARK_320 0x01000000
1620#define E1000_CTRL_EXT_WR_WMARK_384 0x02000000 1620#define E1000_CTRL_EXT_WR_WMARK_384 0x02000000
1621#define E1000_CTRL_EXT_WR_WMARK_448 0x03000000 1621#define E1000_CTRL_EXT_WR_WMARK_448 0x03000000
1622#define E1000_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */ 1622#define E1000_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */
1623#define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */ 1623#define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */
1624#define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */ 1624#define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */
1625#define E1000_CRTL_EXT_PB_PAREN 0x01000000 /* packet buffer parity error detection enabled */ 1625#define E1000_CRTL_EXT_PB_PAREN 0x01000000 /* packet buffer parity error detection enabled */
1626#define E1000_CTRL_EXT_DF_PAREN 0x02000000 /* descriptor FIFO parity error detection enable */ 1626#define E1000_CTRL_EXT_DF_PAREN 0x02000000 /* descriptor FIFO parity error detection enable */
1627#define E1000_CTRL_EXT_GHOST_PAREN 0x40000000 1627#define E1000_CTRL_EXT_GHOST_PAREN 0x40000000