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Diffstat (limited to 'drivers/net/e1000/e1000_hw.h')
-rw-r--r--drivers/net/e1000/e1000_hw.h26
1 files changed, 14 insertions, 12 deletions
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index 375b95518c31..a170e96251f6 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -336,9 +336,9 @@ uint32_t e1000_enable_mng_pass_thru(struct e1000_hw *hw);
336#define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8 /* Host Interface data length */ 336#define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8 /* Host Interface data length */
337 337
338#define E1000_MNG_DHCP_COMMAND_TIMEOUT 10 /* Time in ms to process MNG command */ 338#define E1000_MNG_DHCP_COMMAND_TIMEOUT 10 /* Time in ms to process MNG command */
339#define E1000_MNG_DHCP_COOKIE_OFFSET 0x6F0 /* Cookie offset */ 339#define E1000_MNG_DHCP_COOKIE_OFFSET 0x6F0 /* Cookie offset */
340#define E1000_MNG_DHCP_COOKIE_LENGTH 0x10 /* Cookie length */ 340#define E1000_MNG_DHCP_COOKIE_LENGTH 0x10 /* Cookie length */
341#define E1000_MNG_IAMT_MODE 0x3 341#define E1000_MNG_IAMT_MODE 0x3
342#define E1000_MNG_ICH_IAMT_MODE 0x2 342#define E1000_MNG_ICH_IAMT_MODE 0x2
343#define E1000_IAMT_SIGNATURE 0x544D4149 /* Intel(R) Active Management Technology signature */ 343#define E1000_IAMT_SIGNATURE 0x544D4149 /* Intel(R) Active Management Technology signature */
344 344
@@ -385,7 +385,7 @@ struct e1000_host_mng_dhcp_cookie{
385#endif 385#endif
386 386
387int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer, 387int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer,
388 uint16_t length); 388 uint16_t length);
389boolean_t e1000_check_mng_mode(struct e1000_hw *hw); 389boolean_t e1000_check_mng_mode(struct e1000_hw *hw);
390boolean_t e1000_enable_tx_pkt_filtering(struct e1000_hw *hw); 390boolean_t e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
391 391
@@ -470,6 +470,7 @@ int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
470#define E1000_DEV_ID_82571EB_COPPER 0x105E 470#define E1000_DEV_ID_82571EB_COPPER 0x105E
471#define E1000_DEV_ID_82571EB_FIBER 0x105F 471#define E1000_DEV_ID_82571EB_FIBER 0x105F
472#define E1000_DEV_ID_82571EB_SERDES 0x1060 472#define E1000_DEV_ID_82571EB_SERDES 0x1060
473#define E1000_DEV_ID_82571EB_QUAD_COPPER 0x10A4
473#define E1000_DEV_ID_82572EI_COPPER 0x107D 474#define E1000_DEV_ID_82572EI_COPPER 0x107D
474#define E1000_DEV_ID_82572EI_FIBER 0x107E 475#define E1000_DEV_ID_82572EI_FIBER 0x107E
475#define E1000_DEV_ID_82572EI_SERDES 0x107F 476#define E1000_DEV_ID_82572EI_SERDES 0x107F
@@ -523,7 +524,7 @@ int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
523 524
524 525
525/* 802.1q VLAN Packet Sizes */ 526/* 802.1q VLAN Packet Sizes */
526#define VLAN_TAG_SIZE 4 /* 802.3ac tag (not DMAed) */ 527#define VLAN_TAG_SIZE 4 /* 802.3ac tag (not DMAed) */
527 528
528/* Ethertype field values */ 529/* Ethertype field values */
529#define ETHERNET_IEEE_VLAN_TYPE 0x8100 /* 802.3ac packet */ 530#define ETHERNET_IEEE_VLAN_TYPE 0x8100 /* 802.3ac packet */
@@ -697,6 +698,7 @@ union e1000_rx_desc_packet_split {
697 E1000_RXDEXT_STATERR_CXE | \ 698 E1000_RXDEXT_STATERR_CXE | \
698 E1000_RXDEXT_STATERR_RXE) 699 E1000_RXDEXT_STATERR_RXE)
699 700
701
700/* Transmit Descriptor */ 702/* Transmit Descriptor */
701struct e1000_tx_desc { 703struct e1000_tx_desc {
702 uint64_t buffer_addr; /* Address of the descriptor's data buffer */ 704 uint64_t buffer_addr; /* Address of the descriptor's data buffer */
@@ -2086,7 +2088,7 @@ struct e1000_hw {
2086#define E1000_MANC_EN_IP_ADDR_FILTER 0x00400000 /* Enable IP address 2088#define E1000_MANC_EN_IP_ADDR_FILTER 0x00400000 /* Enable IP address
2087 * filtering */ 2089 * filtering */
2088#define E1000_MANC_EN_XSUM_FILTER 0x00800000 /* Enable checksum filtering */ 2090#define E1000_MANC_EN_XSUM_FILTER 0x00800000 /* Enable checksum filtering */
2089#define E1000_MANC_BR_EN 0x01000000 /* Enable broadcast filtering */ 2091#define E1000_MANC_BR_EN 0x01000000 /* Enable broadcast filtering */
2090#define E1000_MANC_SMB_REQ 0x01000000 /* SMBus Request */ 2092#define E1000_MANC_SMB_REQ 0x01000000 /* SMBus Request */
2091#define E1000_MANC_SMB_GNT 0x02000000 /* SMBus Grant */ 2093#define E1000_MANC_SMB_GNT 0x02000000 /* SMBus Grant */
2092#define E1000_MANC_SMB_CLK_IN 0x04000000 /* SMBus Clock In */ 2094#define E1000_MANC_SMB_CLK_IN 0x04000000 /* SMBus Clock In */
@@ -2172,7 +2174,7 @@ struct e1000_host_command_info {
2172 2174
2173#define E1000_MDALIGN 4096 2175#define E1000_MDALIGN 4096
2174 2176
2175/* PCI-Ex registers */ 2177/* PCI-Ex registers*/
2176 2178
2177/* PCI-Ex Control Register */ 2179/* PCI-Ex Control Register */
2178#define E1000_GCR_RXD_NO_SNOOP 0x00000001 2180#define E1000_GCR_RXD_NO_SNOOP 0x00000001
@@ -2224,7 +2226,7 @@ struct e1000_host_command_info {
2224#define EEPROM_EWDS_OPCODE_MICROWIRE 0x10 /* EEPROM erast/write disable */ 2226#define EEPROM_EWDS_OPCODE_MICROWIRE 0x10 /* EEPROM erast/write disable */
2225 2227
2226/* EEPROM Commands - SPI */ 2228/* EEPROM Commands - SPI */
2227#define EEPROM_MAX_RETRY_SPI 5000 /* Max wait of 5ms, for RDY signal */ 2229#define EEPROM_MAX_RETRY_SPI 5000 /* Max wait of 5ms, for RDY signal */
2228#define EEPROM_READ_OPCODE_SPI 0x03 /* EEPROM read opcode */ 2230#define EEPROM_READ_OPCODE_SPI 0x03 /* EEPROM read opcode */
2229#define EEPROM_WRITE_OPCODE_SPI 0x02 /* EEPROM write opcode */ 2231#define EEPROM_WRITE_OPCODE_SPI 0x02 /* EEPROM write opcode */
2230#define EEPROM_A8_OPCODE_SPI 0x08 /* opcode bit-3 = address bit-8 */ 2232#define EEPROM_A8_OPCODE_SPI 0x08 /* opcode bit-3 = address bit-8 */
@@ -3082,10 +3084,10 @@ struct e1000_host_command_info {
3082 3084
3083/* DSP Distance Register (Page 5, Register 26) */ 3085/* DSP Distance Register (Page 5, Register 26) */
3084#define GG82563_DSPD_CABLE_LENGTH 0x0007 /* 0 = <50M; 3086#define GG82563_DSPD_CABLE_LENGTH 0x0007 /* 0 = <50M;
3085 1 = 50-80M; 3087 1 = 50-80M;
3086 2 = 80-110M; 3088 2 = 80-110M;
3087 3 = 110-140M; 3089 3 = 110-140M;
3088 4 = >140M */ 3090 4 = >140M */
3089 3091
3090/* Kumeran Mode Control Register (Page 193, Register 16) */ 3092/* Kumeran Mode Control Register (Page 193, Register 16) */
3091#define GG82563_KMCR_PHY_LEDS_EN 0x0020 /* 1=PHY LEDs, 0=Kumeran Inband LEDs */ 3093#define GG82563_KMCR_PHY_LEDS_EN 0x0020 /* 1=PHY LEDs, 0=Kumeran Inband LEDs */