diff options
Diffstat (limited to 'drivers/net/e1000/e1000_hw.h')
-rw-r--r-- | drivers/net/e1000/e1000_hw.h | 73 |
1 files changed, 36 insertions, 37 deletions
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h index 93c1e260ee6a..3321fb13bfa9 100644 --- a/drivers/net/e1000/e1000_hw.h +++ b/drivers/net/e1000/e1000_hw.h | |||
@@ -1583,8 +1583,8 @@ struct e1000_hw { | |||
1583 | #define E1000_HICR_FW_RESET 0xC0 | 1583 | #define E1000_HICR_FW_RESET 0xC0 |
1584 | 1584 | ||
1585 | #define E1000_SHADOW_RAM_WORDS 2048 | 1585 | #define E1000_SHADOW_RAM_WORDS 2048 |
1586 | #define E1000_ICH8_NVM_SIG_WORD 0x13 | 1586 | #define E1000_ICH_NVM_SIG_WORD 0x13 |
1587 | #define E1000_ICH8_NVM_SIG_MASK 0xC0 | 1587 | #define E1000_ICH_NVM_SIG_MASK 0xC0 |
1588 | 1588 | ||
1589 | /* EEPROM Read */ | 1589 | /* EEPROM Read */ |
1590 | #define E1000_EERD_START 0x00000001 /* Start Read */ | 1590 | #define E1000_EERD_START 0x00000001 /* Start Read */ |
@@ -3263,41 +3263,40 @@ struct e1000_host_command_info { | |||
3263 | #define IFE_PSCL_PROBE_LEDS_OFF 0x0006 /* Force LEDs 0 and 2 off */ | 3263 | #define IFE_PSCL_PROBE_LEDS_OFF 0x0006 /* Force LEDs 0 and 2 off */ |
3264 | #define IFE_PSCL_PROBE_LEDS_ON 0x0007 /* Force LEDs 0 and 2 on */ | 3264 | #define IFE_PSCL_PROBE_LEDS_ON 0x0007 /* Force LEDs 0 and 2 on */ |
3265 | 3265 | ||
3266 | #define ICH8_FLASH_COMMAND_TIMEOUT 5000 /* 5000 uSecs - adjusted */ | 3266 | #define ICH_FLASH_COMMAND_TIMEOUT 5000 /* 5000 uSecs - adjusted */ |
3267 | #define ICH8_FLASH_ERASE_TIMEOUT 3000000 /* Up to 3 seconds - worst case */ | 3267 | #define ICH_FLASH_ERASE_TIMEOUT 3000000 /* Up to 3 seconds - worst case */ |
3268 | #define ICH8_FLASH_CYCLE_REPEAT_COUNT 10 /* 10 cycles */ | 3268 | #define ICH_FLASH_CYCLE_REPEAT_COUNT 10 /* 10 cycles */ |
3269 | #define ICH8_FLASH_SEG_SIZE_256 256 | 3269 | #define ICH_FLASH_SEG_SIZE_256 256 |
3270 | #define ICH8_FLASH_SEG_SIZE_4K 4096 | 3270 | #define ICH_FLASH_SEG_SIZE_4K 4096 |
3271 | #define ICH9_FLASH_SEG_SIZE_8K 8192 | 3271 | #define ICH_FLASH_SEG_SIZE_64K 65536 |
3272 | #define ICH8_FLASH_SEG_SIZE_64K 65536 | 3272 | |
3273 | 3273 | #define ICH_CYCLE_READ 0x0 | |
3274 | #define ICH8_CYCLE_READ 0x0 | 3274 | #define ICH_CYCLE_RESERVED 0x1 |
3275 | #define ICH8_CYCLE_RESERVED 0x1 | 3275 | #define ICH_CYCLE_WRITE 0x2 |
3276 | #define ICH8_CYCLE_WRITE 0x2 | 3276 | #define ICH_CYCLE_ERASE 0x3 |
3277 | #define ICH8_CYCLE_ERASE 0x3 | 3277 | |
3278 | 3278 | #define ICH_FLASH_GFPREG 0x0000 | |
3279 | #define ICH8_FLASH_GFPREG 0x0000 | 3279 | #define ICH_FLASH_HSFSTS 0x0004 |
3280 | #define ICH8_FLASH_HSFSTS 0x0004 | 3280 | #define ICH_FLASH_HSFCTL 0x0006 |
3281 | #define ICH8_FLASH_HSFCTL 0x0006 | 3281 | #define ICH_FLASH_FADDR 0x0008 |
3282 | #define ICH8_FLASH_FADDR 0x0008 | 3282 | #define ICH_FLASH_FDATA0 0x0010 |
3283 | #define ICH8_FLASH_FDATA0 0x0010 | 3283 | #define ICH_FLASH_FRACC 0x0050 |
3284 | #define ICH8_FLASH_FRACC 0x0050 | 3284 | #define ICH_FLASH_FREG0 0x0054 |
3285 | #define ICH8_FLASH_FREG0 0x0054 | 3285 | #define ICH_FLASH_FREG1 0x0058 |
3286 | #define ICH8_FLASH_FREG1 0x0058 | 3286 | #define ICH_FLASH_FREG2 0x005C |
3287 | #define ICH8_FLASH_FREG2 0x005C | 3287 | #define ICH_FLASH_FREG3 0x0060 |
3288 | #define ICH8_FLASH_FREG3 0x0060 | 3288 | #define ICH_FLASH_FPR0 0x0074 |
3289 | #define ICH8_FLASH_FPR0 0x0074 | 3289 | #define ICH_FLASH_FPR1 0x0078 |
3290 | #define ICH8_FLASH_FPR1 0x0078 | 3290 | #define ICH_FLASH_SSFSTS 0x0090 |
3291 | #define ICH8_FLASH_SSFSTS 0x0090 | 3291 | #define ICH_FLASH_SSFCTL 0x0092 |
3292 | #define ICH8_FLASH_SSFCTL 0x0092 | 3292 | #define ICH_FLASH_PREOP 0x0094 |
3293 | #define ICH8_FLASH_PREOP 0x0094 | 3293 | #define ICH_FLASH_OPTYPE 0x0096 |
3294 | #define ICH8_FLASH_OPTYPE 0x0096 | 3294 | #define ICH_FLASH_OPMENU 0x0098 |
3295 | #define ICH8_FLASH_OPMENU 0x0098 | 3295 | |
3296 | 3296 | #define ICH_FLASH_REG_MAPSIZE 0x00A0 | |
3297 | #define ICH8_FLASH_REG_MAPSIZE 0x00A0 | 3297 | #define ICH_FLASH_SECTOR_SIZE 4096 |
3298 | #define ICH8_FLASH_SECTOR_SIZE 4096 | 3298 | #define ICH_GFPREG_BASE_MASK 0x1FFF |
3299 | #define ICH8_GFPREG_BASE_MASK 0x1FFF | 3299 | #define ICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF |
3300 | #define ICH8_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF | ||
3301 | 3300 | ||
3302 | /* ICH8 GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ | 3301 | /* ICH8 GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ |
3303 | /* Offset 04h HSFSTS */ | 3302 | /* Offset 04h HSFSTS */ |