diff options
Diffstat (limited to 'drivers/net/e1000/e1000_hw.c')
-rw-r--r-- | drivers/net/e1000/e1000_hw.c | 46 |
1 files changed, 29 insertions, 17 deletions
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 1c5b18478fb2..37eb351b4c9b 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c | |||
@@ -1565,28 +1565,40 @@ e1000_copper_link_mgp_setup(struct e1000_hw *hw) | |||
1565 | phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL; | 1565 | phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL; |
1566 | if(hw->disable_polarity_correction == 1) | 1566 | if(hw->disable_polarity_correction == 1) |
1567 | phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; | 1567 | phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; |
1568 | ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); | 1568 | ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); |
1569 | if(ret_val) | 1569 | if (ret_val) |
1570 | return ret_val; | ||
1571 | |||
1572 | /* Force TX_CLK in the Extended PHY Specific Control Register | ||
1573 | * to 25MHz clock. | ||
1574 | */ | ||
1575 | ret_val = e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data); | ||
1576 | if(ret_val) | ||
1577 | return ret_val; | 1570 | return ret_val; |
1578 | 1571 | ||
1579 | phy_data |= M88E1000_EPSCR_TX_CLK_25; | ||
1580 | |||
1581 | if (hw->phy_revision < M88E1011_I_REV_4) { | 1572 | if (hw->phy_revision < M88E1011_I_REV_4) { |
1582 | /* Configure Master and Slave downshift values */ | 1573 | /* Force TX_CLK in the Extended PHY Specific Control Register |
1583 | phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK | | 1574 | * to 25MHz clock. |
1575 | */ | ||
1576 | ret_val = e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data); | ||
1577 | if (ret_val) | ||
1578 | return ret_val; | ||
1579 | |||
1580 | phy_data |= M88E1000_EPSCR_TX_CLK_25; | ||
1581 | |||
1582 | if ((hw->phy_revision == E1000_REVISION_2) && | ||
1583 | (hw->phy_id == M88E1111_I_PHY_ID)) { | ||
1584 | /* Vidalia Phy, set the downshift counter to 5x */ | ||
1585 | phy_data &= ~(M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK); | ||
1586 | phy_data |= M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X; | ||
1587 | ret_val = e1000_write_phy_reg(hw, | ||
1588 | M88E1000_EXT_PHY_SPEC_CTRL, phy_data); | ||
1589 | if (ret_val) | ||
1590 | return ret_val; | ||
1591 | } else { | ||
1592 | /* Configure Master and Slave downshift values */ | ||
1593 | phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK | | ||
1584 | M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK); | 1594 | M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK); |
1585 | phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X | | 1595 | phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X | |
1586 | M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X); | 1596 | M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X); |
1587 | ret_val = e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_data); | 1597 | ret_val = e1000_write_phy_reg(hw, |
1588 | if(ret_val) | 1598 | M88E1000_EXT_PHY_SPEC_CTRL, phy_data); |
1589 | return ret_val; | 1599 | if (ret_val) |
1600 | return ret_val; | ||
1601 | } | ||
1590 | } | 1602 | } |
1591 | 1603 | ||
1592 | /* SW Reset the PHY so all changes take effect */ | 1604 | /* SW Reset the PHY so all changes take effect */ |