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path: root/drivers/net/e1000/e1000_hw.c
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Diffstat (limited to 'drivers/net/e1000/e1000_hw.c')
-rw-r--r--drivers/net/e1000/e1000_hw.c88
1 files changed, 44 insertions, 44 deletions
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c
index 2e211df16986..3959039b16ec 100644
--- a/drivers/net/e1000/e1000_hw.c
+++ b/drivers/net/e1000/e1000_hw.c
@@ -765,7 +765,7 @@ e1000_init_hw(struct e1000_hw *hw)
765 } 765 }
766 766
767 if (hw->mac_type == e1000_82573) { 767 if (hw->mac_type == e1000_82573) {
768 e1000_enable_tx_pkt_filtering(hw); 768 e1000_enable_tx_pkt_filtering(hw);
769 } 769 }
770 770
771 switch (hw->mac_type) { 771 switch (hw->mac_type) {
@@ -861,7 +861,7 @@ e1000_adjust_serdes_amplitude(struct e1000_hw *hw)
861 861
862 if(eeprom_data != EEPROM_RESERVED_WORD) { 862 if(eeprom_data != EEPROM_RESERVED_WORD) {
863 /* Adjust SERDES output amplitude only. */ 863 /* Adjust SERDES output amplitude only. */
864 eeprom_data &= EEPROM_SERDES_AMPLITUDE_MASK; 864 eeprom_data &= EEPROM_SERDES_AMPLITUDE_MASK;
865 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL, eeprom_data); 865 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL, eeprom_data);
866 if(ret_val) 866 if(ret_val)
867 return ret_val; 867 return ret_val;
@@ -1228,7 +1228,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
1228 1228
1229 if (hw->phy_reset_disable) 1229 if (hw->phy_reset_disable)
1230 return E1000_SUCCESS; 1230 return E1000_SUCCESS;
1231 1231
1232 ret_val = e1000_phy_reset(hw); 1232 ret_val = e1000_phy_reset(hw);
1233 if (ret_val) { 1233 if (ret_val) {
1234 DEBUGOUT("Error Resetting the PHY\n"); 1234 DEBUGOUT("Error Resetting the PHY\n");
@@ -1370,7 +1370,7 @@ e1000_copper_link_ggp_setup(struct e1000_hw *hw)
1370 DEBUGFUNC("e1000_copper_link_ggp_setup"); 1370 DEBUGFUNC("e1000_copper_link_ggp_setup");
1371 1371
1372 if(!hw->phy_reset_disable) { 1372 if(!hw->phy_reset_disable) {
1373 1373
1374 /* Enable CRS on TX for half-duplex operation. */ 1374 /* Enable CRS on TX for half-duplex operation. */
1375 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, 1375 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
1376 &phy_data); 1376 &phy_data);
@@ -1519,7 +1519,7 @@ e1000_copper_link_mgp_setup(struct e1000_hw *hw)
1519 1519
1520 if(hw->phy_reset_disable) 1520 if(hw->phy_reset_disable)
1521 return E1000_SUCCESS; 1521 return E1000_SUCCESS;
1522 1522
1523 /* Enable CRS on TX. This must be set for half-duplex operation. */ 1523 /* Enable CRS on TX. This must be set for half-duplex operation. */
1524 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); 1524 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1525 if(ret_val) 1525 if(ret_val)
@@ -1665,7 +1665,7 @@ e1000_copper_link_autoneg(struct e1000_hw *hw)
1665* collision distance in the Transmit Control Register. 1665* collision distance in the Transmit Control Register.
1666* 2) Set up flow control on the MAC to that established with 1666* 2) Set up flow control on the MAC to that established with
1667* the link partner. 1667* the link partner.
1668* 3) Config DSP to improve Gigabit link quality for some PHY revisions. 1668* 3) Config DSP to improve Gigabit link quality for some PHY revisions.
1669* 1669*
1670* hw - Struct containing variables accessed by shared code 1670* hw - Struct containing variables accessed by shared code
1671******************************************************************************/ 1671******************************************************************************/
@@ -1674,7 +1674,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw)
1674{ 1674{
1675 int32_t ret_val; 1675 int32_t ret_val;
1676 DEBUGFUNC("e1000_copper_link_postconfig"); 1676 DEBUGFUNC("e1000_copper_link_postconfig");
1677 1677
1678 if(hw->mac_type >= e1000_82544) { 1678 if(hw->mac_type >= e1000_82544) {
1679 e1000_config_collision_dist(hw); 1679 e1000_config_collision_dist(hw);
1680 } else { 1680 } else {
@@ -1698,7 +1698,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw)
1698 return ret_val; 1698 return ret_val;
1699 } 1699 }
1700 } 1700 }
1701 1701
1702 return E1000_SUCCESS; 1702 return E1000_SUCCESS;
1703} 1703}
1704 1704
@@ -1754,11 +1754,11 @@ e1000_setup_copper_link(struct e1000_hw *hw)
1754 } 1754 }
1755 1755
1756 if(hw->autoneg) { 1756 if(hw->autoneg) {
1757 /* Setup autoneg and flow control advertisement 1757 /* Setup autoneg and flow control advertisement
1758 * and perform autonegotiation */ 1758 * and perform autonegotiation */
1759 ret_val = e1000_copper_link_autoneg(hw); 1759 ret_val = e1000_copper_link_autoneg(hw);
1760 if(ret_val) 1760 if(ret_val)
1761 return ret_val; 1761 return ret_val;
1762 } else { 1762 } else {
1763 /* PHY will be set to 10H, 10F, 100H,or 100F 1763 /* PHY will be set to 10H, 10F, 100H,or 100F
1764 * depending on value from forced_speed_duplex. */ 1764 * depending on value from forced_speed_duplex. */
@@ -1786,7 +1786,7 @@ e1000_setup_copper_link(struct e1000_hw *hw)
1786 ret_val = e1000_copper_link_postconfig(hw); 1786 ret_val = e1000_copper_link_postconfig(hw);
1787 if(ret_val) 1787 if(ret_val)
1788 return ret_val; 1788 return ret_val;
1789 1789
1790 DEBUGOUT("Valid link established!!!\n"); 1790 DEBUGOUT("Valid link established!!!\n");
1791 return E1000_SUCCESS; 1791 return E1000_SUCCESS;
1792 } 1792 }
@@ -1984,7 +1984,7 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw)
1984 1984
1985 DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); 1985 DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
1986 1986
1987 ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg); 1987 ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg);
1988 if(ret_val) 1988 if(ret_val)
1989 return ret_val; 1989 return ret_val;
1990 1990
@@ -2273,7 +2273,7 @@ e1000_config_mac_to_phy(struct e1000_hw *hw)
2273 2273
2274 DEBUGFUNC("e1000_config_mac_to_phy"); 2274 DEBUGFUNC("e1000_config_mac_to_phy");
2275 2275
2276 /* 82544 or newer MAC, Auto Speed Detection takes care of 2276 /* 82544 or newer MAC, Auto Speed Detection takes care of
2277 * MAC speed/duplex configuration.*/ 2277 * MAC speed/duplex configuration.*/
2278 if (hw->mac_type >= e1000_82544) 2278 if (hw->mac_type >= e1000_82544)
2279 return E1000_SUCCESS; 2279 return E1000_SUCCESS;
@@ -2292,9 +2292,9 @@ e1000_config_mac_to_phy(struct e1000_hw *hw)
2292 if(ret_val) 2292 if(ret_val)
2293 return ret_val; 2293 return ret_val;
2294 2294
2295 if(phy_data & M88E1000_PSSR_DPLX) 2295 if(phy_data & M88E1000_PSSR_DPLX)
2296 ctrl |= E1000_CTRL_FD; 2296 ctrl |= E1000_CTRL_FD;
2297 else 2297 else
2298 ctrl &= ~E1000_CTRL_FD; 2298 ctrl &= ~E1000_CTRL_FD;
2299 2299
2300 e1000_config_collision_dist(hw); 2300 e1000_config_collision_dist(hw);
@@ -2884,7 +2884,7 @@ e1000_get_speed_and_duplex(struct e1000_hw *hw,
2884 } 2884 }
2885 } 2885 }
2886 2886
2887 if ((hw->mac_type == e1000_80003es2lan) && 2887 if ((hw->mac_type == e1000_80003es2lan) &&
2888 (hw->media_type == e1000_media_type_copper)) { 2888 (hw->media_type == e1000_media_type_copper)) {
2889 if (*speed == SPEED_1000) 2889 if (*speed == SPEED_1000)
2890 ret_val = e1000_configure_kmrn_for_1000(hw); 2890 ret_val = e1000_configure_kmrn_for_1000(hw);
@@ -3160,7 +3160,7 @@ e1000_read_phy_reg(struct e1000_hw *hw,
3160 if (e1000_swfw_sync_acquire(hw, swfw)) 3160 if (e1000_swfw_sync_acquire(hw, swfw))
3161 return -E1000_ERR_SWFW_SYNC; 3161 return -E1000_ERR_SWFW_SYNC;
3162 3162
3163 if((hw->phy_type == e1000_phy_igp || 3163 if((hw->phy_type == e1000_phy_igp ||
3164 hw->phy_type == e1000_phy_igp_2) && 3164 hw->phy_type == e1000_phy_igp_2) &&
3165 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { 3165 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
3166 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT, 3166 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
@@ -3299,7 +3299,7 @@ e1000_write_phy_reg(struct e1000_hw *hw,
3299 if (e1000_swfw_sync_acquire(hw, swfw)) 3299 if (e1000_swfw_sync_acquire(hw, swfw))
3300 return -E1000_ERR_SWFW_SYNC; 3300 return -E1000_ERR_SWFW_SYNC;
3301 3301
3302 if((hw->phy_type == e1000_phy_igp || 3302 if((hw->phy_type == e1000_phy_igp ||
3303 hw->phy_type == e1000_phy_igp_2) && 3303 hw->phy_type == e1000_phy_igp_2) &&
3304 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { 3304 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
3305 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT, 3305 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
@@ -3497,22 +3497,22 @@ e1000_phy_hw_reset(struct e1000_hw *hw)
3497 } 3497 }
3498 /* Read the device control register and assert the E1000_CTRL_PHY_RST 3498 /* Read the device control register and assert the E1000_CTRL_PHY_RST
3499 * bit. Then, take it out of reset. 3499 * bit. Then, take it out of reset.
3500 * For pre-e1000_82571 hardware, we delay for 10ms between the assert 3500 * For pre-e1000_82571 hardware, we delay for 10ms between the assert
3501 * and deassert. For e1000_82571 hardware and later, we instead delay 3501 * and deassert. For e1000_82571 hardware and later, we instead delay
3502 * for 50us between and 10ms after the deassertion. 3502 * for 50us between and 10ms after the deassertion.
3503 */ 3503 */
3504 ctrl = E1000_READ_REG(hw, CTRL); 3504 ctrl = E1000_READ_REG(hw, CTRL);
3505 E1000_WRITE_REG(hw, CTRL, ctrl | E1000_CTRL_PHY_RST); 3505 E1000_WRITE_REG(hw, CTRL, ctrl | E1000_CTRL_PHY_RST);
3506 E1000_WRITE_FLUSH(hw); 3506 E1000_WRITE_FLUSH(hw);
3507 3507
3508 if (hw->mac_type < e1000_82571) 3508 if (hw->mac_type < e1000_82571)
3509 msec_delay(10); 3509 msec_delay(10);
3510 else 3510 else
3511 udelay(100); 3511 udelay(100);
3512 3512
3513 E1000_WRITE_REG(hw, CTRL, ctrl); 3513 E1000_WRITE_REG(hw, CTRL, ctrl);
3514 E1000_WRITE_FLUSH(hw); 3514 E1000_WRITE_FLUSH(hw);
3515 3515
3516 if (hw->mac_type >= e1000_82571) 3516 if (hw->mac_type >= e1000_82571)
3517 msec_delay(10); 3517 msec_delay(10);
3518 e1000_swfw_sync_release(hw, swfw); 3518 e1000_swfw_sync_release(hw, swfw);
@@ -3816,7 +3816,7 @@ e1000_phy_m88_get_info(struct e1000_hw *hw,
3816 /* Check polarity status */ 3816 /* Check polarity status */
3817 ret_val = e1000_check_polarity(hw, &polarity); 3817 ret_val = e1000_check_polarity(hw, &polarity);
3818 if(ret_val) 3818 if(ret_val)
3819 return ret_val; 3819 return ret_val;
3820 phy_info->cable_polarity = polarity; 3820 phy_info->cable_polarity = polarity;
3821 3821
3822 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); 3822 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
@@ -4541,14 +4541,14 @@ e1000_read_eeprom_eerd(struct e1000_hw *hw,
4541 4541
4542 E1000_WRITE_REG(hw, EERD, eerd); 4542 E1000_WRITE_REG(hw, EERD, eerd);
4543 error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_READ); 4543 error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_READ);
4544 4544
4545 if(error) { 4545 if(error) {
4546 break; 4546 break;
4547 } 4547 }
4548 data[i] = (E1000_READ_REG(hw, EERD) >> E1000_EEPROM_RW_REG_DATA); 4548 data[i] = (E1000_READ_REG(hw, EERD) >> E1000_EEPROM_RW_REG_DATA);
4549 4549
4550 } 4550 }
4551 4551
4552 return error; 4552 return error;
4553} 4553}
4554 4554
@@ -4574,24 +4574,24 @@ e1000_write_eeprom_eewr(struct e1000_hw *hw,
4574 return -E1000_ERR_SWFW_SYNC; 4574 return -E1000_ERR_SWFW_SYNC;
4575 4575
4576 for (i = 0; i < words; i++) { 4576 for (i = 0; i < words; i++) {
4577 register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) | 4577 register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) |
4578 ((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) | 4578 ((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) |
4579 E1000_EEPROM_RW_REG_START; 4579 E1000_EEPROM_RW_REG_START;
4580 4580
4581 error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE); 4581 error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE);
4582 if(error) { 4582 if(error) {
4583 break; 4583 break;
4584 } 4584 }
4585 4585
4586 E1000_WRITE_REG(hw, EEWR, register_value); 4586 E1000_WRITE_REG(hw, EEWR, register_value);
4587 4587
4588 error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE); 4588 error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE);
4589 4589
4590 if(error) { 4590 if(error) {
4591 break; 4591 break;
4592 } 4592 }
4593 } 4593 }
4594 4594
4595 e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM); 4595 e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM);
4596 return error; 4596 return error;
4597} 4597}
@@ -4611,7 +4611,7 @@ e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd)
4611 for(i = 0; i < attempts; i++) { 4611 for(i = 0; i < attempts; i++) {
4612 if(eerd == E1000_EEPROM_POLL_READ) 4612 if(eerd == E1000_EEPROM_POLL_READ)
4613 reg = E1000_READ_REG(hw, EERD); 4613 reg = E1000_READ_REG(hw, EERD);
4614 else 4614 else
4615 reg = E1000_READ_REG(hw, EEWR); 4615 reg = E1000_READ_REG(hw, EEWR);
4616 4616
4617 if(reg & E1000_EEPROM_RW_REG_DONE) { 4617 if(reg & E1000_EEPROM_RW_REG_DONE) {
@@ -5136,7 +5136,7 @@ e1000_mc_addr_list_update(struct e1000_hw *hw,
5136 uint32_t i; 5136 uint32_t i;
5137 uint32_t num_rar_entry; 5137 uint32_t num_rar_entry;
5138 uint32_t num_mta_entry; 5138 uint32_t num_mta_entry;
5139 5139
5140 DEBUGFUNC("e1000_mc_addr_list_update"); 5140 DEBUGFUNC("e1000_mc_addr_list_update");
5141 5141
5142 /* Set the new number of MC addresses that we are being requested to use. */ 5142 /* Set the new number of MC addresses that we are being requested to use. */
@@ -6241,7 +6241,7 @@ e1000_check_polarity(struct e1000_hw *hw,
6241 * 1 - Downshift ocured. 6241 * 1 - Downshift ocured.
6242 * 6242 *
6243 * returns: - E1000_ERR_XXX 6243 * returns: - E1000_ERR_XXX
6244 * E1000_SUCCESS 6244 * E1000_SUCCESS
6245 * 6245 *
6246 * For phy's older then IGP, this function reads the Downshift bit in the Phy 6246 * For phy's older then IGP, this function reads the Downshift bit in the Phy
6247 * Specific Status register. For IGP phy's, it reads the Downgrade bit in the 6247 * Specific Status register. For IGP phy's, it reads the Downgrade bit in the
@@ -6256,7 +6256,7 @@ e1000_check_downshift(struct e1000_hw *hw)
6256 6256
6257 DEBUGFUNC("e1000_check_downshift"); 6257 DEBUGFUNC("e1000_check_downshift");
6258 6258
6259 if(hw->phy_type == e1000_phy_igp || 6259 if(hw->phy_type == e1000_phy_igp ||
6260 hw->phy_type == e1000_phy_igp_2) { 6260 hw->phy_type == e1000_phy_igp_2) {
6261 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH, 6261 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH,
6262 &phy_data); 6262 &phy_data);
@@ -6685,8 +6685,8 @@ e1000_set_d0_lplu_state(struct e1000_hw *hw,
6685 6685
6686 6686
6687 } else { 6687 } else {
6688 6688
6689 phy_data |= IGP02E1000_PM_D0_LPLU; 6689 phy_data |= IGP02E1000_PM_D0_LPLU;
6690 ret_val = e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 6690 ret_val = e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
6691 if (ret_val) 6691 if (ret_val)
6692 return ret_val; 6692 return ret_val;
@@ -6778,7 +6778,7 @@ int32_t
6778e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer) 6778e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer)
6779{ 6779{
6780 uint8_t i; 6780 uint8_t i;
6781 uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET; 6781 uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET;
6782 uint8_t length = E1000_MNG_DHCP_COOKIE_LENGTH; 6782 uint8_t length = E1000_MNG_DHCP_COOKIE_LENGTH;
6783 6783
6784 length = (length >> 2); 6784 length = (length >> 2);
@@ -6797,7 +6797,7 @@ e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer)
6797 * and also checks whether the previous command is completed. 6797 * and also checks whether the previous command is completed.
6798 * It busy waits in case of previous command is not completed. 6798 * It busy waits in case of previous command is not completed.
6799 * 6799 *
6800 * returns: - E1000_ERR_HOST_INTERFACE_COMMAND in case if is not ready or 6800 * returns: - E1000_ERR_HOST_INTERFACE_COMMAND in case if is not ready or
6801 * timeout 6801 * timeout
6802 * - E1000_SUCCESS for success. 6802 * - E1000_SUCCESS for success.
6803 ****************************************************************************/ 6803 ****************************************************************************/
@@ -6821,7 +6821,7 @@ e1000_mng_enable_host_if(struct e1000_hw * hw)
6821 msec_delay_irq(1); 6821 msec_delay_irq(1);
6822 } 6822 }
6823 6823
6824 if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) { 6824 if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
6825 DEBUGOUT("Previous command timeout failed .\n"); 6825 DEBUGOUT("Previous command timeout failed .\n");
6826 return -E1000_ERR_HOST_INTERFACE_COMMAND; 6826 return -E1000_ERR_HOST_INTERFACE_COMMAND;
6827 } 6827 }