diff options
Diffstat (limited to 'drivers/net/e100.c')
-rw-r--r-- | drivers/net/e100.c | 241 |
1 files changed, 217 insertions, 24 deletions
diff --git a/drivers/net/e100.c b/drivers/net/e100.c index d0fa2448761d..25cc20e415da 100644 --- a/drivers/net/e100.c +++ b/drivers/net/e100.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2004 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -156,7 +156,7 @@ | |||
156 | 156 | ||
157 | #define DRV_NAME "e100" | 157 | #define DRV_NAME "e100" |
158 | #define DRV_EXT "-NAPI" | 158 | #define DRV_EXT "-NAPI" |
159 | #define DRV_VERSION "3.4.8-k2"DRV_EXT | 159 | #define DRV_VERSION "3.4.14-k2"DRV_EXT |
160 | #define DRV_DESCRIPTION "Intel(R) PRO/100 Network Driver" | 160 | #define DRV_DESCRIPTION "Intel(R) PRO/100 Network Driver" |
161 | #define DRV_COPYRIGHT "Copyright(c) 1999-2005 Intel Corporation" | 161 | #define DRV_COPYRIGHT "Copyright(c) 1999-2005 Intel Corporation" |
162 | #define PFX DRV_NAME ": " | 162 | #define PFX DRV_NAME ": " |
@@ -785,6 +785,7 @@ static int e100_eeprom_save(struct nic *nic, u16 start, u16 count) | |||
785 | } | 785 | } |
786 | 786 | ||
787 | #define E100_WAIT_SCB_TIMEOUT 20000 /* we might have to wait 100ms!!! */ | 787 | #define E100_WAIT_SCB_TIMEOUT 20000 /* we might have to wait 100ms!!! */ |
788 | #define E100_WAIT_SCB_FAST 20 /* delay like the old code */ | ||
788 | static inline int e100_exec_cmd(struct nic *nic, u8 cmd, dma_addr_t dma_addr) | 789 | static inline int e100_exec_cmd(struct nic *nic, u8 cmd, dma_addr_t dma_addr) |
789 | { | 790 | { |
790 | unsigned long flags; | 791 | unsigned long flags; |
@@ -798,7 +799,7 @@ static inline int e100_exec_cmd(struct nic *nic, u8 cmd, dma_addr_t dma_addr) | |||
798 | if(likely(!readb(&nic->csr->scb.cmd_lo))) | 799 | if(likely(!readb(&nic->csr->scb.cmd_lo))) |
799 | break; | 800 | break; |
800 | cpu_relax(); | 801 | cpu_relax(); |
801 | if(unlikely(i > (E100_WAIT_SCB_TIMEOUT >> 1))) | 802 | if(unlikely(i > E100_WAIT_SCB_FAST)) |
802 | udelay(5); | 803 | udelay(5); |
803 | } | 804 | } |
804 | if(unlikely(i == E100_WAIT_SCB_TIMEOUT)) { | 805 | if(unlikely(i == E100_WAIT_SCB_TIMEOUT)) { |
@@ -902,8 +903,8 @@ static void mdio_write(struct net_device *netdev, int addr, int reg, int data) | |||
902 | 903 | ||
903 | static void e100_get_defaults(struct nic *nic) | 904 | static void e100_get_defaults(struct nic *nic) |
904 | { | 905 | { |
905 | struct param_range rfds = { .min = 16, .max = 256, .count = 64 }; | 906 | struct param_range rfds = { .min = 16, .max = 256, .count = 256 }; |
906 | struct param_range cbs = { .min = 64, .max = 256, .count = 64 }; | 907 | struct param_range cbs = { .min = 64, .max = 256, .count = 128 }; |
907 | 908 | ||
908 | pci_read_config_byte(nic->pdev, PCI_REVISION_ID, &nic->rev_id); | 909 | pci_read_config_byte(nic->pdev, PCI_REVISION_ID, &nic->rev_id); |
909 | /* MAC type is encoded as rev ID; exception: ICH is treated as 82559 */ | 910 | /* MAC type is encoded as rev ID; exception: ICH is treated as 82559 */ |
@@ -1006,25 +1007,213 @@ static void e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb) | |||
1006 | c[16], c[17], c[18], c[19], c[20], c[21], c[22], c[23]); | 1007 | c[16], c[17], c[18], c[19], c[20], c[21], c[22], c[23]); |
1007 | } | 1008 | } |
1008 | 1009 | ||
1010 | /********************************************************/ | ||
1011 | /* Micro code for 8086:1229 Rev 8 */ | ||
1012 | /********************************************************/ | ||
1013 | |||
1014 | /* Parameter values for the D101M B-step */ | ||
1015 | #define D101M_CPUSAVER_TIMER_DWORD 78 | ||
1016 | #define D101M_CPUSAVER_BUNDLE_DWORD 65 | ||
1017 | #define D101M_CPUSAVER_MIN_SIZE_DWORD 126 | ||
1018 | |||
1019 | #define D101M_B_RCVBUNDLE_UCODE \ | ||
1020 | {\ | ||
1021 | 0x00550215, 0xFFFF0437, 0xFFFFFFFF, 0x06A70789, 0xFFFFFFFF, 0x0558FFFF, \ | ||
1022 | 0x000C0001, 0x00101312, 0x000C0008, 0x00380216, \ | ||
1023 | 0x0010009C, 0x00204056, 0x002380CC, 0x00380056, \ | ||
1024 | 0x0010009C, 0x00244C0B, 0x00000800, 0x00124818, \ | ||
1025 | 0x00380438, 0x00000000, 0x00140000, 0x00380555, \ | ||
1026 | 0x00308000, 0x00100662, 0x00100561, 0x000E0408, \ | ||
1027 | 0x00134861, 0x000C0002, 0x00103093, 0x00308000, \ | ||
1028 | 0x00100624, 0x00100561, 0x000E0408, 0x00100861, \ | ||
1029 | 0x000C007E, 0x00222C21, 0x000C0002, 0x00103093, \ | ||
1030 | 0x00380C7A, 0x00080000, 0x00103090, 0x00380C7A, \ | ||
1031 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1032 | 0x0010009C, 0x00244C2D, 0x00010004, 0x00041000, \ | ||
1033 | 0x003A0437, 0x00044010, 0x0038078A, 0x00000000, \ | ||
1034 | 0x00100099, 0x00206C7A, 0x0010009C, 0x00244C48, \ | ||
1035 | 0x00130824, 0x000C0001, 0x00101213, 0x00260C75, \ | ||
1036 | 0x00041000, 0x00010004, 0x00130826, 0x000C0006, \ | ||
1037 | 0x002206A8, 0x0013C926, 0x00101313, 0x003806A8, \ | ||
1038 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1039 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1040 | 0x00080600, 0x00101B10, 0x00050004, 0x00100826, \ | ||
1041 | 0x00101210, 0x00380C34, 0x00000000, 0x00000000, \ | ||
1042 | 0x0021155B, 0x00100099, 0x00206559, 0x0010009C, \ | ||
1043 | 0x00244559, 0x00130836, 0x000C0000, 0x00220C62, \ | ||
1044 | 0x000C0001, 0x00101B13, 0x00229C0E, 0x00210C0E, \ | ||
1045 | 0x00226C0E, 0x00216C0E, 0x0022FC0E, 0x00215C0E, \ | ||
1046 | 0x00214C0E, 0x00380555, 0x00010004, 0x00041000, \ | ||
1047 | 0x00278C67, 0x00040800, 0x00018100, 0x003A0437, \ | ||
1048 | 0x00130826, 0x000C0001, 0x00220559, 0x00101313, \ | ||
1049 | 0x00380559, 0x00000000, 0x00000000, 0x00000000, \ | ||
1050 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1051 | 0x00000000, 0x00130831, 0x0010090B, 0x00124813, \ | ||
1052 | 0x000CFF80, 0x002606AB, 0x00041000, 0x00010004, \ | ||
1053 | 0x003806A8, 0x00000000, 0x00000000, 0x00000000, \ | ||
1054 | } | ||
1055 | |||
1056 | /********************************************************/ | ||
1057 | /* Micro code for 8086:1229 Rev 9 */ | ||
1058 | /********************************************************/ | ||
1059 | |||
1060 | /* Parameter values for the D101S */ | ||
1061 | #define D101S_CPUSAVER_TIMER_DWORD 78 | ||
1062 | #define D101S_CPUSAVER_BUNDLE_DWORD 67 | ||
1063 | #define D101S_CPUSAVER_MIN_SIZE_DWORD 128 | ||
1064 | |||
1065 | #define D101S_RCVBUNDLE_UCODE \ | ||
1066 | {\ | ||
1067 | 0x00550242, 0xFFFF047E, 0xFFFFFFFF, 0x06FF0818, 0xFFFFFFFF, 0x05A6FFFF, \ | ||
1068 | 0x000C0001, 0x00101312, 0x000C0008, 0x00380243, \ | ||
1069 | 0x0010009C, 0x00204056, 0x002380D0, 0x00380056, \ | ||
1070 | 0x0010009C, 0x00244F8B, 0x00000800, 0x00124818, \ | ||
1071 | 0x0038047F, 0x00000000, 0x00140000, 0x003805A3, \ | ||
1072 | 0x00308000, 0x00100610, 0x00100561, 0x000E0408, \ | ||
1073 | 0x00134861, 0x000C0002, 0x00103093, 0x00308000, \ | ||
1074 | 0x00100624, 0x00100561, 0x000E0408, 0x00100861, \ | ||
1075 | 0x000C007E, 0x00222FA1, 0x000C0002, 0x00103093, \ | ||
1076 | 0x00380F90, 0x00080000, 0x00103090, 0x00380F90, \ | ||
1077 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1078 | 0x0010009C, 0x00244FAD, 0x00010004, 0x00041000, \ | ||
1079 | 0x003A047E, 0x00044010, 0x00380819, 0x00000000, \ | ||
1080 | 0x00100099, 0x00206FFD, 0x0010009A, 0x0020AFFD, \ | ||
1081 | 0x0010009C, 0x00244FC8, 0x00130824, 0x000C0001, \ | ||
1082 | 0x00101213, 0x00260FF7, 0x00041000, 0x00010004, \ | ||
1083 | 0x00130826, 0x000C0006, 0x00220700, 0x0013C926, \ | ||
1084 | 0x00101313, 0x00380700, 0x00000000, 0x00000000, \ | ||
1085 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1086 | 0x00080600, 0x00101B10, 0x00050004, 0x00100826, \ | ||
1087 | 0x00101210, 0x00380FB6, 0x00000000, 0x00000000, \ | ||
1088 | 0x002115A9, 0x00100099, 0x002065A7, 0x0010009A, \ | ||
1089 | 0x0020A5A7, 0x0010009C, 0x002445A7, 0x00130836, \ | ||
1090 | 0x000C0000, 0x00220FE4, 0x000C0001, 0x00101B13, \ | ||
1091 | 0x00229F8E, 0x00210F8E, 0x00226F8E, 0x00216F8E, \ | ||
1092 | 0x0022FF8E, 0x00215F8E, 0x00214F8E, 0x003805A3, \ | ||
1093 | 0x00010004, 0x00041000, 0x00278FE9, 0x00040800, \ | ||
1094 | 0x00018100, 0x003A047E, 0x00130826, 0x000C0001, \ | ||
1095 | 0x002205A7, 0x00101313, 0x003805A7, 0x00000000, \ | ||
1096 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1097 | 0x00000000, 0x00000000, 0x00000000, 0x00130831, \ | ||
1098 | 0x0010090B, 0x00124813, 0x000CFF80, 0x00260703, \ | ||
1099 | 0x00041000, 0x00010004, 0x00380700 \ | ||
1100 | } | ||
1101 | |||
1102 | /********************************************************/ | ||
1103 | /* Micro code for the 8086:1229 Rev F/10 */ | ||
1104 | /********************************************************/ | ||
1105 | |||
1106 | /* Parameter values for the D102 E-step */ | ||
1107 | #define D102_E_CPUSAVER_TIMER_DWORD 42 | ||
1108 | #define D102_E_CPUSAVER_BUNDLE_DWORD 54 | ||
1109 | #define D102_E_CPUSAVER_MIN_SIZE_DWORD 46 | ||
1110 | |||
1111 | #define D102_E_RCVBUNDLE_UCODE \ | ||
1112 | {\ | ||
1113 | 0x007D028F, 0x0E4204F9, 0x14ED0C85, 0x14FA14E9, 0x0EF70E36, 0x1FFF1FFF, \ | ||
1114 | 0x00E014B9, 0x00000000, 0x00000000, 0x00000000, \ | ||
1115 | 0x00E014BD, 0x00000000, 0x00000000, 0x00000000, \ | ||
1116 | 0x00E014D5, 0x00000000, 0x00000000, 0x00000000, \ | ||
1117 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1118 | 0x00E014C1, 0x00000000, 0x00000000, 0x00000000, \ | ||
1119 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1120 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1121 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1122 | 0x00E014C8, 0x00000000, 0x00000000, 0x00000000, \ | ||
1123 | 0x00200600, 0x00E014EE, 0x00000000, 0x00000000, \ | ||
1124 | 0x0030FF80, 0x00940E46, 0x00038200, 0x00102000, \ | ||
1125 | 0x00E00E43, 0x00000000, 0x00000000, 0x00000000, \ | ||
1126 | 0x00300006, 0x00E014FB, 0x00000000, 0x00000000, \ | ||
1127 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1128 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1129 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1130 | 0x00906E41, 0x00800E3C, 0x00E00E39, 0x00000000, \ | ||
1131 | 0x00906EFD, 0x00900EFD, 0x00E00EF8, 0x00000000, \ | ||
1132 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1133 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1134 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1135 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1136 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1137 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1138 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1139 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1140 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1141 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1142 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1143 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1144 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1145 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | ||
1146 | } | ||
1147 | |||
1009 | static void e100_load_ucode(struct nic *nic, struct cb *cb, struct sk_buff *skb) | 1148 | static void e100_load_ucode(struct nic *nic, struct cb *cb, struct sk_buff *skb) |
1010 | { | 1149 | { |
1011 | int i; | 1150 | /* *INDENT-OFF* */ |
1012 | static const u32 ucode[UCODE_SIZE] = { | 1151 | static struct { |
1013 | /* NFS packets are misinterpreted as TCO packets and | 1152 | u32 ucode[UCODE_SIZE + 1]; |
1014 | * incorrectly routed to the BMC over SMBus. This | 1153 | u8 mac; |
1015 | * microcode patch checks the fragmented IP bit in the | 1154 | u8 timer_dword; |
1016 | * NFS/UDP header to distinguish between NFS and TCO. */ | 1155 | u8 bundle_dword; |
1017 | 0x0EF70E36, 0x1FFF1FFF, 0x1FFF1FFF, 0x1FFF1FFF, 0x1FFF1FFF, | 1156 | u8 min_size_dword; |
1018 | 0x1FFF1FFF, 0x00906E41, 0x00800E3C, 0x00E00E39, 0x00000000, | 1157 | } ucode_opts[] = { |
1019 | 0x00906EFD, 0x00900EFD, 0x00E00EF8, | 1158 | { D101M_B_RCVBUNDLE_UCODE, |
1020 | }; | 1159 | mac_82559_D101M, |
1160 | D101M_CPUSAVER_TIMER_DWORD, | ||
1161 | D101M_CPUSAVER_BUNDLE_DWORD, | ||
1162 | D101M_CPUSAVER_MIN_SIZE_DWORD }, | ||
1163 | { D101S_RCVBUNDLE_UCODE, | ||
1164 | mac_82559_D101S, | ||
1165 | D101S_CPUSAVER_TIMER_DWORD, | ||
1166 | D101S_CPUSAVER_BUNDLE_DWORD, | ||
1167 | D101S_CPUSAVER_MIN_SIZE_DWORD }, | ||
1168 | { D102_E_RCVBUNDLE_UCODE, | ||
1169 | mac_82551_F, | ||
1170 | D102_E_CPUSAVER_TIMER_DWORD, | ||
1171 | D102_E_CPUSAVER_BUNDLE_DWORD, | ||
1172 | D102_E_CPUSAVER_MIN_SIZE_DWORD }, | ||
1173 | { D102_E_RCVBUNDLE_UCODE, | ||
1174 | mac_82551_10, | ||
1175 | D102_E_CPUSAVER_TIMER_DWORD, | ||
1176 | D102_E_CPUSAVER_BUNDLE_DWORD, | ||
1177 | D102_E_CPUSAVER_MIN_SIZE_DWORD }, | ||
1178 | { {0}, 0, 0, 0, 0} | ||
1179 | }, *opts; | ||
1180 | /* *INDENT-ON* */ | ||
1181 | |||
1182 | #define BUNDLESMALL 1 | ||
1183 | #define BUNDLEMAX 50 | ||
1184 | #define INTDELAY 15000 | ||
1185 | |||
1186 | opts = ucode_opts; | ||
1187 | |||
1188 | /* do not load u-code for ICH devices */ | ||
1189 | if (nic->flags & ich) | ||
1190 | return; | ||
1191 | |||
1192 | /* Search for ucode match against h/w rev_id */ | ||
1193 | while (opts->mac) { | ||
1194 | if (nic->mac == opts->mac) { | ||
1195 | int i; | ||
1196 | u32 *ucode = opts->ucode; | ||
1197 | |||
1198 | /* Insert user-tunable settings */ | ||
1199 | ucode[opts->timer_dword] &= 0xFFFF0000; | ||
1200 | ucode[opts->timer_dword] |= | ||
1201 | (u16) INTDELAY; | ||
1202 | ucode[opts->bundle_dword] &= 0xFFFF0000; | ||
1203 | ucode[opts->bundle_dword] |= (u16) BUNDLEMAX; | ||
1204 | ucode[opts->min_size_dword] &= 0xFFFF0000; | ||
1205 | ucode[opts->min_size_dword] |= | ||
1206 | (BUNDLESMALL) ? 0xFFFF : 0xFF80; | ||
1207 | |||
1208 | for(i = 0; i < UCODE_SIZE; i++) | ||
1209 | cb->u.ucode[i] = cpu_to_le32(ucode[i]); | ||
1210 | cb->command = cpu_to_le16(cb_ucode); | ||
1211 | return; | ||
1212 | } | ||
1213 | opts++; | ||
1214 | } | ||
1021 | 1215 | ||
1022 | if(nic->mac == mac_82551_F || nic->mac == mac_82551_10) { | 1216 | cb->command = cpu_to_le16(cb_nop); |
1023 | for(i = 0; i < UCODE_SIZE; i++) | ||
1024 | cb->u.ucode[i] = cpu_to_le32(ucode[i]); | ||
1025 | cb->command = cpu_to_le16(cb_ucode); | ||
1026 | } else | ||
1027 | cb->command = cpu_to_le16(cb_nop); | ||
1028 | } | 1217 | } |
1029 | 1218 | ||
1030 | static void e100_setup_iaaddr(struct nic *nic, struct cb *cb, | 1219 | static void e100_setup_iaaddr(struct nic *nic, struct cb *cb, |
@@ -1307,14 +1496,15 @@ static inline void e100_xmit_prepare(struct nic *nic, struct cb *cb, | |||
1307 | { | 1496 | { |
1308 | cb->command = nic->tx_command; | 1497 | cb->command = nic->tx_command; |
1309 | /* interrupt every 16 packets regardless of delay */ | 1498 | /* interrupt every 16 packets regardless of delay */ |
1310 | if((nic->cbs_avail & ~15) == nic->cbs_avail) cb->command |= cb_i; | 1499 | if((nic->cbs_avail & ~15) == nic->cbs_avail) |
1500 | cb->command |= cpu_to_le16(cb_i); | ||
1311 | cb->u.tcb.tbd_array = cb->dma_addr + offsetof(struct cb, u.tcb.tbd); | 1501 | cb->u.tcb.tbd_array = cb->dma_addr + offsetof(struct cb, u.tcb.tbd); |
1312 | cb->u.tcb.tcb_byte_count = 0; | 1502 | cb->u.tcb.tcb_byte_count = 0; |
1313 | cb->u.tcb.threshold = nic->tx_threshold; | 1503 | cb->u.tcb.threshold = nic->tx_threshold; |
1314 | cb->u.tcb.tbd_count = 1; | 1504 | cb->u.tcb.tbd_count = 1; |
1315 | cb->u.tcb.tbd.buf_addr = cpu_to_le32(pci_map_single(nic->pdev, | 1505 | cb->u.tcb.tbd.buf_addr = cpu_to_le32(pci_map_single(nic->pdev, |
1316 | skb->data, skb->len, PCI_DMA_TODEVICE)); | 1506 | skb->data, skb->len, PCI_DMA_TODEVICE)); |
1317 | // check for mapping failure? | 1507 | /* check for mapping failure? */ |
1318 | cb->u.tcb.tbd.size = cpu_to_le16(skb->len); | 1508 | cb->u.tcb.tbd.size = cpu_to_le16(skb->len); |
1319 | } | 1509 | } |
1320 | 1510 | ||
@@ -1539,7 +1729,7 @@ static inline int e100_rx_indicate(struct nic *nic, struct rx *rx, | |||
1539 | /* Don't indicate if hardware indicates errors */ | 1729 | /* Don't indicate if hardware indicates errors */ |
1540 | nic->net_stats.rx_dropped++; | 1730 | nic->net_stats.rx_dropped++; |
1541 | dev_kfree_skb_any(skb); | 1731 | dev_kfree_skb_any(skb); |
1542 | } else if(actual_size > nic->netdev->mtu + VLAN_ETH_HLEN) { | 1732 | } else if(actual_size > ETH_DATA_LEN + VLAN_ETH_HLEN) { |
1543 | /* Don't indicate oversized frames */ | 1733 | /* Don't indicate oversized frames */ |
1544 | nic->rx_over_length_errors++; | 1734 | nic->rx_over_length_errors++; |
1545 | nic->net_stats.rx_dropped++; | 1735 | nic->net_stats.rx_dropped++; |
@@ -1706,6 +1896,7 @@ static int e100_poll(struct net_device *netdev, int *budget) | |||
1706 | static void e100_netpoll(struct net_device *netdev) | 1896 | static void e100_netpoll(struct net_device *netdev) |
1707 | { | 1897 | { |
1708 | struct nic *nic = netdev_priv(netdev); | 1898 | struct nic *nic = netdev_priv(netdev); |
1899 | |||
1709 | e100_disable_irq(nic); | 1900 | e100_disable_irq(nic); |
1710 | e100_intr(nic->pdev->irq, netdev, NULL); | 1901 | e100_intr(nic->pdev->irq, netdev, NULL); |
1711 | e100_tx_clean(nic); | 1902 | e100_tx_clean(nic); |
@@ -2108,6 +2299,8 @@ static void e100_diag_test(struct net_device *netdev, | |||
2108 | } | 2299 | } |
2109 | for(i = 0; i < E100_TEST_LEN; i++) | 2300 | for(i = 0; i < E100_TEST_LEN; i++) |
2110 | test->flags |= data[i] ? ETH_TEST_FL_FAILED : 0; | 2301 | test->flags |= data[i] ? ETH_TEST_FL_FAILED : 0; |
2302 | |||
2303 | msleep_interruptible(4 * 1000); | ||
2111 | } | 2304 | } |
2112 | 2305 | ||
2113 | static int e100_phys_id(struct net_device *netdev, u32 data) | 2306 | static int e100_phys_id(struct net_device *netdev, u32 data) |