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-rw-r--r--drivers/net/defxx.c928
1 files changed, 602 insertions, 326 deletions
diff --git a/drivers/net/defxx.c b/drivers/net/defxx.c
index dc3ab3b5c8cb..07d2731c1aa8 100644
--- a/drivers/net/defxx.c
+++ b/drivers/net/defxx.c
@@ -10,10 +10,12 @@
10 * 10 *
11 * Abstract: 11 * Abstract:
12 * A Linux device driver supporting the Digital Equipment Corporation 12 * A Linux device driver supporting the Digital Equipment Corporation
13 * FDDI EISA and PCI controller families. Supported adapters include: 13 * FDDI TURBOchannel, EISA and PCI controller families. Supported
14 * adapters include:
14 * 15 *
15 * DEC FDDIcontroller/EISA (DEFEA) 16 * DEC FDDIcontroller/TURBOchannel (DEFTA)
16 * DEC FDDIcontroller/PCI (DEFPA) 17 * DEC FDDIcontroller/EISA (DEFEA)
18 * DEC FDDIcontroller/PCI (DEFPA)
17 * 19 *
18 * The original author: 20 * The original author:
19 * LVS Lawrence V. Stefani <lstefani@yahoo.com> 21 * LVS Lawrence V. Stefani <lstefani@yahoo.com>
@@ -193,24 +195,27 @@
193 * 14 Aug 2004 macro Fix device names reported. 195 * 14 Aug 2004 macro Fix device names reported.
194 * 14 Jun 2005 macro Use irqreturn_t. 196 * 14 Jun 2005 macro Use irqreturn_t.
195 * 23 Oct 2006 macro Big-endian host support. 197 * 23 Oct 2006 macro Big-endian host support.
198 * 14 Dec 2006 macro TURBOchannel support.
196 */ 199 */
197 200
198/* Include files */ 201/* Include files */
199 202#include <linux/bitops.h>
200#include <linux/module.h>
201#include <linux/kernel.h>
202#include <linux/string.h>
203#include <linux/errno.h>
204#include <linux/ioport.h>
205#include <linux/slab.h>
206#include <linux/interrupt.h>
207#include <linux/pci.h>
208#include <linux/delay.h> 203#include <linux/delay.h>
204#include <linux/dma-mapping.h>
205#include <linux/eisa.h>
206#include <linux/errno.h>
207#include <linux/fddidevice.h>
209#include <linux/init.h> 208#include <linux/init.h>
209#include <linux/interrupt.h>
210#include <linux/ioport.h>
211#include <linux/kernel.h>
212#include <linux/module.h>
210#include <linux/netdevice.h> 213#include <linux/netdevice.h>
211#include <linux/fddidevice.h> 214#include <linux/pci.h>
212#include <linux/skbuff.h> 215#include <linux/skbuff.h>
213#include <linux/bitops.h> 216#include <linux/slab.h>
217#include <linux/string.h>
218#include <linux/tc.h>
214 219
215#include <asm/byteorder.h> 220#include <asm/byteorder.h>
216#include <asm/io.h> 221#include <asm/io.h>
@@ -219,8 +224,8 @@
219 224
220/* Version information string should be updated prior to each new release! */ 225/* Version information string should be updated prior to each new release! */
221#define DRV_NAME "defxx" 226#define DRV_NAME "defxx"
222#define DRV_VERSION "v1.09" 227#define DRV_VERSION "v1.10"
223#define DRV_RELDATE "2006/10/23" 228#define DRV_RELDATE "2006/12/14"
224 229
225static char version[] __devinitdata = 230static char version[] __devinitdata =
226 DRV_NAME ": " DRV_VERSION " " DRV_RELDATE 231 DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
@@ -235,12 +240,41 @@ static char version[] __devinitdata =
235 */ 240 */
236#define NEW_SKB_SIZE (PI_RCV_DATA_K_SIZE_MAX+128) 241#define NEW_SKB_SIZE (PI_RCV_DATA_K_SIZE_MAX+128)
237 242
243#define __unused __attribute__ ((unused))
244
245#ifdef CONFIG_PCI
246#define DFX_BUS_PCI(dev) (dev->bus == &pci_bus_type)
247#else
248#define DFX_BUS_PCI(dev) 0
249#endif
250
251#ifdef CONFIG_EISA
252#define DFX_BUS_EISA(dev) (dev->bus == &eisa_bus_type)
253#else
254#define DFX_BUS_EISA(dev) 0
255#endif
256
257#ifdef CONFIG_TC
258#define DFX_BUS_TC(dev) (dev->bus == &tc_bus_type)
259#else
260#define DFX_BUS_TC(dev) 0
261#endif
262
263#ifdef CONFIG_DEFXX_MMIO
264#define DFX_MMIO 1
265#else
266#define DFX_MMIO 0
267#endif
268
238/* Define module-wide (static) routines */ 269/* Define module-wide (static) routines */
239 270
240static void dfx_bus_init(struct net_device *dev); 271static void dfx_bus_init(struct net_device *dev);
272static void dfx_bus_uninit(struct net_device *dev);
241static void dfx_bus_config_check(DFX_board_t *bp); 273static void dfx_bus_config_check(DFX_board_t *bp);
242 274
243static int dfx_driver_init(struct net_device *dev, const char *print_name); 275static int dfx_driver_init(struct net_device *dev,
276 const char *print_name,
277 resource_size_t bar_start);
244static int dfx_adap_init(DFX_board_t *bp, int get_buffers); 278static int dfx_adap_init(DFX_board_t *bp, int get_buffers);
245 279
246static int dfx_open(struct net_device *dev); 280static int dfx_open(struct net_device *dev);
@@ -273,13 +307,13 @@ static void dfx_xmt_flush(DFX_board_t *bp);
273 307
274/* Define module-wide (static) variables */ 308/* Define module-wide (static) variables */
275 309
276static struct net_device *root_dfx_eisa_dev; 310static struct pci_driver dfx_pci_driver;
311static struct eisa_driver dfx_eisa_driver;
312static struct tc_driver dfx_tc_driver;
277 313
278 314
279/* 315/*
280 * ======================= 316 * =======================
281 * = dfx_port_write_byte =
282 * = dfx_port_read_byte =
283 * = dfx_port_write_long = 317 * = dfx_port_write_long =
284 * = dfx_port_read_long = 318 * = dfx_port_read_long =
285 * ======================= 319 * =======================
@@ -291,12 +325,11 @@ static struct net_device *root_dfx_eisa_dev;
291 * None 325 * None
292 * 326 *
293 * Arguments: 327 * Arguments:
294 * bp - pointer to board information 328 * bp - pointer to board information
295 * offset - register offset from base I/O address 329 * offset - register offset from base I/O address
296 * data - for dfx_port_write_byte and dfx_port_write_long, this 330 * data - for dfx_port_write_long, this is a value to write;
297 * is a value to write. 331 * for dfx_port_read_long, this is a pointer to store
298 * for dfx_port_read_byte and dfx_port_read_byte, this 332 * the read value
299 * is a pointer to store the read value.
300 * 333 *
301 * Functional Description: 334 * Functional Description:
302 * These routines perform the correct operation to read or write 335 * These routines perform the correct operation to read or write
@@ -310,7 +343,7 @@ static struct net_device *root_dfx_eisa_dev;
310 * registers using the register offsets defined in DEFXX.H. 343 * registers using the register offsets defined in DEFXX.H.
311 * 344 *
312 * PCI port block base addresses are assigned by the PCI BIOS or system 345 * PCI port block base addresses are assigned by the PCI BIOS or system
313 * firmware. There is one 128 byte port block which can be accessed. It 346 * firmware. There is one 128 byte port block which can be accessed. It
314 * allows for I/O mapping of both PDQ and PFI registers using the register 347 * allows for I/O mapping of both PDQ and PFI registers using the register
315 * offsets defined in DEFXX.H. 348 * offsets defined in DEFXX.H.
316 * 349 *
@@ -318,7 +351,7 @@ static struct net_device *root_dfx_eisa_dev;
318 * None 351 * None
319 * 352 *
320 * Assumptions: 353 * Assumptions:
321 * bp->base_addr is a valid base I/O address for this adapter. 354 * bp->base is a valid base I/O address for this adapter.
322 * offset is a valid register offset for this adapter. 355 * offset is a valid register offset for this adapter.
323 * 356 *
324 * Side Effects: 357 * Side Effects:
@@ -329,69 +362,135 @@ static struct net_device *root_dfx_eisa_dev;
329 * advantage of strict data type checking. 362 * advantage of strict data type checking.
330 */ 363 */
331 364
332static inline void dfx_port_write_byte( 365static inline void dfx_writel(DFX_board_t *bp, int offset, u32 data)
333 DFX_board_t *bp, 366{
334 int offset, 367 writel(data, bp->base.mem + offset);
335 u8 data 368 mb();
336 ) 369}
337 370
338 { 371static inline void dfx_outl(DFX_board_t *bp, int offset, u32 data)
339 u16 port = bp->base_addr + offset; 372{
373 outl(data, bp->base.port + offset);
374}
340 375
341 outb(data, port); 376static void dfx_port_write_long(DFX_board_t *bp, int offset, u32 data)
342 } 377{
378 struct device __unused *bdev = bp->bus_dev;
379 int dfx_bus_tc = DFX_BUS_TC(bdev);
380 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
343 381
344static inline void dfx_port_read_byte( 382 if (dfx_use_mmio)
345 DFX_board_t *bp, 383 dfx_writel(bp, offset, data);
346 int offset, 384 else
347 u8 *data 385 dfx_outl(bp, offset, data);
348 ) 386}
349 387
350 {
351 u16 port = bp->base_addr + offset;
352 388
353 *data = inb(port); 389static inline void dfx_readl(DFX_board_t *bp, int offset, u32 *data)
354 } 390{
391 mb();
392 *data = readl(bp->base.mem + offset);
393}
355 394
356static inline void dfx_port_write_long( 395static inline void dfx_inl(DFX_board_t *bp, int offset, u32 *data)
357 DFX_board_t *bp, 396{
358 int offset, 397 *data = inl(bp->base.port + offset);
359 u32 data 398}
360 )
361 399
362 { 400static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data)
363 u16 port = bp->base_addr + offset; 401{
402 struct device __unused *bdev = bp->bus_dev;
403 int dfx_bus_tc = DFX_BUS_TC(bdev);
404 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
364 405
365 outl(data, port); 406 if (dfx_use_mmio)
366 } 407 dfx_readl(bp, offset, data);
408 else
409 dfx_inl(bp, offset, data);
410}
367 411
368static inline void dfx_port_read_long(
369 DFX_board_t *bp,
370 int offset,
371 u32 *data
372 )
373 412
374 { 413/*
375 u16 port = bp->base_addr + offset; 414 * ================
415 * = dfx_get_bars =
416 * ================
417 *
418 * Overview:
419 * Retrieves the address range used to access control and status
420 * registers.
421 *
422 * Returns:
423 * None
424 *
425 * Arguments:
426 * bdev - pointer to device information
427 * bar_start - pointer to store the start address
428 * bar_len - pointer to store the length of the area
429 *
430 * Assumptions:
431 * I am sure there are some.
432 *
433 * Side Effects:
434 * None
435 */
436static void dfx_get_bars(struct device *bdev,
437 resource_size_t *bar_start, resource_size_t *bar_len)
438{
439 int dfx_bus_pci = DFX_BUS_PCI(bdev);
440 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
441 int dfx_bus_tc = DFX_BUS_TC(bdev);
442 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
376 443
377 *data = inl(port); 444 if (dfx_bus_pci) {
378 } 445 int num = dfx_use_mmio ? 0 : 1;
379 446
447 *bar_start = pci_resource_start(to_pci_dev(bdev), num);
448 *bar_len = pci_resource_len(to_pci_dev(bdev), num);
449 }
450 if (dfx_bus_eisa) {
451 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
452 resource_size_t bar;
453
454 if (dfx_use_mmio) {
455 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_2);
456 bar <<= 8;
457 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_1);
458 bar <<= 8;
459 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_0);
460 bar <<= 16;
461 *bar_start = bar;
462 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_2);
463 bar <<= 8;
464 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_1);
465 bar <<= 8;
466 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_0);
467 bar <<= 16;
468 *bar_len = (bar | PI_MEM_ADD_MASK_M) + 1;
469 } else {
470 *bar_start = base_addr;
471 *bar_len = PI_ESIC_K_CSR_IO_LEN;
472 }
473 }
474 if (dfx_bus_tc) {
475 *bar_start = to_tc_dev(bdev)->resource.start +
476 PI_TC_K_CSR_OFFSET;
477 *bar_len = PI_TC_K_CSR_LEN;
478 }
479}
380 480
381/* 481/*
382 * ============= 482 * ================
383 * = dfx_init_one_pci_or_eisa = 483 * = dfx_register =
384 * ============= 484 * ================
385 * 485 *
386 * Overview: 486 * Overview:
387 * Initializes a supported FDDI EISA or PCI controller 487 * Initializes a supported FDDI controller
388 * 488 *
389 * Returns: 489 * Returns:
390 * Condition code 490 * Condition code
391 * 491 *
392 * Arguments: 492 * Arguments:
393 * pdev - pointer to pci device information (NULL for EISA) 493 * bdev - pointer to device information
394 * ioaddr - pointer to port (NULL for PCI)
395 * 494 *
396 * Functional Description: 495 * Functional Description:
397 * 496 *
@@ -407,56 +506,74 @@ static inline void dfx_port_read_long(
407 * initialized and the board resources are read and stored in 506 * initialized and the board resources are read and stored in
408 * the device structure. 507 * the device structure.
409 */ 508 */
410static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, long ioaddr) 509static int __devinit dfx_register(struct device *bdev)
411{ 510{
412 static int version_disp; 511 static int version_disp;
413 char *print_name = DRV_NAME; 512 int dfx_bus_pci = DFX_BUS_PCI(bdev);
513 int dfx_bus_tc = DFX_BUS_TC(bdev);
514 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
515 char *print_name = bdev->bus_id;
414 struct net_device *dev; 516 struct net_device *dev;
415 DFX_board_t *bp; /* board pointer */ 517 DFX_board_t *bp; /* board pointer */
518 resource_size_t bar_start = 0; /* pointer to port */
519 resource_size_t bar_len = 0; /* resource length */
416 int alloc_size; /* total buffer size used */ 520 int alloc_size; /* total buffer size used */
417 int err; 521 struct resource *region;
522 int err = 0;
418 523
419 if (!version_disp) { /* display version info if adapter is found */ 524 if (!version_disp) { /* display version info if adapter is found */
420 version_disp = 1; /* set display flag to TRUE so that */ 525 version_disp = 1; /* set display flag to TRUE so that */
421 printk(version); /* we only display this string ONCE */ 526 printk(version); /* we only display this string ONCE */
422 } 527 }
423 528
424 if (pdev != NULL)
425 print_name = pci_name(pdev);
426
427 dev = alloc_fddidev(sizeof(*bp)); 529 dev = alloc_fddidev(sizeof(*bp));
428 if (!dev) { 530 if (!dev) {
429 printk(KERN_ERR "%s: unable to allocate fddidev, aborting\n", 531 printk(KERN_ERR "%s: Unable to allocate fddidev, aborting\n",
430 print_name); 532 print_name);
431 return -ENOMEM; 533 return -ENOMEM;
432 } 534 }
433 535
434 /* Enable PCI device. */ 536 /* Enable PCI device. */
435 if (pdev != NULL) { 537 if (dfx_bus_pci && pci_enable_device(to_pci_dev(bdev))) {
436 err = pci_enable_device (pdev); 538 printk(KERN_ERR "%s: Cannot enable PCI device, aborting\n",
437 if (err) goto err_out; 539 print_name);
438 ioaddr = pci_resource_start (pdev, 1); 540 goto err_out;
439 } 541 }
440 542
441 SET_MODULE_OWNER(dev); 543 SET_MODULE_OWNER(dev);
442 if (pdev != NULL) 544 SET_NETDEV_DEV(dev, bdev);
443 SET_NETDEV_DEV(dev, &pdev->dev); 545
546 bp = netdev_priv(dev);
547 bp->bus_dev = bdev;
548 dev_set_drvdata(bdev, dev);
444 549
445 bp = dev->priv; 550 dfx_get_bars(bdev, &bar_start, &bar_len);
446 551
447 if (!request_region(ioaddr, 552 if (dfx_use_mmio)
448 pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN, 553 region = request_mem_region(bar_start, bar_len, print_name);
449 print_name)) { 554 else
555 region = request_region(bar_start, bar_len, print_name);
556 if (!region) {
450 printk(KERN_ERR "%s: Cannot reserve I/O resource " 557 printk(KERN_ERR "%s: Cannot reserve I/O resource "
451 "0x%x @ 0x%lx, aborting\n", print_name, 558 "0x%lx @ 0x%lx, aborting\n",
452 pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN, ioaddr); 559 print_name, (long)bar_len, (long)bar_start);
453 err = -EBUSY; 560 err = -EBUSY;
454 goto err_out; 561 goto err_out_disable;
455 } 562 }
456 563
457 /* Initialize new device structure */ 564 /* Set up I/O base address. */
565 if (dfx_use_mmio) {
566 bp->base.mem = ioremap_nocache(bar_start, bar_len);
567 if (!bp->base.mem) {
568 printk(KERN_ERR "%s: Cannot map MMIO\n", print_name);
569 goto err_out_region;
570 }
571 } else {
572 bp->base.port = bar_start;
573 dev->base_addr = bar_start;
574 }
458 575
459 dev->base_addr = ioaddr; /* save port (I/O) base address */ 576 /* Initialize new device structure */
460 577
461 dev->get_stats = dfx_ctl_get_stats; 578 dev->get_stats = dfx_ctl_get_stats;
462 dev->open = dfx_open; 579 dev->open = dfx_open;
@@ -465,22 +582,12 @@ static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, long ioaddr)
465 dev->set_multicast_list = dfx_ctl_set_multicast_list; 582 dev->set_multicast_list = dfx_ctl_set_multicast_list;
466 dev->set_mac_address = dfx_ctl_set_mac_address; 583 dev->set_mac_address = dfx_ctl_set_mac_address;
467 584
468 if (pdev == NULL) { 585 if (dfx_bus_pci)
469 /* EISA board */ 586 pci_set_master(to_pci_dev(bdev));
470 bp->bus_type = DFX_BUS_TYPE_EISA;
471 bp->next = root_dfx_eisa_dev;
472 root_dfx_eisa_dev = dev;
473 } else {
474 /* PCI board */
475 bp->bus_type = DFX_BUS_TYPE_PCI;
476 bp->pci_dev = pdev;
477 pci_set_drvdata (pdev, dev);
478 pci_set_master (pdev);
479 }
480 587
481 if (dfx_driver_init(dev, print_name) != DFX_K_SUCCESS) { 588 if (dfx_driver_init(dev, print_name, bar_start) != DFX_K_SUCCESS) {
482 err = -ENODEV; 589 err = -ENODEV;
483 goto err_out_region; 590 goto err_out_unmap;
484 } 591 }
485 592
486 err = register_netdev(dev); 593 err = register_netdev(dev);
@@ -499,44 +606,28 @@ err_out_kfree:
499 sizeof(PI_CONSUMER_BLOCK) + 606 sizeof(PI_CONSUMER_BLOCK) +
500 (PI_ALIGN_K_DESC_BLK - 1); 607 (PI_ALIGN_K_DESC_BLK - 1);
501 if (bp->kmalloced) 608 if (bp->kmalloced)
502 pci_free_consistent(pdev, alloc_size, 609 dma_free_coherent(bdev, alloc_size,
503 bp->kmalloced, bp->kmalloced_dma); 610 bp->kmalloced, bp->kmalloced_dma);
611
612err_out_unmap:
613 if (dfx_use_mmio)
614 iounmap(bp->base.mem);
615
504err_out_region: 616err_out_region:
505 release_region(ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN); 617 if (dfx_use_mmio)
618 release_mem_region(bar_start, bar_len);
619 else
620 release_region(bar_start, bar_len);
621
622err_out_disable:
623 if (dfx_bus_pci)
624 pci_disable_device(to_pci_dev(bdev));
625
506err_out: 626err_out:
507 free_netdev(dev); 627 free_netdev(dev);
508 return err; 628 return err;
509} 629}
510 630
511static int __devinit dfx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
512{
513 return dfx_init_one_pci_or_eisa(pdev, 0);
514}
515
516static int __init dfx_eisa_init(void)
517{
518 int rc = -ENODEV;
519 int i; /* used in for loops */
520 u16 port; /* temporary I/O (port) address */
521 u32 slot_id; /* EISA hardware (slot) ID read from adapter */
522
523 DBG_printk("In dfx_eisa_init...\n");
524
525 /* Scan for FDDI EISA controllers */
526
527 for (i=0; i < DFX_MAX_EISA_SLOTS; i++) /* only scan for up to 16 EISA slots */
528 {
529 port = (i << 12) + PI_ESIC_K_SLOT_ID; /* port = I/O address for reading slot ID */
530 slot_id = inl(port); /* read EISA HW (slot) ID */
531 if ((slot_id & 0xF0FFFFFF) == DEFEA_PRODUCT_ID)
532 {
533 port = (i << 12); /* recalc base addr */
534
535 if (dfx_init_one_pci_or_eisa(NULL, port) == 0) rc = 0;
536 }
537 }
538 return rc;
539}
540 631
541/* 632/*
542 * ================ 633 * ================
@@ -544,7 +635,7 @@ static int __init dfx_eisa_init(void)
544 * ================ 635 * ================
545 * 636 *
546 * Overview: 637 * Overview:
547 * Initializes EISA and PCI controller bus-specific logic. 638 * Initializes the bus-specific controller logic.
548 * 639 *
549 * Returns: 640 * Returns:
550 * None 641 * None
@@ -560,7 +651,7 @@ static int __init dfx_eisa_init(void)
560 * None 651 * None
561 * 652 *
562 * Assumptions: 653 * Assumptions:
563 * dev->base_addr has already been set with the proper 654 * bp->base has already been set with the proper
564 * base I/O address for this device. 655 * base I/O address for this device.
565 * 656 *
566 * Side Effects: 657 * Side Effects:
@@ -571,87 +662,103 @@ static int __init dfx_eisa_init(void)
571 662
572static void __devinit dfx_bus_init(struct net_device *dev) 663static void __devinit dfx_bus_init(struct net_device *dev)
573{ 664{
574 DFX_board_t *bp = dev->priv; 665 DFX_board_t *bp = netdev_priv(dev);
575 u8 val; /* used for I/O read/writes */ 666 struct device *bdev = bp->bus_dev;
667 int dfx_bus_pci = DFX_BUS_PCI(bdev);
668 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
669 int dfx_bus_tc = DFX_BUS_TC(bdev);
670 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
671 u8 val;
576 672
577 DBG_printk("In dfx_bus_init...\n"); 673 DBG_printk("In dfx_bus_init...\n");
578 674
579 /* 675 /* Initialize a pointer back to the net_device struct */
580 * Initialize base I/O address field in bp structure
581 *
582 * Note: bp->base_addr is the same as dev->base_addr.
583 * It's useful because often we'll need to read
584 * or write registers where we already have the
585 * bp pointer instead of the dev pointer. Having
586 * the base address in the bp structure will
587 * save a pointer dereference.
588 *
589 * IMPORTANT!! This field must be defined before
590 * any of the dfx_port_* inline functions are
591 * called.
592 */
593
594 bp->base_addr = dev->base_addr;
595
596 /* And a pointer back to the net_device struct */
597 bp->dev = dev; 676 bp->dev = dev;
598 677
599 /* Initialize adapter based on bus type */ 678 /* Initialize adapter based on bus type */
600 679
601 if (bp->bus_type == DFX_BUS_TYPE_EISA) 680 if (dfx_bus_tc)
602 { 681 dev->irq = to_tc_dev(bdev)->interrupt;
603 /* Get the interrupt level from the ESIC chip */ 682 if (dfx_bus_eisa) {
604 683 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
605 dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &val);
606 switch ((val & PI_CONFIG_STAT_0_M_IRQ) >> PI_CONFIG_STAT_0_V_IRQ)
607 {
608 case PI_CONFIG_STAT_0_IRQ_K_9:
609 dev->irq = 9;
610 break;
611
612 case PI_CONFIG_STAT_0_IRQ_K_10:
613 dev->irq = 10;
614 break;
615 684
616 case PI_CONFIG_STAT_0_IRQ_K_11: 685 /* Get the interrupt level from the ESIC chip. */
617 dev->irq = 11; 686 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
618 break; 687 val &= PI_CONFIG_STAT_0_M_IRQ;
688 val >>= PI_CONFIG_STAT_0_V_IRQ;
619 689
620 case PI_CONFIG_STAT_0_IRQ_K_15: 690 switch (val) {
621 dev->irq = 15; 691 case PI_CONFIG_STAT_0_IRQ_K_9:
622 break; 692 dev->irq = 9;
623 } 693 break;
624
625 /* Enable access to I/O on the board by writing 0x03 to Function Control Register */
626 694
627 dfx_port_write_byte(bp, PI_ESIC_K_FUNCTION_CNTRL, PI_ESIC_K_FUNCTION_CNTRL_IO_ENB); 695 case PI_CONFIG_STAT_0_IRQ_K_10:
696 dev->irq = 10;
697 break;
628 698
629 /* Set the I/O decode range of the board */ 699 case PI_CONFIG_STAT_0_IRQ_K_11:
700 dev->irq = 11;
701 break;
630 702
631 val = ((dev->base_addr >> 12) << PI_IO_CMP_V_SLOT); 703 case PI_CONFIG_STAT_0_IRQ_K_15:
632 dfx_port_write_byte(bp, PI_ESIC_K_IO_CMP_0_1, val); 704 dev->irq = 15;
633 dfx_port_write_byte(bp, PI_ESIC_K_IO_CMP_1_1, val); 705 break;
706 }
634 707
635 /* Enable access to rest of module (including PDQ and packet memory) */ 708 /*
709 * Enable memory decoding (MEMCS0) and/or port decoding
710 * (IOCS1/IOCS0) as appropriate in Function Control
711 * Register. One of the port chip selects seems to be
712 * used for the Burst Holdoff register, but this bit of
713 * documentation is missing and as yet it has not been
714 * determined which of the two. This is also the reason
715 * the size of the decoded port range is twice as large
716 * as one required by the PDQ.
717 */
636 718
637 dfx_port_write_byte(bp, PI_ESIC_K_SLOT_CNTRL, PI_SLOT_CNTRL_M_ENB); 719 /* Set the decode range of the board. */
720 val = ((bp->base.port >> 12) << PI_IO_CMP_V_SLOT);
721 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_1, val);
722 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_0, 0);
723 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_1, val);
724 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_0, 0);
725 val = PI_ESIC_K_CSR_IO_LEN - 1;
726 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_1, (val >> 8) & 0xff);
727 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_0, val & 0xff);
728 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_1, (val >> 8) & 0xff);
729 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_0, val & 0xff);
730
731 /* Enable the decoders. */
732 val = PI_FUNCTION_CNTRL_M_IOCS1 | PI_FUNCTION_CNTRL_M_IOCS0;
733 if (dfx_use_mmio)
734 val |= PI_FUNCTION_CNTRL_M_MEMCS0;
735 outb(base_addr + PI_ESIC_K_FUNCTION_CNTRL, val);
638 736
639 /* 737 /*
640 * Map PDQ registers into I/O space. This is done by clearing a bit 738 * Enable access to the rest of the module
641 * in Burst Holdoff register. 739 * (including PDQ and packet memory).
642 */ 740 */
741 val = PI_SLOT_CNTRL_M_ENB;
742 outb(base_addr + PI_ESIC_K_SLOT_CNTRL, val);
643 743
644 dfx_port_read_byte(bp, PI_ESIC_K_BURST_HOLDOFF, &val); 744 /*
645 dfx_port_write_byte(bp, PI_ESIC_K_BURST_HOLDOFF, (val & ~PI_BURST_HOLDOFF_M_MEM_MAP)); 745 * Map PDQ registers into memory or port space. This is
746 * done with a bit in the Burst Holdoff register.
747 */
748 val = inb(base_addr + PI_DEFEA_K_BURST_HOLDOFF);
749 if (dfx_use_mmio)
750 val |= PI_BURST_HOLDOFF_V_MEM_MAP;
751 else
752 val &= ~PI_BURST_HOLDOFF_V_MEM_MAP;
753 outb(base_addr + PI_DEFEA_K_BURST_HOLDOFF, val);
646 754
647 /* Enable interrupts at EISA bus interface chip (ESIC) */ 755 /* Enable interrupts at EISA bus interface chip (ESIC) */
648 756 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
649 dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &val); 757 val |= PI_CONFIG_STAT_0_M_INT_ENB;
650 dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, (val | PI_CONFIG_STAT_0_M_INT_ENB)); 758 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val);
651 } 759 }
652 else 760 if (dfx_bus_pci) {
653 { 761 struct pci_dev *pdev = to_pci_dev(bdev);
654 struct pci_dev *pdev = bp->pci_dev;
655 762
656 /* Get the interrupt level from the PCI Configuration Table */ 763 /* Get the interrupt level from the PCI Configuration Table */
657 764
@@ -660,17 +767,70 @@ static void __devinit dfx_bus_init(struct net_device *dev)
660 /* Check Latency Timer and set if less than minimal */ 767 /* Check Latency Timer and set if less than minimal */
661 768
662 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &val); 769 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &val);
663 if (val < PFI_K_LAT_TIMER_MIN) /* if less than min, override with default */ 770 if (val < PFI_K_LAT_TIMER_MIN) {
664 {
665 val = PFI_K_LAT_TIMER_DEF; 771 val = PFI_K_LAT_TIMER_DEF;
666 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, val); 772 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, val);
667 } 773 }
668 774
669 /* Enable interrupts at PCI bus interface chip (PFI) */ 775 /* Enable interrupts at PCI bus interface chip (PFI) */
776 val = PFI_MODE_M_PDQ_INT_ENB | PFI_MODE_M_DMA_ENB;
777 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, val);
778 }
779}
670 780
671 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, (PFI_MODE_M_PDQ_INT_ENB | PFI_MODE_M_DMA_ENB)); 781/*
672 } 782 * ==================
783 * = dfx_bus_uninit =
784 * ==================
785 *
786 * Overview:
787 * Uninitializes the bus-specific controller logic.
788 *
789 * Returns:
790 * None
791 *
792 * Arguments:
793 * dev - pointer to device information
794 *
795 * Functional Description:
796 * Perform bus-specific logic uninitialization.
797 *
798 * Return Codes:
799 * None
800 *
801 * Assumptions:
802 * bp->base has already been set with the proper
803 * base I/O address for this device.
804 *
805 * Side Effects:
806 * Interrupts are disabled at the adapter bus-specific logic.
807 */
808
809static void __devinit dfx_bus_uninit(struct net_device *dev)
810{
811 DFX_board_t *bp = netdev_priv(dev);
812 struct device *bdev = bp->bus_dev;
813 int dfx_bus_pci = DFX_BUS_PCI(bdev);
814 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
815 u8 val;
816
817 DBG_printk("In dfx_bus_uninit...\n");
818
819 /* Uninitialize adapter based on bus type */
820
821 if (dfx_bus_eisa) {
822 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
823
824 /* Disable interrupts at EISA bus interface chip (ESIC) */
825 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
826 val &= ~PI_CONFIG_STAT_0_M_INT_ENB;
827 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val);
828 }
829 if (dfx_bus_pci) {
830 /* Disable interrupts at PCI bus interface chip (PFI) */
831 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, 0);
673 } 832 }
833}
674 834
675 835
676/* 836/*
@@ -705,18 +865,16 @@ static void __devinit dfx_bus_init(struct net_device *dev)
705 865
706static void __devinit dfx_bus_config_check(DFX_board_t *bp) 866static void __devinit dfx_bus_config_check(DFX_board_t *bp)
707{ 867{
868 struct device __unused *bdev = bp->bus_dev;
869 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
708 int status; /* return code from adapter port control call */ 870 int status; /* return code from adapter port control call */
709 u32 slot_id; /* EISA-bus hardware id (DEC3001, DEC3002,...) */
710 u32 host_data; /* LW data returned from port control call */ 871 u32 host_data; /* LW data returned from port control call */
711 872
712 DBG_printk("In dfx_bus_config_check...\n"); 873 DBG_printk("In dfx_bus_config_check...\n");
713 874
714 /* Configuration check only valid for EISA adapter */ 875 /* Configuration check only valid for EISA adapter */
715 876
716 if (bp->bus_type == DFX_BUS_TYPE_EISA) 877 if (dfx_bus_eisa) {
717 {
718 dfx_port_read_long(bp, PI_ESIC_K_SLOT_ID, &slot_id);
719
720 /* 878 /*
721 * First check if revision 2 EISA controller. Rev. 1 cards used 879 * First check if revision 2 EISA controller. Rev. 1 cards used
722 * PDQ revision B, so no workaround needed in this case. Rev. 3 880 * PDQ revision B, so no workaround needed in this case. Rev. 3
@@ -724,14 +882,11 @@ static void __devinit dfx_bus_config_check(DFX_board_t *bp)
724 * case, either. Only Rev. 2 cards used either Rev. D or E 882 * case, either. Only Rev. 2 cards used either Rev. D or E
725 * chips, so we must verify the chip revision on Rev. 2 cards. 883 * chips, so we must verify the chip revision on Rev. 2 cards.
726 */ 884 */
727 885 if (to_eisa_device(bdev)->id.driver_data == DEFEA_PROD_ID_2) {
728 if (slot_id == DEFEA_PROD_ID_2)
729 {
730 /* 886 /*
731 * Revision 2 FDDI EISA controller found, so let's check PDQ 887 * Revision 2 FDDI EISA controller found,
732 * revision of adapter. 888 * so let's check PDQ revision of adapter.
733 */ 889 */
734
735 status = dfx_hw_port_ctrl_req(bp, 890 status = dfx_hw_port_ctrl_req(bp,
736 PI_PCTRL_M_SUB_CMD, 891 PI_PCTRL_M_SUB_CMD,
737 PI_SUB_CMD_K_PDQ_REV_GET, 892 PI_SUB_CMD_K_PDQ_REV_GET,
@@ -805,13 +960,20 @@ static void __devinit dfx_bus_config_check(DFX_board_t *bp)
805 */ 960 */
806 961
807static int __devinit dfx_driver_init(struct net_device *dev, 962static int __devinit dfx_driver_init(struct net_device *dev,
808 const char *print_name) 963 const char *print_name,
964 resource_size_t bar_start)
809{ 965{
810 DFX_board_t *bp = dev->priv; 966 DFX_board_t *bp = netdev_priv(dev);
811 int alloc_size; /* total buffer size needed */ 967 struct device *bdev = bp->bus_dev;
812 char *top_v, *curr_v; /* virtual addrs into memory block */ 968 int dfx_bus_pci = DFX_BUS_PCI(bdev);
813 dma_addr_t top_p, curr_p; /* physical addrs into memory block */ 969 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
814 u32 data; /* host data register value */ 970 int dfx_bus_tc = DFX_BUS_TC(bdev);
971 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
972 int alloc_size; /* total buffer size needed */
973 char *top_v, *curr_v; /* virtual addrs into memory block */
974 dma_addr_t top_p, curr_p; /* physical addrs into memory block */
975 u32 data, le32; /* host data register value */
976 char *board_name = NULL;
815 977
816 DBG_printk("In dfx_driver_init...\n"); 978 DBG_printk("In dfx_driver_init...\n");
817 979
@@ -860,8 +1022,8 @@ static int __devinit dfx_driver_init(struct net_device *dev,
860 print_name); 1022 print_name);
861 return(DFX_K_FAILURE); 1023 return(DFX_K_FAILURE);
862 } 1024 }
863 data = cpu_to_le32(data); 1025 le32 = cpu_to_le32(data);
864 memcpy(&bp->factory_mac_addr[0], &data, sizeof(u32)); 1026 memcpy(&bp->factory_mac_addr[0], &le32, sizeof(u32));
865 1027
866 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0, 1028 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
867 &data) != DFX_K_SUCCESS) { 1029 &data) != DFX_K_SUCCESS) {
@@ -869,8 +1031,8 @@ static int __devinit dfx_driver_init(struct net_device *dev,
869 print_name); 1031 print_name);
870 return(DFX_K_FAILURE); 1032 return(DFX_K_FAILURE);
871 } 1033 }
872 data = cpu_to_le32(data); 1034 le32 = cpu_to_le32(data);
873 memcpy(&bp->factory_mac_addr[4], &data, sizeof(u16)); 1035 memcpy(&bp->factory_mac_addr[4], &le32, sizeof(u16));
874 1036
875 /* 1037 /*
876 * Set current address to factory address 1038 * Set current address to factory address
@@ -880,20 +1042,18 @@ static int __devinit dfx_driver_init(struct net_device *dev,
880 */ 1042 */
881 1043
882 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN); 1044 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
883 if (bp->bus_type == DFX_BUS_TYPE_EISA) 1045 if (dfx_bus_tc)
884 printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, " 1046 board_name = "DEFTA";
885 "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n", 1047 if (dfx_bus_eisa)
886 print_name, dev->base_addr, dev->irq, 1048 board_name = "DEFEA";
887 dev->dev_addr[0], dev->dev_addr[1], 1049 if (dfx_bus_pci)
888 dev->dev_addr[2], dev->dev_addr[3], 1050 board_name = "DEFPA";
889 dev->dev_addr[4], dev->dev_addr[5]); 1051 pr_info("%s: %s at %saddr = 0x%llx, IRQ = %d, "
890 else 1052 "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
891 printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, " 1053 print_name, board_name, dfx_use_mmio ? "" : "I/O ",
892 "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n", 1054 (long long)bar_start, dev->irq,
893 print_name, dev->base_addr, dev->irq, 1055 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
894 dev->dev_addr[0], dev->dev_addr[1], 1056 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
895 dev->dev_addr[2], dev->dev_addr[3],
896 dev->dev_addr[4], dev->dev_addr[5]);
897 1057
898 /* 1058 /*
899 * Get memory for descriptor block, consumer block, and other buffers 1059 * Get memory for descriptor block, consumer block, and other buffers
@@ -908,8 +1068,9 @@ static int __devinit dfx_driver_init(struct net_device *dev,
908#endif 1068#endif
909 sizeof(PI_CONSUMER_BLOCK) + 1069 sizeof(PI_CONSUMER_BLOCK) +
910 (PI_ALIGN_K_DESC_BLK - 1); 1070 (PI_ALIGN_K_DESC_BLK - 1);
911 bp->kmalloced = top_v = pci_alloc_consistent(bp->pci_dev, alloc_size, 1071 bp->kmalloced = top_v = dma_alloc_coherent(bp->bus_dev, alloc_size,
912 &bp->kmalloced_dma); 1072 &bp->kmalloced_dma,
1073 GFP_ATOMIC);
913 if (top_v == NULL) { 1074 if (top_v == NULL) {
914 printk("%s: Could not allocate memory for host buffers " 1075 printk("%s: Could not allocate memory for host buffers "
915 "and structures!\n", print_name); 1076 "and structures!\n", print_name);
@@ -1219,14 +1380,15 @@ static int dfx_adap_init(DFX_board_t *bp, int get_buffers)
1219 1380
1220static int dfx_open(struct net_device *dev) 1381static int dfx_open(struct net_device *dev)
1221{ 1382{
1383 DFX_board_t *bp = netdev_priv(dev);
1222 int ret; 1384 int ret;
1223 DFX_board_t *bp = dev->priv;
1224 1385
1225 DBG_printk("In dfx_open...\n"); 1386 DBG_printk("In dfx_open...\n");
1226 1387
1227 /* Register IRQ - support shared interrupts by passing device ptr */ 1388 /* Register IRQ - support shared interrupts by passing device ptr */
1228 1389
1229 ret = request_irq(dev->irq, dfx_interrupt, IRQF_SHARED, dev->name, dev); 1390 ret = request_irq(dev->irq, dfx_interrupt, IRQF_SHARED, dev->name,
1391 dev);
1230 if (ret) { 1392 if (ret) {
1231 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq); 1393 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
1232 return ret; 1394 return ret;
@@ -1309,7 +1471,7 @@ static int dfx_open(struct net_device *dev)
1309 1471
1310static int dfx_close(struct net_device *dev) 1472static int dfx_close(struct net_device *dev)
1311{ 1473{
1312 DFX_board_t *bp = dev->priv; 1474 DFX_board_t *bp = netdev_priv(dev);
1313 1475
1314 DBG_printk("In dfx_close...\n"); 1476 DBG_printk("In dfx_close...\n");
1315 1477
@@ -1645,7 +1807,7 @@ static void dfx_int_type_0_process(DFX_board_t *bp)
1645 1807
1646static void dfx_int_common(struct net_device *dev) 1808static void dfx_int_common(struct net_device *dev)
1647{ 1809{
1648 DFX_board_t *bp = dev->priv; 1810 DFX_board_t *bp = netdev_priv(dev);
1649 PI_UINT32 port_status; /* Port Status register */ 1811 PI_UINT32 port_status; /* Port Status register */
1650 1812
1651 /* Process xmt interrupts - frequent case, so always call this routine */ 1813 /* Process xmt interrupts - frequent case, so always call this routine */
@@ -1715,18 +1877,16 @@ static void dfx_int_common(struct net_device *dev)
1715 1877
1716static irqreturn_t dfx_interrupt(int irq, void *dev_id) 1878static irqreturn_t dfx_interrupt(int irq, void *dev_id)
1717{ 1879{
1718 struct net_device *dev = dev_id; 1880 struct net_device *dev = dev_id;
1719 DFX_board_t *bp; /* private board structure pointer */ 1881 DFX_board_t *bp = netdev_priv(dev);
1720 1882 struct device *bdev = bp->bus_dev;
1721 /* Get board pointer only if device structure is valid */ 1883 int dfx_bus_pci = DFX_BUS_PCI(bdev);
1722 1884 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
1723 bp = dev->priv; 1885 int dfx_bus_tc = DFX_BUS_TC(bdev);
1724
1725 /* See if we're already servicing an interrupt */
1726 1886
1727 /* Service adapter interrupts */ 1887 /* Service adapter interrupts */
1728 1888
1729 if (bp->bus_type == DFX_BUS_TYPE_PCI) { 1889 if (dfx_bus_pci) {
1730 u32 status; 1890 u32 status;
1731 1891
1732 dfx_port_read_long(bp, PFI_K_REG_STATUS, &status); 1892 dfx_port_read_long(bp, PFI_K_REG_STATUS, &status);
@@ -1750,10 +1910,12 @@ static irqreturn_t dfx_interrupt(int irq, void *dev_id)
1750 PFI_MODE_M_DMA_ENB)); 1910 PFI_MODE_M_DMA_ENB));
1751 1911
1752 spin_unlock(&bp->lock); 1912 spin_unlock(&bp->lock);
1753 } else { 1913 }
1914 if (dfx_bus_eisa) {
1915 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
1754 u8 status; 1916 u8 status;
1755 1917
1756 dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &status); 1918 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
1757 if (!(status & PI_CONFIG_STAT_0_M_PEND)) 1919 if (!(status & PI_CONFIG_STAT_0_M_PEND))
1758 return IRQ_NONE; 1920 return IRQ_NONE;
1759 1921
@@ -1761,15 +1923,35 @@ static irqreturn_t dfx_interrupt(int irq, void *dev_id)
1761 1923
1762 /* Disable interrupts at the ESIC */ 1924 /* Disable interrupts at the ESIC */
1763 status &= ~PI_CONFIG_STAT_0_M_INT_ENB; 1925 status &= ~PI_CONFIG_STAT_0_M_INT_ENB;
1764 dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, status); 1926 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status);
1765 1927
1766 /* Call interrupt service routine for this adapter */ 1928 /* Call interrupt service routine for this adapter */
1767 dfx_int_common(dev); 1929 dfx_int_common(dev);
1768 1930
1769 /* Reenable interrupts at the ESIC */ 1931 /* Reenable interrupts at the ESIC */
1770 dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &status); 1932 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
1771 status |= PI_CONFIG_STAT_0_M_INT_ENB; 1933 status |= PI_CONFIG_STAT_0_M_INT_ENB;
1772 dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, status); 1934 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status);
1935
1936 spin_unlock(&bp->lock);
1937 }
1938 if (dfx_bus_tc) {
1939 u32 status;
1940
1941 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &status);
1942 if (!(status & (PI_PSTATUS_M_RCV_DATA_PENDING |
1943 PI_PSTATUS_M_XMT_DATA_PENDING |
1944 PI_PSTATUS_M_SMT_HOST_PENDING |
1945 PI_PSTATUS_M_UNSOL_PENDING |
1946 PI_PSTATUS_M_CMD_RSP_PENDING |
1947 PI_PSTATUS_M_CMD_REQ_PENDING |
1948 PI_PSTATUS_M_TYPE_0_PENDING)))
1949 return IRQ_NONE;
1950
1951 spin_lock(&bp->lock);
1952
1953 /* Call interrupt service routine for this adapter */
1954 dfx_int_common(dev);
1773 1955
1774 spin_unlock(&bp->lock); 1956 spin_unlock(&bp->lock);
1775 } 1957 }
@@ -1823,7 +2005,7 @@ static irqreturn_t dfx_interrupt(int irq, void *dev_id)
1823 2005
1824static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev) 2006static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev)
1825 { 2007 {
1826 DFX_board_t *bp = dev->priv; 2008 DFX_board_t *bp = netdev_priv(dev);
1827 2009
1828 /* Fill the bp->stats structure with driver-maintained counters */ 2010 /* Fill the bp->stats structure with driver-maintained counters */
1829 2011
@@ -2009,8 +2191,8 @@ static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev)
2009 */ 2191 */
2010 2192
2011static void dfx_ctl_set_multicast_list(struct net_device *dev) 2193static void dfx_ctl_set_multicast_list(struct net_device *dev)
2012 { 2194{
2013 DFX_board_t *bp = dev->priv; 2195 DFX_board_t *bp = netdev_priv(dev);
2014 int i; /* used as index in for loop */ 2196 int i; /* used as index in for loop */
2015 struct dev_mc_list *dmi; /* ptr to multicast addr entry */ 2197 struct dev_mc_list *dmi; /* ptr to multicast addr entry */
2016 2198
@@ -2124,8 +2306,8 @@ static void dfx_ctl_set_multicast_list(struct net_device *dev)
2124 2306
2125static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr) 2307static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr)
2126 { 2308 {
2127 DFX_board_t *bp = dev->priv;
2128 struct sockaddr *p_sockaddr = (struct sockaddr *)addr; 2309 struct sockaddr *p_sockaddr = (struct sockaddr *)addr;
2310 DFX_board_t *bp = netdev_priv(dev);
2129 2311
2130 /* Copy unicast address to driver-maintained structs and update count */ 2312 /* Copy unicast address to driver-maintained structs and update count */
2131 2313
@@ -2764,9 +2946,9 @@ static int dfx_rcv_init(DFX_board_t *bp, int get_buffers)
2764 2946
2765 my_skb_align(newskb, 128); 2947 my_skb_align(newskb, 128);
2766 bp->descr_block_virt->rcv_data[i + j].long_1 = 2948 bp->descr_block_virt->rcv_data[i + j].long_1 =
2767 (u32)pci_map_single(bp->pci_dev, newskb->data, 2949 (u32)dma_map_single(bp->bus_dev, newskb->data,
2768 NEW_SKB_SIZE, 2950 NEW_SKB_SIZE,
2769 PCI_DMA_FROMDEVICE); 2951 DMA_FROM_DEVICE);
2770 /* 2952 /*
2771 * p_rcv_buff_va is only used inside the 2953 * p_rcv_buff_va is only used inside the
2772 * kernel so we put the skb pointer here. 2954 * kernel so we put the skb pointer here.
@@ -2880,17 +3062,17 @@ static void dfx_rcv_queue_process(
2880 3062
2881 my_skb_align(newskb, 128); 3063 my_skb_align(newskb, 128);
2882 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry]; 3064 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
2883 pci_unmap_single(bp->pci_dev, 3065 dma_unmap_single(bp->bus_dev,
2884 bp->descr_block_virt->rcv_data[entry].long_1, 3066 bp->descr_block_virt->rcv_data[entry].long_1,
2885 NEW_SKB_SIZE, 3067 NEW_SKB_SIZE,
2886 PCI_DMA_FROMDEVICE); 3068 DMA_FROM_DEVICE);
2887 skb_reserve(skb, RCV_BUFF_K_PADDING); 3069 skb_reserve(skb, RCV_BUFF_K_PADDING);
2888 bp->p_rcv_buff_va[entry] = (char *)newskb; 3070 bp->p_rcv_buff_va[entry] = (char *)newskb;
2889 bp->descr_block_virt->rcv_data[entry].long_1 = 3071 bp->descr_block_virt->rcv_data[entry].long_1 =
2890 (u32)pci_map_single(bp->pci_dev, 3072 (u32)dma_map_single(bp->bus_dev,
2891 newskb->data, 3073 newskb->data,
2892 NEW_SKB_SIZE, 3074 NEW_SKB_SIZE,
2893 PCI_DMA_FROMDEVICE); 3075 DMA_FROM_DEVICE);
2894 } else 3076 } else
2895 skb = NULL; 3077 skb = NULL;
2896 } else 3078 } else
@@ -3010,7 +3192,7 @@ static int dfx_xmt_queue_pkt(
3010 ) 3192 )
3011 3193
3012 { 3194 {
3013 DFX_board_t *bp = dev->priv; 3195 DFX_board_t *bp = netdev_priv(dev);
3014 u8 prod; /* local transmit producer index */ 3196 u8 prod; /* local transmit producer index */
3015 PI_XMT_DESCR *p_xmt_descr; /* ptr to transmit descriptor block entry */ 3197 PI_XMT_DESCR *p_xmt_descr; /* ptr to transmit descriptor block entry */
3016 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */ 3198 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
@@ -3116,8 +3298,8 @@ static int dfx_xmt_queue_pkt(
3116 */ 3298 */
3117 3299
3118 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN)); 3300 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
3119 p_xmt_descr->long_1 = (u32)pci_map_single(bp->pci_dev, skb->data, 3301 p_xmt_descr->long_1 = (u32)dma_map_single(bp->bus_dev, skb->data,
3120 skb->len, PCI_DMA_TODEVICE); 3302 skb->len, DMA_TO_DEVICE);
3121 3303
3122 /* 3304 /*
3123 * Verify that descriptor is actually available 3305 * Verify that descriptor is actually available
@@ -3220,10 +3402,10 @@ static int dfx_xmt_done(DFX_board_t *bp)
3220 3402
3221 /* Return skb to operating system */ 3403 /* Return skb to operating system */
3222 comp = bp->rcv_xmt_reg.index.xmt_comp; 3404 comp = bp->rcv_xmt_reg.index.xmt_comp;
3223 pci_unmap_single(bp->pci_dev, 3405 dma_unmap_single(bp->bus_dev,
3224 bp->descr_block_virt->xmt_data[comp].long_1, 3406 bp->descr_block_virt->xmt_data[comp].long_1,
3225 p_xmt_drv_descr->p_skb->len, 3407 p_xmt_drv_descr->p_skb->len,
3226 PCI_DMA_TODEVICE); 3408 DMA_TO_DEVICE);
3227 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb); 3409 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
3228 3410
3229 /* 3411 /*
@@ -3344,10 +3526,10 @@ static void dfx_xmt_flush( DFX_board_t *bp )
3344 3526
3345 /* Return skb to operating system */ 3527 /* Return skb to operating system */
3346 comp = bp->rcv_xmt_reg.index.xmt_comp; 3528 comp = bp->rcv_xmt_reg.index.xmt_comp;
3347 pci_unmap_single(bp->pci_dev, 3529 dma_unmap_single(bp->bus_dev,
3348 bp->descr_block_virt->xmt_data[comp].long_1, 3530 bp->descr_block_virt->xmt_data[comp].long_1,
3349 p_xmt_drv_descr->p_skb->len, 3531 p_xmt_drv_descr->p_skb->len,
3350 PCI_DMA_TODEVICE); 3532 DMA_TO_DEVICE);
3351 dev_kfree_skb(p_xmt_drv_descr->p_skb); 3533 dev_kfree_skb(p_xmt_drv_descr->p_skb);
3352 3534
3353 /* Increment transmit error counter */ 3535 /* Increment transmit error counter */
@@ -3375,13 +3557,44 @@ static void dfx_xmt_flush( DFX_board_t *bp )
3375 bp->cons_block_virt->xmt_rcv_data = prod_cons; 3557 bp->cons_block_virt->xmt_rcv_data = prod_cons;
3376 } 3558 }
3377 3559
3378static void __devexit dfx_remove_one_pci_or_eisa(struct pci_dev *pdev, struct net_device *dev) 3560/*
3561 * ==================
3562 * = dfx_unregister =
3563 * ==================
3564 *
3565 * Overview:
3566 * Shuts down an FDDI controller
3567 *
3568 * Returns:
3569 * Condition code
3570 *
3571 * Arguments:
3572 * bdev - pointer to device information
3573 *
3574 * Functional Description:
3575 *
3576 * Return Codes:
3577 * None
3578 *
3579 * Assumptions:
3580 * It compiles so it should work :-( (PCI cards do :-)
3581 *
3582 * Side Effects:
3583 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
3584 * freed.
3585 */
3586static void __devexit dfx_unregister(struct device *bdev)
3379{ 3587{
3380 DFX_board_t *bp = dev->priv; 3588 struct net_device *dev = dev_get_drvdata(bdev);
3589 DFX_board_t *bp = netdev_priv(dev);
3590 int dfx_bus_pci = DFX_BUS_PCI(bdev);
3591 int dfx_bus_tc = DFX_BUS_TC(bdev);
3592 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
3593 resource_size_t bar_start = 0; /* pointer to port */
3594 resource_size_t bar_len = 0; /* resource length */
3381 int alloc_size; /* total buffer size used */ 3595 int alloc_size; /* total buffer size used */
3382 3596
3383 unregister_netdev(dev); 3597 unregister_netdev(dev);
3384 release_region(dev->base_addr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN );
3385 3598
3386 alloc_size = sizeof(PI_DESCR_BLOCK) + 3599 alloc_size = sizeof(PI_DESCR_BLOCK) +
3387 PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX + 3600 PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
@@ -3391,78 +3604,141 @@ static void __devexit dfx_remove_one_pci_or_eisa(struct pci_dev *pdev, struct ne
3391 sizeof(PI_CONSUMER_BLOCK) + 3604 sizeof(PI_CONSUMER_BLOCK) +
3392 (PI_ALIGN_K_DESC_BLK - 1); 3605 (PI_ALIGN_K_DESC_BLK - 1);
3393 if (bp->kmalloced) 3606 if (bp->kmalloced)
3394 pci_free_consistent(pdev, alloc_size, bp->kmalloced, 3607 dma_free_coherent(bdev, alloc_size,
3395 bp->kmalloced_dma); 3608 bp->kmalloced, bp->kmalloced_dma);
3609
3610 dfx_bus_uninit(dev);
3611
3612 dfx_get_bars(bdev, &bar_start, &bar_len);
3613 if (dfx_use_mmio) {
3614 iounmap(bp->base.mem);
3615 release_mem_region(bar_start, bar_len);
3616 } else
3617 release_region(bar_start, bar_len);
3618
3619 if (dfx_bus_pci)
3620 pci_disable_device(to_pci_dev(bdev));
3621
3396 free_netdev(dev); 3622 free_netdev(dev);
3397} 3623}
3398 3624
3399static void __devexit dfx_remove_one (struct pci_dev *pdev)
3400{
3401 struct net_device *dev = pci_get_drvdata(pdev);
3402 3625
3403 dfx_remove_one_pci_or_eisa(pdev, dev); 3626static int __devinit __unused dfx_dev_register(struct device *);
3404 pci_set_drvdata(pdev, NULL); 3627static int __devexit __unused dfx_dev_unregister(struct device *);
3405}
3406 3628
3407static struct pci_device_id dfx_pci_tbl[] = { 3629#ifdef CONFIG_PCI
3408 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI, PCI_ANY_ID, PCI_ANY_ID, }, 3630static int __devinit dfx_pci_register(struct pci_dev *,
3409 { 0, } 3631 const struct pci_device_id *);
3632static void __devexit dfx_pci_unregister(struct pci_dev *);
3633
3634static struct pci_device_id dfx_pci_table[] = {
3635 { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI) },
3636 { }
3410}; 3637};
3411MODULE_DEVICE_TABLE(pci, dfx_pci_tbl); 3638MODULE_DEVICE_TABLE(pci, dfx_pci_table);
3412 3639
3413static struct pci_driver dfx_driver = { 3640static struct pci_driver dfx_pci_driver = {
3414 .name = "defxx", 3641 .name = "defxx",
3415 .probe = dfx_init_one, 3642 .id_table = dfx_pci_table,
3416 .remove = __devexit_p(dfx_remove_one), 3643 .probe = dfx_pci_register,
3417 .id_table = dfx_pci_tbl, 3644 .remove = __devexit_p(dfx_pci_unregister),
3418}; 3645};
3419 3646
3420static int dfx_have_pci; 3647static __devinit int dfx_pci_register(struct pci_dev *pdev,
3421static int dfx_have_eisa; 3648 const struct pci_device_id *ent)
3422 3649{
3650 return dfx_register(&pdev->dev);
3651}
3423 3652
3424static void __exit dfx_eisa_cleanup(void) 3653static void __devexit dfx_pci_unregister(struct pci_dev *pdev)
3425{ 3654{
3426 struct net_device *dev = root_dfx_eisa_dev; 3655 dfx_unregister(&pdev->dev);
3656}
3657#endif /* CONFIG_PCI */
3658
3659#ifdef CONFIG_EISA
3660static struct eisa_device_id dfx_eisa_table[] = {
3661 { "DEC3001", DEFEA_PROD_ID_1 },
3662 { "DEC3002", DEFEA_PROD_ID_2 },
3663 { "DEC3003", DEFEA_PROD_ID_3 },
3664 { "DEC3004", DEFEA_PROD_ID_4 },
3665 { }
3666};
3667MODULE_DEVICE_TABLE(eisa, dfx_eisa_table);
3668
3669static struct eisa_driver dfx_eisa_driver = {
3670 .id_table = dfx_eisa_table,
3671 .driver = {
3672 .name = "defxx",
3673 .bus = &eisa_bus_type,
3674 .probe = dfx_dev_register,
3675 .remove = __devexit_p(dfx_dev_unregister),
3676 },
3677};
3678#endif /* CONFIG_EISA */
3679
3680#ifdef CONFIG_TC
3681static struct tc_device_id const dfx_tc_table[] = {
3682 { "DEC ", "PMAF-FA " },
3683 { "DEC ", "PMAF-FD " },
3684 { "DEC ", "PMAF-FS " },
3685 { "DEC ", "PMAF-FU " },
3686 { }
3687};
3688MODULE_DEVICE_TABLE(tc, dfx_tc_table);
3689
3690static struct tc_driver dfx_tc_driver = {
3691 .id_table = dfx_tc_table,
3692 .driver = {
3693 .name = "defxx",
3694 .bus = &tc_bus_type,
3695 .probe = dfx_dev_register,
3696 .remove = __devexit_p(dfx_dev_unregister),
3697 },
3698};
3699#endif /* CONFIG_TC */
3427 3700
3428 while (dev) 3701static int __devinit __unused dfx_dev_register(struct device *dev)
3429 { 3702{
3430 struct net_device *tmp; 3703 int status;
3431 DFX_board_t *bp;
3432 3704
3433 bp = (DFX_board_t*)dev->priv; 3705 status = dfx_register(dev);
3434 tmp = bp->next; 3706 if (!status)
3435 dfx_remove_one_pci_or_eisa(NULL, dev); 3707 get_device(dev);
3436 dev = tmp; 3708 return status;
3437 }
3438} 3709}
3439 3710
3440static int __init dfx_init(void) 3711static int __devexit __unused dfx_dev_unregister(struct device *dev)
3441{ 3712{
3442 int rc_pci, rc_eisa; 3713 put_device(dev);
3443 3714 dfx_unregister(dev);
3444 rc_pci = pci_register_driver(&dfx_driver); 3715 return 0;
3445 if (rc_pci >= 0) dfx_have_pci = 1; 3716}
3446 3717
3447 rc_eisa = dfx_eisa_init();
3448 if (rc_eisa >= 0) dfx_have_eisa = 1;
3449 3718
3450 return ((rc_eisa < 0) ? 0 : rc_eisa) + ((rc_pci < 0) ? 0 : rc_pci); 3719static int __devinit dfx_init(void)
3720{
3721 int status;
3722
3723 status = pci_register_driver(&dfx_pci_driver);
3724 if (!status)
3725 status = eisa_driver_register(&dfx_eisa_driver);
3726 if (!status)
3727 status = tc_register_driver(&dfx_tc_driver);
3728 return status;
3451} 3729}
3452 3730
3453static void __exit dfx_cleanup(void) 3731static void __devexit dfx_cleanup(void)
3454{ 3732{
3455 if (dfx_have_pci) 3733 tc_unregister_driver(&dfx_tc_driver);
3456 pci_unregister_driver(&dfx_driver); 3734 eisa_driver_unregister(&dfx_eisa_driver);
3457 if (dfx_have_eisa) 3735 pci_unregister_driver(&dfx_pci_driver);
3458 dfx_eisa_cleanup();
3459
3460} 3736}
3461 3737
3462module_init(dfx_init); 3738module_init(dfx_init);
3463module_exit(dfx_cleanup); 3739module_exit(dfx_cleanup);
3464MODULE_AUTHOR("Lawrence V. Stefani"); 3740MODULE_AUTHOR("Lawrence V. Stefani");
3465MODULE_DESCRIPTION("DEC FDDIcontroller EISA/PCI (DEFEA/DEFPA) driver " 3741MODULE_DESCRIPTION("DEC FDDIcontroller TC/EISA/PCI (DEFTA/DEFEA/DEFPA) driver "
3466 DRV_VERSION " " DRV_RELDATE); 3742 DRV_VERSION " " DRV_RELDATE);
3467MODULE_LICENSE("GPL"); 3743MODULE_LICENSE("GPL");
3468 3744
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 01:04:15 -0500