diff options
Diffstat (limited to 'drivers/net/cxgb3/xgmac.c')
-rw-r--r-- | drivers/net/cxgb3/xgmac.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/cxgb3/xgmac.c b/drivers/net/cxgb3/xgmac.c index b261be147e7b..c302b1a30cba 100644 --- a/drivers/net/cxgb3/xgmac.c +++ b/drivers/net/cxgb3/xgmac.c | |||
@@ -335,11 +335,11 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu) | |||
335 | hwm = min(hwm, MAC_RXFIFO_SIZE - 8192); | 335 | hwm = min(hwm, MAC_RXFIFO_SIZE - 8192); |
336 | lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4); | 336 | lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4); |
337 | 337 | ||
338 | v = t3_read_reg(adap, A_XGM_RXFIFO_CFG + mac->offset); | ||
339 | if (adap->params.rev == T3_REV_B2 && | 338 | if (adap->params.rev == T3_REV_B2 && |
340 | (t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) { | 339 | (t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) { |
341 | disable_exact_filters(mac); | 340 | disable_exact_filters(mac); |
342 | t3_set_reg_field(adap, A_XGM_RXFIFO_CFG + mac->offset, | 341 | v = t3_read_reg(adap, A_XGM_RX_CFG + mac->offset); |
342 | t3_set_reg_field(adap, A_XGM_RX_CFG + mac->offset, | ||
343 | F_ENHASHMCAST | F_COPYALLFRAMES, F_DISBCAST); | 343 | F_ENHASHMCAST | F_COPYALLFRAMES, F_DISBCAST); |
344 | 344 | ||
345 | /* drain rx FIFO */ | 345 | /* drain rx FIFO */ |
@@ -347,11 +347,12 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu) | |||
347 | A_XGM_RX_MAX_PKT_SIZE_ERR_CNT + | 347 | A_XGM_RX_MAX_PKT_SIZE_ERR_CNT + |
348 | mac->offset, | 348 | mac->offset, |
349 | 1 << 31, 1, 20, 5)) { | 349 | 1 << 31, 1, 20, 5)) { |
350 | t3_write_reg(adap, A_XGM_RXFIFO_CFG + mac->offset, v); | 350 | t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v); |
351 | enable_exact_filters(mac); | 351 | enable_exact_filters(mac); |
352 | return -EIO; | 352 | return -EIO; |
353 | } | 353 | } |
354 | t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu); | 354 | t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu); |
355 | t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v); | ||
355 | enable_exact_filters(mac); | 356 | enable_exact_filters(mac); |
356 | } else | 357 | } else |
357 | t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu); | 358 | t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu); |
@@ -362,6 +363,7 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu) | |||
362 | */ | 363 | */ |
363 | hwm = rx_fifo_hwm(mtu); | 364 | hwm = rx_fifo_hwm(mtu); |
364 | lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4); | 365 | lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4); |
366 | v = t3_read_reg(adap, A_XGM_RXFIFO_CFG + mac->offset); | ||
365 | v &= ~V_RXFIFOPAUSELWM(M_RXFIFOPAUSELWM); | 367 | v &= ~V_RXFIFOPAUSELWM(M_RXFIFOPAUSELWM); |
366 | v |= V_RXFIFOPAUSELWM(lwm / 8); | 368 | v |= V_RXFIFOPAUSELWM(lwm / 8); |
367 | if (G_RXFIFOPAUSEHWM(v)) | 369 | if (G_RXFIFOPAUSEHWM(v)) |