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path: root/drivers/net/cxgb3/t3_hw.c
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Diffstat (limited to 'drivers/net/cxgb3/t3_hw.c')
-rw-r--r--drivers/net/cxgb3/t3_hw.c78
1 files changed, 42 insertions, 36 deletions
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c
index 4f68aeb2679a..c8a865a7e26c 100644
--- a/drivers/net/cxgb3/t3_hw.c
+++ b/drivers/net/cxgb3/t3_hw.c
@@ -204,35 +204,33 @@ static void mi1_init(struct adapter *adap, const struct adapter_info *ai)
204/* 204/*
205 * MI1 read/write operations for clause 22 PHYs. 205 * MI1 read/write operations for clause 22 PHYs.
206 */ 206 */
207static int t3_mi1_read(struct adapter *adapter, int phy_addr, int mmd_addr, 207static int t3_mi1_read(struct net_device *dev, int phy_addr, int mmd_addr,
208 int reg_addr, unsigned int *valp) 208 u16 reg_addr)
209{ 209{
210 struct port_info *pi = netdev_priv(dev);
211 struct adapter *adapter = pi->adapter;
210 int ret; 212 int ret;
211 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr); 213 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
212 214
213 if (mmd_addr)
214 return -EINVAL;
215
216 mutex_lock(&adapter->mdio_lock); 215 mutex_lock(&adapter->mdio_lock);
217 t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1)); 216 t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1));
218 t3_write_reg(adapter, A_MI1_ADDR, addr); 217 t3_write_reg(adapter, A_MI1_ADDR, addr);
219 t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(2)); 218 t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(2));
220 ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10); 219 ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10);
221 if (!ret) 220 if (!ret)
222 *valp = t3_read_reg(adapter, A_MI1_DATA); 221 ret = t3_read_reg(adapter, A_MI1_DATA);
223 mutex_unlock(&adapter->mdio_lock); 222 mutex_unlock(&adapter->mdio_lock);
224 return ret; 223 return ret;
225} 224}
226 225
227static int t3_mi1_write(struct adapter *adapter, int phy_addr, int mmd_addr, 226static int t3_mi1_write(struct net_device *dev, int phy_addr, int mmd_addr,
228 int reg_addr, unsigned int val) 227 u16 reg_addr, u16 val)
229{ 228{
229 struct port_info *pi = netdev_priv(dev);
230 struct adapter *adapter = pi->adapter;
230 int ret; 231 int ret;
231 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr); 232 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
232 233
233 if (mmd_addr)
234 return -EINVAL;
235
236 mutex_lock(&adapter->mdio_lock); 234 mutex_lock(&adapter->mdio_lock);
237 t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1)); 235 t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1));
238 t3_write_reg(adapter, A_MI1_ADDR, addr); 236 t3_write_reg(adapter, A_MI1_ADDR, addr);
@@ -244,8 +242,9 @@ static int t3_mi1_write(struct adapter *adapter, int phy_addr, int mmd_addr,
244} 242}
245 243
246static const struct mdio_ops mi1_mdio_ops = { 244static const struct mdio_ops mi1_mdio_ops = {
247 t3_mi1_read, 245 .read = t3_mi1_read,
248 t3_mi1_write 246 .write = t3_mi1_write,
247 .mode_support = MDIO_SUPPORTS_C22
249}; 248};
250 249
251/* 250/*
@@ -268,9 +267,11 @@ static int mi1_wr_addr(struct adapter *adapter, int phy_addr, int mmd_addr,
268/* 267/*
269 * MI1 read/write operations for indirect-addressed PHYs. 268 * MI1 read/write operations for indirect-addressed PHYs.
270 */ 269 */
271static int mi1_ext_read(struct adapter *adapter, int phy_addr, int mmd_addr, 270static int mi1_ext_read(struct net_device *dev, int phy_addr, int mmd_addr,
272 int reg_addr, unsigned int *valp) 271 u16 reg_addr)
273{ 272{
273 struct port_info *pi = netdev_priv(dev);
274 struct adapter *adapter = pi->adapter;
274 int ret; 275 int ret;
275 276
276 mutex_lock(&adapter->mdio_lock); 277 mutex_lock(&adapter->mdio_lock);
@@ -280,15 +281,17 @@ static int mi1_ext_read(struct adapter *adapter, int phy_addr, int mmd_addr,
280 ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, 281 ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0,
281 MDIO_ATTEMPTS, 10); 282 MDIO_ATTEMPTS, 10);
282 if (!ret) 283 if (!ret)
283 *valp = t3_read_reg(adapter, A_MI1_DATA); 284 ret = t3_read_reg(adapter, A_MI1_DATA);
284 } 285 }
285 mutex_unlock(&adapter->mdio_lock); 286 mutex_unlock(&adapter->mdio_lock);
286 return ret; 287 return ret;
287} 288}
288 289
289static int mi1_ext_write(struct adapter *adapter, int phy_addr, int mmd_addr, 290static int mi1_ext_write(struct net_device *dev, int phy_addr, int mmd_addr,
290 int reg_addr, unsigned int val) 291 u16 reg_addr, u16 val)
291{ 292{
293 struct port_info *pi = netdev_priv(dev);
294 struct adapter *adapter = pi->adapter;
292 int ret; 295 int ret;
293 296
294 mutex_lock(&adapter->mdio_lock); 297 mutex_lock(&adapter->mdio_lock);
@@ -304,8 +307,9 @@ static int mi1_ext_write(struct adapter *adapter, int phy_addr, int mmd_addr,
304} 307}
305 308
306static const struct mdio_ops mi1_mdio_ext_ops = { 309static const struct mdio_ops mi1_mdio_ext_ops = {
307 mi1_ext_read, 310 .read = mi1_ext_read,
308 mi1_ext_write 311 .write = mi1_ext_write,
312 .mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22
309}; 313};
310 314
311/** 315/**
@@ -325,10 +329,10 @@ int t3_mdio_change_bits(struct cphy *phy, int mmd, int reg, unsigned int clear,
325 int ret; 329 int ret;
326 unsigned int val; 330 unsigned int val;
327 331
328 ret = mdio_read(phy, mmd, reg, &val); 332 ret = t3_mdio_read(phy, mmd, reg, &val);
329 if (!ret) { 333 if (!ret) {
330 val &= ~clear; 334 val &= ~clear;
331 ret = mdio_write(phy, mmd, reg, val | set); 335 ret = t3_mdio_write(phy, mmd, reg, val | set);
332 } 336 }
333 return ret; 337 return ret;
334} 338}
@@ -348,15 +352,16 @@ int t3_phy_reset(struct cphy *phy, int mmd, int wait)
348 int err; 352 int err;
349 unsigned int ctl; 353 unsigned int ctl;
350 354
351 err = t3_mdio_change_bits(phy, mmd, MII_BMCR, BMCR_PDOWN, BMCR_RESET); 355 err = t3_mdio_change_bits(phy, mmd, MDIO_CTRL1, MDIO_CTRL1_LPOWER,
356 MDIO_CTRL1_RESET);
352 if (err || !wait) 357 if (err || !wait)
353 return err; 358 return err;
354 359
355 do { 360 do {
356 err = mdio_read(phy, mmd, MII_BMCR, &ctl); 361 err = t3_mdio_read(phy, mmd, MDIO_CTRL1, &ctl);
357 if (err) 362 if (err)
358 return err; 363 return err;
359 ctl &= BMCR_RESET; 364 ctl &= MDIO_CTRL1_RESET;
360 if (ctl) 365 if (ctl)
361 msleep(1); 366 msleep(1);
362 } while (ctl && --wait); 367 } while (ctl && --wait);
@@ -377,7 +382,7 @@ int t3_phy_advertise(struct cphy *phy, unsigned int advert)
377 int err; 382 int err;
378 unsigned int val = 0; 383 unsigned int val = 0;
379 384
380 err = mdio_read(phy, 0, MII_CTRL1000, &val); 385 err = t3_mdio_read(phy, MDIO_DEVAD_NONE, MII_CTRL1000, &val);
381 if (err) 386 if (err)
382 return err; 387 return err;
383 388
@@ -387,7 +392,7 @@ int t3_phy_advertise(struct cphy *phy, unsigned int advert)
387 if (advert & ADVERTISED_1000baseT_Full) 392 if (advert & ADVERTISED_1000baseT_Full)
388 val |= ADVERTISE_1000FULL; 393 val |= ADVERTISE_1000FULL;
389 394
390 err = mdio_write(phy, 0, MII_CTRL1000, val); 395 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, MII_CTRL1000, val);
391 if (err) 396 if (err)
392 return err; 397 return err;
393 398
@@ -404,7 +409,7 @@ int t3_phy_advertise(struct cphy *phy, unsigned int advert)
404 val |= ADVERTISE_PAUSE_CAP; 409 val |= ADVERTISE_PAUSE_CAP;
405 if (advert & ADVERTISED_Asym_Pause) 410 if (advert & ADVERTISED_Asym_Pause)
406 val |= ADVERTISE_PAUSE_ASYM; 411 val |= ADVERTISE_PAUSE_ASYM;
407 return mdio_write(phy, 0, MII_ADVERTISE, val); 412 return t3_mdio_write(phy, MDIO_DEVAD_NONE, MII_ADVERTISE, val);
408} 413}
409 414
410/** 415/**
@@ -427,7 +432,7 @@ int t3_phy_advertise_fiber(struct cphy *phy, unsigned int advert)
427 val |= ADVERTISE_1000XPAUSE; 432 val |= ADVERTISE_1000XPAUSE;
428 if (advert & ADVERTISED_Asym_Pause) 433 if (advert & ADVERTISED_Asym_Pause)
429 val |= ADVERTISE_1000XPSE_ASYM; 434 val |= ADVERTISE_1000XPSE_ASYM;
430 return mdio_write(phy, 0, MII_ADVERTISE, val); 435 return t3_mdio_write(phy, MDIO_DEVAD_NONE, MII_ADVERTISE, val);
431} 436}
432 437
433/** 438/**
@@ -444,7 +449,7 @@ int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex)
444 int err; 449 int err;
445 unsigned int ctl; 450 unsigned int ctl;
446 451
447 err = mdio_read(phy, 0, MII_BMCR, &ctl); 452 err = t3_mdio_read(phy, MDIO_DEVAD_NONE, MII_BMCR, &ctl);
448 if (err) 453 if (err)
449 return err; 454 return err;
450 455
@@ -462,30 +467,30 @@ int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex)
462 } 467 }
463 if (ctl & BMCR_SPEED1000) /* auto-negotiation required for GigE */ 468 if (ctl & BMCR_SPEED1000) /* auto-negotiation required for GigE */
464 ctl |= BMCR_ANENABLE; 469 ctl |= BMCR_ANENABLE;
465 return mdio_write(phy, 0, MII_BMCR, ctl); 470 return t3_mdio_write(phy, MDIO_DEVAD_NONE, MII_BMCR, ctl);
466} 471}
467 472
468int t3_phy_lasi_intr_enable(struct cphy *phy) 473int t3_phy_lasi_intr_enable(struct cphy *phy)
469{ 474{
470 return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 1); 475 return t3_mdio_write(phy, MDIO_MMD_PMAPMD, LASI_CTRL, 1);
471} 476}
472 477
473int t3_phy_lasi_intr_disable(struct cphy *phy) 478int t3_phy_lasi_intr_disable(struct cphy *phy)
474{ 479{
475 return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 0); 480 return t3_mdio_write(phy, MDIO_MMD_PMAPMD, LASI_CTRL, 0);
476} 481}
477 482
478int t3_phy_lasi_intr_clear(struct cphy *phy) 483int t3_phy_lasi_intr_clear(struct cphy *phy)
479{ 484{
480 u32 val; 485 u32 val;
481 486
482 return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &val); 487 return t3_mdio_read(phy, MDIO_MMD_PMAPMD, LASI_STAT, &val);
483} 488}
484 489
485int t3_phy_lasi_intr_handler(struct cphy *phy) 490int t3_phy_lasi_intr_handler(struct cphy *phy)
486{ 491{
487 unsigned int status; 492 unsigned int status;
488 int err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &status); 493 int err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, LASI_STAT, &status);
489 494
490 if (err) 495 if (err)
491 return err; 496 return err;
@@ -3863,6 +3868,7 @@ int t3_prep_adapter(struct adapter *adapter, const struct adapter_info *ai,
3863 ai->mdio_ops); 3868 ai->mdio_ops);
3864 if (ret) 3869 if (ret)
3865 return ret; 3870 return ret;
3871 p->phy.mdio.dev = adapter->port[i];
3866 mac_prep(&p->mac, adapter, j); 3872 mac_prep(&p->mac, adapter, j);
3867 3873
3868 /* 3874 /*
@@ -3918,7 +3924,7 @@ int t3_replay_prep_adapter(struct adapter *adapter)
3918 ; 3924 ;
3919 3925
3920 pti = &port_types[adapter->params.vpd.port_type[j]]; 3926 pti = &port_types[adapter->params.vpd.port_type[j]];
3921 ret = pti->phy_prep(&p->phy, adapter, p->phy.addr, NULL); 3927 ret = pti->phy_prep(&p->phy, adapter, p->phy.mdio.prtad, NULL);
3922 if (ret) 3928 if (ret)
3923 return ret; 3929 return ret;
3924 p->phy.ops->power_down(&p->phy, 1); 3930 p->phy.ops->power_down(&p->phy, 1);