diff options
Diffstat (limited to 'drivers/net/cxgb3/cxgb3_ioctl.h')
-rw-r--r-- | drivers/net/cxgb3/cxgb3_ioctl.h | 185 |
1 files changed, 185 insertions, 0 deletions
diff --git a/drivers/net/cxgb3/cxgb3_ioctl.h b/drivers/net/cxgb3/cxgb3_ioctl.h new file mode 100644 index 000000000000..a94281861a66 --- /dev/null +++ b/drivers/net/cxgb3/cxgb3_ioctl.h | |||
@@ -0,0 +1,185 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved. | ||
3 | * | ||
4 | * This software is available to you under a choice of one of two | ||
5 | * licenses. You may choose to be licensed under the terms of the GNU | ||
6 | * General Public License (GPL) Version 2, available from the file | ||
7 | * COPYING in the main directory of this source tree, or the | ||
8 | * OpenIB.org BSD license below: | ||
9 | * | ||
10 | * Redistribution and use in source and binary forms, with or | ||
11 | * without modification, are permitted provided that the following | ||
12 | * conditions are met: | ||
13 | * | ||
14 | * - Redistributions of source code must retain the above | ||
15 | * copyright notice, this list of conditions and the following | ||
16 | * disclaimer. | ||
17 | * | ||
18 | * - Redistributions in binary form must reproduce the above | ||
19 | * copyright notice, this list of conditions and the following | ||
20 | * disclaimer in the documentation and/or other materials | ||
21 | * provided with the distribution. | ||
22 | * | ||
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
30 | * SOFTWARE. | ||
31 | */ | ||
32 | #ifndef __CHIOCTL_H__ | ||
33 | #define __CHIOCTL_H__ | ||
34 | |||
35 | /* | ||
36 | * Ioctl commands specific to this driver. | ||
37 | */ | ||
38 | enum { | ||
39 | CHELSIO_SETREG = 1024, | ||
40 | CHELSIO_GETREG, | ||
41 | CHELSIO_SETTPI, | ||
42 | CHELSIO_GETTPI, | ||
43 | CHELSIO_GETMTUTAB, | ||
44 | CHELSIO_SETMTUTAB, | ||
45 | CHELSIO_GETMTU, | ||
46 | CHELSIO_SET_PM, | ||
47 | CHELSIO_GET_PM, | ||
48 | CHELSIO_GET_TCAM, | ||
49 | CHELSIO_SET_TCAM, | ||
50 | CHELSIO_GET_TCB, | ||
51 | CHELSIO_GET_MEM, | ||
52 | CHELSIO_LOAD_FW, | ||
53 | CHELSIO_GET_PROTO, | ||
54 | CHELSIO_SET_PROTO, | ||
55 | CHELSIO_SET_TRACE_FILTER, | ||
56 | CHELSIO_SET_QSET_PARAMS, | ||
57 | CHELSIO_GET_QSET_PARAMS, | ||
58 | CHELSIO_SET_QSET_NUM, | ||
59 | CHELSIO_GET_QSET_NUM, | ||
60 | CHELSIO_SET_PKTSCHED, | ||
61 | }; | ||
62 | |||
63 | struct ch_reg { | ||
64 | uint32_t cmd; | ||
65 | uint32_t addr; | ||
66 | uint32_t val; | ||
67 | }; | ||
68 | |||
69 | struct ch_cntxt { | ||
70 | uint32_t cmd; | ||
71 | uint32_t cntxt_type; | ||
72 | uint32_t cntxt_id; | ||
73 | uint32_t data[4]; | ||
74 | }; | ||
75 | |||
76 | /* context types */ | ||
77 | enum { CNTXT_TYPE_EGRESS, CNTXT_TYPE_FL, CNTXT_TYPE_RSP, CNTXT_TYPE_CQ }; | ||
78 | |||
79 | struct ch_desc { | ||
80 | uint32_t cmd; | ||
81 | uint32_t queue_num; | ||
82 | uint32_t idx; | ||
83 | uint32_t size; | ||
84 | uint8_t data[128]; | ||
85 | }; | ||
86 | |||
87 | struct ch_mem_range { | ||
88 | uint32_t cmd; | ||
89 | uint32_t mem_id; | ||
90 | uint32_t addr; | ||
91 | uint32_t len; | ||
92 | uint32_t version; | ||
93 | uint8_t buf[0]; | ||
94 | }; | ||
95 | |||
96 | struct ch_qset_params { | ||
97 | uint32_t cmd; | ||
98 | uint32_t qset_idx; | ||
99 | int32_t txq_size[3]; | ||
100 | int32_t rspq_size; | ||
101 | int32_t fl_size[2]; | ||
102 | int32_t intr_lat; | ||
103 | int32_t polling; | ||
104 | int32_t cong_thres; | ||
105 | }; | ||
106 | |||
107 | struct ch_pktsched_params { | ||
108 | uint32_t cmd; | ||
109 | uint8_t sched; | ||
110 | uint8_t idx; | ||
111 | uint8_t min; | ||
112 | uint8_t max; | ||
113 | uint8_t binding; | ||
114 | }; | ||
115 | |||
116 | #ifndef TCB_SIZE | ||
117 | # define TCB_SIZE 128 | ||
118 | #endif | ||
119 | |||
120 | /* TCB size in 32-bit words */ | ||
121 | #define TCB_WORDS (TCB_SIZE / 4) | ||
122 | |||
123 | enum { MEM_CM, MEM_PMRX, MEM_PMTX }; /* ch_mem_range.mem_id values */ | ||
124 | |||
125 | struct ch_mtus { | ||
126 | uint32_t cmd; | ||
127 | uint32_t nmtus; | ||
128 | uint16_t mtus[NMTUS]; | ||
129 | }; | ||
130 | |||
131 | struct ch_pm { | ||
132 | uint32_t cmd; | ||
133 | uint32_t tx_pg_sz; | ||
134 | uint32_t tx_num_pg; | ||
135 | uint32_t rx_pg_sz; | ||
136 | uint32_t rx_num_pg; | ||
137 | uint32_t pm_total; | ||
138 | }; | ||
139 | |||
140 | struct ch_tcam { | ||
141 | uint32_t cmd; | ||
142 | uint32_t tcam_size; | ||
143 | uint32_t nservers; | ||
144 | uint32_t nroutes; | ||
145 | uint32_t nfilters; | ||
146 | }; | ||
147 | |||
148 | struct ch_tcb { | ||
149 | uint32_t cmd; | ||
150 | uint32_t tcb_index; | ||
151 | uint32_t tcb_data[TCB_WORDS]; | ||
152 | }; | ||
153 | |||
154 | struct ch_tcam_word { | ||
155 | uint32_t cmd; | ||
156 | uint32_t addr; | ||
157 | uint32_t buf[3]; | ||
158 | }; | ||
159 | |||
160 | struct ch_trace { | ||
161 | uint32_t cmd; | ||
162 | uint32_t sip; | ||
163 | uint32_t sip_mask; | ||
164 | uint32_t dip; | ||
165 | uint32_t dip_mask; | ||
166 | uint16_t sport; | ||
167 | uint16_t sport_mask; | ||
168 | uint16_t dport; | ||
169 | uint16_t dport_mask; | ||
170 | uint32_t vlan:12; | ||
171 | uint32_t vlan_mask:12; | ||
172 | uint32_t intf:4; | ||
173 | uint32_t intf_mask:4; | ||
174 | uint8_t proto; | ||
175 | uint8_t proto_mask; | ||
176 | uint8_t invert_match:1; | ||
177 | uint8_t config_tx:1; | ||
178 | uint8_t config_rx:1; | ||
179 | uint8_t trace_tx:1; | ||
180 | uint8_t trace_rx:1; | ||
181 | }; | ||
182 | |||
183 | #define SIOCCHIOCTL SIOCDEVPRIVATE | ||
184 | |||
185 | #endif | ||