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-rw-r--r--drivers/net/chelsio/common.h2
-rw-r--r--drivers/net/chelsio/cpl5_cmd.h18
-rw-r--r--drivers/net/chelsio/cxgb2.c64
-rw-r--r--drivers/net/chelsio/elmer0.h40
-rw-r--r--drivers/net/chelsio/espi.c41
-rw-r--r--drivers/net/chelsio/fpga_defs.h6
-rw-r--r--drivers/net/chelsio/gmac.h11
-rw-r--r--drivers/net/chelsio/ixf1010.c4
-rw-r--r--drivers/net/chelsio/mv88e1xxx.c17
-rw-r--r--drivers/net/chelsio/pm3393.c8
-rw-r--r--drivers/net/chelsio/sge.c125
-rw-r--r--drivers/net/chelsio/subr.c83
-rw-r--r--drivers/net/chelsio/tp.c62
-rw-r--r--drivers/net/chelsio/vsc7326.c57
-rw-r--r--drivers/net/chelsio/vsc8244.c38
15 files changed, 288 insertions, 288 deletions
diff --git a/drivers/net/chelsio/common.h b/drivers/net/chelsio/common.h
index 74758d2c7af8..787f2f2820fe 100644
--- a/drivers/net/chelsio/common.h
+++ b/drivers/net/chelsio/common.h
@@ -324,7 +324,7 @@ struct board_info {
324 unsigned char mdio_phybaseaddr; 324 unsigned char mdio_phybaseaddr;
325 struct gmac *gmac; 325 struct gmac *gmac;
326 struct gphy *gphy; 326 struct gphy *gphy;
327 struct mdio_ops *mdio_ops; 327 struct mdio_ops *mdio_ops;
328 const char *desc; 328 const char *desc;
329}; 329};
330 330
diff --git a/drivers/net/chelsio/cpl5_cmd.h b/drivers/net/chelsio/cpl5_cmd.h
index 35f565be4fd3..e36d45b78cc7 100644
--- a/drivers/net/chelsio/cpl5_cmd.h
+++ b/drivers/net/chelsio/cpl5_cmd.h
@@ -103,7 +103,7 @@ enum CPL_opcode {
103 CPL_MIGRATE_C2T_RPL = 0xDD, 103 CPL_MIGRATE_C2T_RPL = 0xDD,
104 CPL_ERROR = 0xD7, 104 CPL_ERROR = 0xD7,
105 105
106 /* internal: driver -> TOM */ 106 /* internal: driver -> TOM */
107 CPL_MSS_CHANGE = 0xE1 107 CPL_MSS_CHANGE = 0xE1
108}; 108};
109 109
@@ -159,8 +159,8 @@ enum { // TX_PKT_LSO ethernet types
159}; 159};
160 160
161union opcode_tid { 161union opcode_tid {
162 u32 opcode_tid; 162 u32 opcode_tid;
163 u8 opcode; 163 u8 opcode;
164}; 164};
165 165
166#define S_OPCODE 24 166#define S_OPCODE 24
@@ -234,7 +234,7 @@ struct cpl_pass_accept_req {
234 u32 local_ip; 234 u32 local_ip;
235 u32 peer_ip; 235 u32 peer_ip;
236 u32 tos_tid; 236 u32 tos_tid;
237 struct tcp_options tcp_options; 237 struct tcp_options tcp_options;
238 u8 dst_mac[6]; 238 u8 dst_mac[6];
239 u16 vlan_tag; 239 u16 vlan_tag;
240 u8 src_mac[6]; 240 u8 src_mac[6];
@@ -250,12 +250,12 @@ struct cpl_pass_accept_rpl {
250 u32 peer_ip; 250 u32 peer_ip;
251 u32 opt0h; 251 u32 opt0h;
252 union { 252 union {
253 u32 opt0l; 253 u32 opt0l;
254 struct { 254 struct {
255 u8 rsvd[3]; 255 u8 rsvd[3];
256 u8 status; 256 u8 status;
257 };
257 }; 258 };
258 };
259}; 259};
260 260
261struct cpl_act_open_req { 261struct cpl_act_open_req {
diff --git a/drivers/net/chelsio/cxgb2.c b/drivers/net/chelsio/cxgb2.c
index fd5d821f3f2a..bb11b111335b 100644
--- a/drivers/net/chelsio/cxgb2.c
+++ b/drivers/net/chelsio/cxgb2.c
@@ -69,14 +69,14 @@ static inline void cancel_mac_stats_update(struct adapter *ap)
69 cancel_delayed_work(&ap->stats_update_task); 69 cancel_delayed_work(&ap->stats_update_task);
70} 70}
71 71
72#define MAX_CMDQ_ENTRIES 16384 72#define MAX_CMDQ_ENTRIES 16384
73#define MAX_CMDQ1_ENTRIES 1024 73#define MAX_CMDQ1_ENTRIES 1024
74#define MAX_RX_BUFFERS 16384 74#define MAX_RX_BUFFERS 16384
75#define MAX_RX_JUMBO_BUFFERS 16384 75#define MAX_RX_JUMBO_BUFFERS 16384
76#define MAX_TX_BUFFERS_HIGH 16384U 76#define MAX_TX_BUFFERS_HIGH 16384U
77#define MAX_TX_BUFFERS_LOW 1536U 77#define MAX_TX_BUFFERS_LOW 1536U
78#define MAX_TX_BUFFERS 1460U 78#define MAX_TX_BUFFERS 1460U
79#define MIN_FL_ENTRIES 32 79#define MIN_FL_ENTRIES 32
80 80
81#define DFLT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \ 81#define DFLT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
82 NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\ 82 NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\
@@ -143,7 +143,7 @@ static void link_report(struct port_info *p)
143 case SPEED_100: s = "100Mbps"; break; 143 case SPEED_100: s = "100Mbps"; break;
144 } 144 }
145 145
146 printk(KERN_INFO "%s: link up, %s, %s-duplex\n", 146 printk(KERN_INFO "%s: link up, %s, %s-duplex\n",
147 p->dev->name, s, 147 p->dev->name, s,
148 p->link_config.duplex == DUPLEX_FULL ? "full" : "half"); 148 p->link_config.duplex == DUPLEX_FULL ? "full" : "half");
149 } 149 }
@@ -233,7 +233,7 @@ static int cxgb_up(struct adapter *adapter)
233 233
234 t1_sge_start(adapter->sge); 234 t1_sge_start(adapter->sge);
235 t1_interrupts_enable(adapter); 235 t1_interrupts_enable(adapter);
236 out_err: 236out_err:
237 return err; 237 return err;
238} 238}
239 239
@@ -749,7 +749,7 @@ static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
749 return -EINVAL; 749 return -EINVAL;
750 750
751 if (adapter->flags & FULL_INIT_DONE) 751 if (adapter->flags & FULL_INIT_DONE)
752 return -EBUSY; 752 return -EBUSY;
753 753
754 adapter->params.sge.freelQ_size[!jumbo_fl] = e->rx_pending; 754 adapter->params.sge.freelQ_size[!jumbo_fl] = e->rx_pending;
755 adapter->params.sge.freelQ_size[jumbo_fl] = e->rx_jumbo_pending; 755 adapter->params.sge.freelQ_size[jumbo_fl] = e->rx_jumbo_pending;
@@ -764,7 +764,7 @@ static int set_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
764 struct adapter *adapter = dev->priv; 764 struct adapter *adapter = dev->priv;
765 765
766 adapter->params.sge.rx_coalesce_usecs = c->rx_coalesce_usecs; 766 adapter->params.sge.rx_coalesce_usecs = c->rx_coalesce_usecs;
767 adapter->params.sge.coalesce_enable = c->use_adaptive_rx_coalesce; 767 adapter->params.sge.coalesce_enable = c->use_adaptive_rx_coalesce;
768 adapter->params.sge.sample_interval_usecs = c->rate_sample_interval; 768 adapter->params.sge.sample_interval_usecs = c->rate_sample_interval;
769 t1_sge_set_coalesce_params(adapter->sge, &adapter->params.sge); 769 t1_sge_set_coalesce_params(adapter->sge, &adapter->params.sge);
770 return 0; 770 return 0;
@@ -782,9 +782,9 @@ static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
782 782
783static int get_eeprom_len(struct net_device *dev) 783static int get_eeprom_len(struct net_device *dev)
784{ 784{
785 struct adapter *adapter = dev->priv; 785 struct adapter *adapter = dev->priv;
786 786
787 return t1_is_asic(adapter) ? EEPROM_SIZE : 0; 787 return t1_is_asic(adapter) ? EEPROM_SIZE : 0;
788} 788}
789 789
790#define EEPROM_MAGIC(ap) \ 790#define EEPROM_MAGIC(ap) \
@@ -848,7 +848,7 @@ static int t1_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
848 u32 val; 848 u32 val;
849 849
850 if (!phy->mdio_read) 850 if (!phy->mdio_read)
851 return -EOPNOTSUPP; 851 return -EOPNOTSUPP;
852 phy->mdio_read(adapter, data->phy_id, 0, data->reg_num & 0x1f, 852 phy->mdio_read(adapter, data->phy_id, 0, data->reg_num & 0x1f,
853 &val); 853 &val);
854 data->val_out = val; 854 data->val_out = val;
@@ -860,7 +860,7 @@ static int t1_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
860 if (!capable(CAP_NET_ADMIN)) 860 if (!capable(CAP_NET_ADMIN))
861 return -EPERM; 861 return -EPERM;
862 if (!phy->mdio_write) 862 if (!phy->mdio_write)
863 return -EOPNOTSUPP; 863 return -EOPNOTSUPP;
864 phy->mdio_write(adapter, data->phy_id, 0, data->reg_num & 0x1f, 864 phy->mdio_write(adapter, data->phy_id, 0, data->reg_num & 0x1f,
865 data->val_in); 865 data->val_in);
866 break; 866 break;
@@ -879,9 +879,9 @@ static int t1_change_mtu(struct net_device *dev, int new_mtu)
879 struct cmac *mac = adapter->port[dev->if_port].mac; 879 struct cmac *mac = adapter->port[dev->if_port].mac;
880 880
881 if (!mac->ops->set_mtu) 881 if (!mac->ops->set_mtu)
882 return -EOPNOTSUPP; 882 return -EOPNOTSUPP;
883 if (new_mtu < 68) 883 if (new_mtu < 68)
884 return -EINVAL; 884 return -EINVAL;
885 if ((ret = mac->ops->set_mtu(mac, new_mtu))) 885 if ((ret = mac->ops->set_mtu(mac, new_mtu)))
886 return ret; 886 return ret;
887 dev->mtu = new_mtu; 887 dev->mtu = new_mtu;
@@ -1211,9 +1211,9 @@ static int __devinit init_one(struct pci_dev *pdev,
1211 1211
1212 return 0; 1212 return 0;
1213 1213
1214 out_release_adapter_res: 1214out_release_adapter_res:
1215 t1_free_sw_modules(adapter); 1215 t1_free_sw_modules(adapter);
1216 out_free_dev: 1216out_free_dev:
1217 if (adapter) { 1217 if (adapter) {
1218 if (adapter->regs) 1218 if (adapter->regs)
1219 iounmap(adapter->regs); 1219 iounmap(adapter->regs);
@@ -1222,7 +1222,7 @@ static int __devinit init_one(struct pci_dev *pdev,
1222 free_netdev(adapter->port[i].dev); 1222 free_netdev(adapter->port[i].dev);
1223 } 1223 }
1224 pci_release_regions(pdev); 1224 pci_release_regions(pdev);
1225 out_disable_pdev: 1225out_disable_pdev:
1226 pci_disable_device(pdev); 1226 pci_disable_device(pdev);
1227 pci_set_drvdata(pdev, NULL); 1227 pci_set_drvdata(pdev, NULL);
1228 return err; 1228 return err;
@@ -1273,20 +1273,20 @@ static int t1_clock(struct adapter *adapter, int mode)
1273 int M_MEM_VAL; 1273 int M_MEM_VAL;
1274 1274
1275 enum { 1275 enum {
1276 M_CORE_BITS = 9, 1276 M_CORE_BITS = 9,
1277 T_CORE_VAL = 0, 1277 T_CORE_VAL = 0,
1278 T_CORE_BITS = 2, 1278 T_CORE_BITS = 2,
1279 N_CORE_VAL = 0, 1279 N_CORE_VAL = 0,
1280 N_CORE_BITS = 2, 1280 N_CORE_BITS = 2,
1281 M_MEM_BITS = 9, 1281 M_MEM_BITS = 9,
1282 T_MEM_VAL = 0, 1282 T_MEM_VAL = 0,
1283 T_MEM_BITS = 2, 1283 T_MEM_BITS = 2,
1284 N_MEM_VAL = 0, 1284 N_MEM_VAL = 0,
1285 N_MEM_BITS = 2, 1285 N_MEM_BITS = 2,
1286 NP_LOAD = 1 << 17, 1286 NP_LOAD = 1 << 17,
1287 S_LOAD_MEM = 1 << 5, 1287 S_LOAD_MEM = 1 << 5,
1288 S_LOAD_CORE = 1 << 6, 1288 S_LOAD_CORE = 1 << 6,
1289 S_CLOCK = 1 << 3 1289 S_CLOCK = 1 << 3
1290 }; 1290 };
1291 1291
1292 if (!t1_is_T1B(adapter)) 1292 if (!t1_is_T1B(adapter))
diff --git a/drivers/net/chelsio/elmer0.h b/drivers/net/chelsio/elmer0.h
index 9ebecaa97d31..eef655c827d9 100644
--- a/drivers/net/chelsio/elmer0.h
+++ b/drivers/net/chelsio/elmer0.h
@@ -46,14 +46,14 @@ enum {
46}; 46};
47 47
48/* ELMER0 registers */ 48/* ELMER0 registers */
49#define A_ELMER0_VERSION 0x100000 49#define A_ELMER0_VERSION 0x100000
50#define A_ELMER0_PHY_CFG 0x100004 50#define A_ELMER0_PHY_CFG 0x100004
51#define A_ELMER0_INT_ENABLE 0x100008 51#define A_ELMER0_INT_ENABLE 0x100008
52#define A_ELMER0_INT_CAUSE 0x10000c 52#define A_ELMER0_INT_CAUSE 0x10000c
53#define A_ELMER0_GPI_CFG 0x100010 53#define A_ELMER0_GPI_CFG 0x100010
54#define A_ELMER0_GPI_STAT 0x100014 54#define A_ELMER0_GPI_STAT 0x100014
55#define A_ELMER0_GPO 0x100018 55#define A_ELMER0_GPO 0x100018
56#define A_ELMER0_PORT0_MI1_CFG 0x400000 56#define A_ELMER0_PORT0_MI1_CFG 0x400000
57 57
58#define S_MI1_MDI_ENABLE 0 58#define S_MI1_MDI_ENABLE 0
59#define V_MI1_MDI_ENABLE(x) ((x) << S_MI1_MDI_ENABLE) 59#define V_MI1_MDI_ENABLE(x) ((x) << S_MI1_MDI_ENABLE)
@@ -111,18 +111,18 @@ enum {
111#define V_MI1_OP_BUSY(x) ((x) << S_MI1_OP_BUSY) 111#define V_MI1_OP_BUSY(x) ((x) << S_MI1_OP_BUSY)
112#define F_MI1_OP_BUSY V_MI1_OP_BUSY(1U) 112#define F_MI1_OP_BUSY V_MI1_OP_BUSY(1U)
113 113
114#define A_ELMER0_PORT1_MI1_CFG 0x500000 114#define A_ELMER0_PORT1_MI1_CFG 0x500000
115#define A_ELMER0_PORT1_MI1_ADDR 0x500004 115#define A_ELMER0_PORT1_MI1_ADDR 0x500004
116#define A_ELMER0_PORT1_MI1_DATA 0x500008 116#define A_ELMER0_PORT1_MI1_DATA 0x500008
117#define A_ELMER0_PORT1_MI1_OP 0x50000c 117#define A_ELMER0_PORT1_MI1_OP 0x50000c
118#define A_ELMER0_PORT2_MI1_CFG 0x600000 118#define A_ELMER0_PORT2_MI1_CFG 0x600000
119#define A_ELMER0_PORT2_MI1_ADDR 0x600004 119#define A_ELMER0_PORT2_MI1_ADDR 0x600004
120#define A_ELMER0_PORT2_MI1_DATA 0x600008 120#define A_ELMER0_PORT2_MI1_DATA 0x600008
121#define A_ELMER0_PORT2_MI1_OP 0x60000c 121#define A_ELMER0_PORT2_MI1_OP 0x60000c
122#define A_ELMER0_PORT3_MI1_CFG 0x700000 122#define A_ELMER0_PORT3_MI1_CFG 0x700000
123#define A_ELMER0_PORT3_MI1_ADDR 0x700004 123#define A_ELMER0_PORT3_MI1_ADDR 0x700004
124#define A_ELMER0_PORT3_MI1_DATA 0x700008 124#define A_ELMER0_PORT3_MI1_DATA 0x700008
125#define A_ELMER0_PORT3_MI1_OP 0x70000c 125#define A_ELMER0_PORT3_MI1_OP 0x70000c
126 126
127/* Simple bit definition for GPI and GP0 registers. */ 127/* Simple bit definition for GPI and GP0 registers. */
128#define ELMER0_GP_BIT0 0x0001 128#define ELMER0_GP_BIT0 0x0001
diff --git a/drivers/net/chelsio/espi.c b/drivers/net/chelsio/espi.c
index 44d2603bb010..d7c5406a6c3f 100644
--- a/drivers/net/chelsio/espi.c
+++ b/drivers/net/chelsio/espi.c
@@ -202,9 +202,9 @@ static void espi_setup_for_pm3393(adapter_t *adapter)
202 202
203static void espi_setup_for_vsc7321(adapter_t *adapter) 203static void espi_setup_for_vsc7321(adapter_t *adapter)
204{ 204{
205 writel(0x1f4, adapter->regs + A_ESPI_SCH_TOKEN0); 205 writel(0x1f4, adapter->regs + A_ESPI_SCH_TOKEN0);
206 writel(0x1f401f4, adapter->regs + A_ESPI_SCH_TOKEN1); 206 writel(0x1f401f4, adapter->regs + A_ESPI_SCH_TOKEN1);
207 writel(0x1f4, adapter->regs + A_ESPI_SCH_TOKEN2); 207 writel(0x1f4, adapter->regs + A_ESPI_SCH_TOKEN2);
208 writel(0xa00, adapter->regs + A_ESPI_RX_FIFO_ALMOST_FULL_WATERMARK); 208 writel(0xa00, adapter->regs + A_ESPI_RX_FIFO_ALMOST_FULL_WATERMARK);
209 writel(0x1ff, adapter->regs + A_ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK); 209 writel(0x1ff, adapter->regs + A_ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK);
210 writel(1, adapter->regs + A_ESPI_CALENDAR_LENGTH); 210 writel(1, adapter->regs + A_ESPI_CALENDAR_LENGTH);
@@ -247,10 +247,10 @@ int t1_espi_init(struct peespi *espi, int mac_type, int nports)
247 writel(V_OUT_OF_SYNC_COUNT(4) | 247 writel(V_OUT_OF_SYNC_COUNT(4) |
248 V_DIP2_PARITY_ERR_THRES(3) | 248 V_DIP2_PARITY_ERR_THRES(3) |
249 V_DIP4_THRES(1), adapter->regs + A_ESPI_MISC_CONTROL); 249 V_DIP4_THRES(1), adapter->regs + A_ESPI_MISC_CONTROL);
250 writel(nports == 4 ? 0x200040 : 0x1000080, 250 writel(nports == 4 ? 0x200040 : 0x1000080,
251 adapter->regs + A_ESPI_MAXBURST1_MAXBURST2); 251 adapter->regs + A_ESPI_MAXBURST1_MAXBURST2);
252 } else 252 } else
253 writel(0x800100, adapter->regs + A_ESPI_MAXBURST1_MAXBURST2); 253 writel(0x800100, adapter->regs + A_ESPI_MAXBURST1_MAXBURST2);
254 254
255 if (mac_type == CHBT_MAC_PM3393) 255 if (mac_type == CHBT_MAC_PM3393)
256 espi_setup_for_pm3393(adapter); 256 espi_setup_for_pm3393(adapter);
@@ -341,32 +341,31 @@ u32 t1_espi_get_mon(adapter_t *adapter, u32 addr, u8 wait)
341 * compare with t1_espi_get_mon(), it reads espiInTxSop[0 ~ 3] in 341 * compare with t1_espi_get_mon(), it reads espiInTxSop[0 ~ 3] in
342 * one shot, since there is no per port counter on the out side. 342 * one shot, since there is no per port counter on the out side.
343 */ 343 */
344int 344int t1_espi_get_mon_t204(adapter_t *adapter, u32 *valp, u8 wait)
345t1_espi_get_mon_t204(adapter_t *adapter, u32 *valp, u8 wait)
346{ 345{
347 struct peespi *espi = adapter->espi; 346 struct peespi *espi = adapter->espi;
348 u8 i, nport = (u8)adapter->params.nports; 347 u8 i, nport = (u8)adapter->params.nports;
349 348
350 if (!wait) { 349 if (!wait) {
351 if (!spin_trylock(&espi->lock)) 350 if (!spin_trylock(&espi->lock))
352 return -1; 351 return -1;
353 } else 352 } else
354 spin_lock(&espi->lock); 353 spin_lock(&espi->lock);
355 354
356 if ( (espi->misc_ctrl & MON_MASK) != F_MONITORED_DIRECTION ) { 355 if ((espi->misc_ctrl & MON_MASK) != F_MONITORED_DIRECTION) {
357 espi->misc_ctrl = (espi->misc_ctrl & ~MON_MASK) | 356 espi->misc_ctrl = (espi->misc_ctrl & ~MON_MASK) |
358 F_MONITORED_DIRECTION; 357 F_MONITORED_DIRECTION;
359 writel(espi->misc_ctrl, adapter->regs + A_ESPI_MISC_CONTROL); 358 writel(espi->misc_ctrl, adapter->regs + A_ESPI_MISC_CONTROL);
360 } 359 }
361 for (i = 0 ; i < nport; i++, valp++) { 360 for (i = 0 ; i < nport; i++, valp++) {
362 if (i) { 361 if (i) {
363 writel(espi->misc_ctrl | V_MONITORED_PORT_NUM(i), 362 writel(espi->misc_ctrl | V_MONITORED_PORT_NUM(i),
364 adapter->regs + A_ESPI_MISC_CONTROL); 363 adapter->regs + A_ESPI_MISC_CONTROL);
365 } 364 }
366 *valp = readl(adapter->regs + A_ESPI_SCH_TOKEN3); 365 *valp = readl(adapter->regs + A_ESPI_SCH_TOKEN3);
367 } 366 }
368 367
369 writel(espi->misc_ctrl, adapter->regs + A_ESPI_MISC_CONTROL); 368 writel(espi->misc_ctrl, adapter->regs + A_ESPI_MISC_CONTROL);
370 spin_unlock(&espi->lock); 369 spin_unlock(&espi->lock);
371 return 0; 370 return 0;
372} 371}
diff --git a/drivers/net/chelsio/fpga_defs.h b/drivers/net/chelsio/fpga_defs.h
index 17a3c2ba36a3..ccdb2bc9ae98 100644
--- a/drivers/net/chelsio/fpga_defs.h
+++ b/drivers/net/chelsio/fpga_defs.h
@@ -98,9 +98,9 @@
98#define A_MI0_DATA_INT 0xb10 98#define A_MI0_DATA_INT 0xb10
99 99
100/* GMAC registers */ 100/* GMAC registers */
101#define A_GMAC_MACID_LO 0x28 101#define A_GMAC_MACID_LO 0x28
102#define A_GMAC_MACID_HI 0x2c 102#define A_GMAC_MACID_HI 0x2c
103#define A_GMAC_CSR 0x30 103#define A_GMAC_CSR 0x30
104 104
105#define S_INTERFACE 0 105#define S_INTERFACE 0
106#define M_INTERFACE 0x3 106#define M_INTERFACE 0x3
diff --git a/drivers/net/chelsio/gmac.h b/drivers/net/chelsio/gmac.h
index a2b8ad9b5535..006a2eb2d362 100644
--- a/drivers/net/chelsio/gmac.h
+++ b/drivers/net/chelsio/gmac.h
@@ -42,8 +42,15 @@
42 42
43#include "common.h" 43#include "common.h"
44 44
45enum { MAC_STATS_UPDATE_FAST, MAC_STATS_UPDATE_FULL }; 45enum {
46enum { MAC_DIRECTION_RX = 1, MAC_DIRECTION_TX = 2 }; 46 MAC_STATS_UPDATE_FAST,
47 MAC_STATS_UPDATE_FULL
48};
49
50enum {
51 MAC_DIRECTION_RX = 1,
52 MAC_DIRECTION_TX = 2
53};
47 54
48struct cmac_statistics { 55struct cmac_statistics {
49 /* Transmit */ 56 /* Transmit */
diff --git a/drivers/net/chelsio/ixf1010.c b/drivers/net/chelsio/ixf1010.c
index 91a5bf711b8f..c40a88d18cc4 100644
--- a/drivers/net/chelsio/ixf1010.c
+++ b/drivers/net/chelsio/ixf1010.c
@@ -358,8 +358,8 @@ static void enable_port(struct cmac *mac)
358 val |= (1 << index); 358 val |= (1 << index);
359 t1_tpi_write(adapter, REG_PORT_ENABLE, val); 359 t1_tpi_write(adapter, REG_PORT_ENABLE, val);
360 360
361 index <<= 2; 361 index <<= 2;
362 if (is_T2(adapter)) { 362 if (is_T2(adapter)) {
363 /* T204: set the Fifo water level & threshold */ 363 /* T204: set the Fifo water level & threshold */
364 t1_tpi_write(adapter, RX_FIFO_HIGH_WATERMARK_BASE + index, 0x740); 364 t1_tpi_write(adapter, RX_FIFO_HIGH_WATERMARK_BASE + index, 0x740);
365 t1_tpi_write(adapter, RX_FIFO_LOW_WATERMARK_BASE + index, 0x730); 365 t1_tpi_write(adapter, RX_FIFO_LOW_WATERMARK_BASE + index, 0x730);
diff --git a/drivers/net/chelsio/mv88e1xxx.c b/drivers/net/chelsio/mv88e1xxx.c
index 75fac85a55b5..c7c5854715be 100644
--- a/drivers/net/chelsio/mv88e1xxx.c
+++ b/drivers/net/chelsio/mv88e1xxx.c
@@ -73,9 +73,8 @@ static int mv88e1xxx_interrupt_enable(struct cphy *cphy)
73 73
74 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer); 74 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer);
75 elmer |= ELMER0_GP_BIT1; 75 elmer |= ELMER0_GP_BIT1;
76 if (is_T2(cphy->adapter)) { 76 if (is_T2(cphy->adapter))
77 elmer |= ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4; 77 elmer |= ELMER0_GP_BIT2 | ELMER0_GP_BIT3 | ELMER0_GP_BIT4;
78 }
79 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer); 78 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer);
80 } 79 }
81 return 0; 80 return 0;
@@ -92,9 +91,8 @@ static int mv88e1xxx_interrupt_disable(struct cphy *cphy)
92 91
93 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer); 92 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer);
94 elmer &= ~ELMER0_GP_BIT1; 93 elmer &= ~ELMER0_GP_BIT1;
95 if (is_T2(cphy->adapter)) { 94 if (is_T2(cphy->adapter))
96 elmer &= ~(ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4); 95 elmer &= ~(ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4);
97 }
98 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer); 96 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer);
99 } 97 }
100 return 0; 98 return 0;
@@ -112,9 +110,8 @@ static int mv88e1xxx_interrupt_clear(struct cphy *cphy)
112 if (t1_is_asic(cphy->adapter)) { 110 if (t1_is_asic(cphy->adapter)) {
113 t1_tpi_read(cphy->adapter, A_ELMER0_INT_CAUSE, &elmer); 111 t1_tpi_read(cphy->adapter, A_ELMER0_INT_CAUSE, &elmer);
114 elmer |= ELMER0_GP_BIT1; 112 elmer |= ELMER0_GP_BIT1;
115 if (is_T2(cphy->adapter)) { 113 if (is_T2(cphy->adapter))
116 elmer |= ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4; 114 elmer |= ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4;
117 }
118 t1_tpi_write(cphy->adapter, A_ELMER0_INT_CAUSE, elmer); 115 t1_tpi_write(cphy->adapter, A_ELMER0_INT_CAUSE, elmer);
119 } 116 }
120 return 0; 117 return 0;
@@ -300,7 +297,7 @@ static int mv88e1xxx_interrupt_handler(struct cphy *cphy)
300 297
301 /* 298 /*
302 * Loop until cause reads zero. Need to handle bouncing interrupts. 299 * Loop until cause reads zero. Need to handle bouncing interrupts.
303 */ 300 */
304 while (1) { 301 while (1) {
305 u32 cause; 302 u32 cause;
306 303
@@ -379,11 +376,11 @@ static struct cphy *mv88e1xxx_phy_create(adapter_t *adapter, int phy_addr,
379 } 376 }
380 (void) mv88e1xxx_downshift_set(cphy, 1); /* Enable downshift */ 377 (void) mv88e1xxx_downshift_set(cphy, 1); /* Enable downshift */
381 378
382 /* LED */ 379 /* LED */
383 if (is_T2(adapter)) { 380 if (is_T2(adapter)) {
384 (void) simple_mdio_write(cphy, 381 (void) simple_mdio_write(cphy,
385 MV88E1XXX_LED_CONTROL_REGISTER, 0x1); 382 MV88E1XXX_LED_CONTROL_REGISTER, 0x1);
386 } 383 }
387 384
388 return cphy; 385 return cphy;
389} 386}
diff --git a/drivers/net/chelsio/pm3393.c b/drivers/net/chelsio/pm3393.c
index 63cabeb98afe..76a7ca9e0947 100644
--- a/drivers/net/chelsio/pm3393.c
+++ b/drivers/net/chelsio/pm3393.c
@@ -455,8 +455,8 @@ static void pm3393_rmon_update(struct adapter *adapter, u32 offs, u64 *val,
455static const struct cmac_statistics *pm3393_update_statistics(struct cmac *mac, 455static const struct cmac_statistics *pm3393_update_statistics(struct cmac *mac,
456 int flag) 456 int flag)
457{ 457{
458 u64 ro; 458 u64 ro;
459 u32 val0, val1, val2, val3; 459 u32 val0, val1, val2, val3;
460 460
461 /* Snap the counters */ 461 /* Snap the counters */
462 pmwrite(mac, SUNI1x10GEXP_REG_MSTAT_CONTROL, 462 pmwrite(mac, SUNI1x10GEXP_REG_MSTAT_CONTROL,
@@ -534,9 +534,9 @@ static int pm3393_macaddress_set(struct cmac *cmac, u8 ma[6])
534 /* Store local copy */ 534 /* Store local copy */
535 memcpy(cmac->instance->mac_addr, ma, 6); 535 memcpy(cmac->instance->mac_addr, ma, 6);
536 536
537 lo = ((u32) ma[1] << 8) | (u32) ma[0]; 537 lo = ((u32) ma[1] << 8) | (u32) ma[0];
538 mid = ((u32) ma[3] << 8) | (u32) ma[2]; 538 mid = ((u32) ma[3] << 8) | (u32) ma[2];
539 hi = ((u32) ma[5] << 8) | (u32) ma[4]; 539 hi = ((u32) ma[5] << 8) | (u32) ma[4];
540 540
541 /* Disable Rx/Tx MAC before configuring it. */ 541 /* Disable Rx/Tx MAC before configuring it. */
542 if (enabled) 542 if (enabled)
diff --git a/drivers/net/chelsio/sge.c b/drivers/net/chelsio/sge.c
index 659cb2252e44..6b1e857ee07e 100644
--- a/drivers/net/chelsio/sge.c
+++ b/drivers/net/chelsio/sge.c
@@ -195,7 +195,7 @@ struct cmdQ {
195 struct cmdQ_e *entries; /* HW command descriptor Q */ 195 struct cmdQ_e *entries; /* HW command descriptor Q */
196 struct cmdQ_ce *centries; /* SW command context descriptor Q */ 196 struct cmdQ_ce *centries; /* SW command context descriptor Q */
197 dma_addr_t dma_addr; /* DMA addr HW command descriptor Q */ 197 dma_addr_t dma_addr; /* DMA addr HW command descriptor Q */
198 spinlock_t lock; /* Lock to protect cmdQ enqueuing */ 198 spinlock_t lock; /* Lock to protect cmdQ enqueuing */
199}; 199};
200 200
201struct freelQ { 201struct freelQ {
@@ -241,9 +241,9 @@ struct sched_port {
241/* Per T204 device */ 241/* Per T204 device */
242struct sched { 242struct sched {
243 ktime_t last_updated; /* last time quotas were computed */ 243 ktime_t last_updated; /* last time quotas were computed */
244 unsigned int max_avail; /* max bits to be sent to any port */ 244 unsigned int max_avail; /* max bits to be sent to any port */
245 unsigned int port; /* port index (round robin ports) */ 245 unsigned int port; /* port index (round robin ports) */
246 unsigned int num; /* num skbs in per port queues */ 246 unsigned int num; /* num skbs in per port queues */
247 struct sched_port p[MAX_NPORTS]; 247 struct sched_port p[MAX_NPORTS];
248 struct tasklet_struct sched_tsk;/* tasklet used to run scheduler */ 248 struct tasklet_struct sched_tsk;/* tasklet used to run scheduler */
249}; 249};
@@ -259,10 +259,10 @@ static void restart_sched(unsigned long);
259 * contention. 259 * contention.
260 */ 260 */
261struct sge { 261struct sge {
262 struct adapter *adapter; /* adapter backpointer */ 262 struct adapter *adapter; /* adapter backpointer */
263 struct net_device *netdev; /* netdevice backpointer */ 263 struct net_device *netdev; /* netdevice backpointer */
264 struct freelQ freelQ[SGE_FREELQ_N]; /* buffer free lists */ 264 struct freelQ freelQ[SGE_FREELQ_N]; /* buffer free lists */
265 struct respQ respQ; /* response Q */ 265 struct respQ respQ; /* response Q */
266 unsigned long stopped_tx_queues; /* bitmap of suspended Tx queues */ 266 unsigned long stopped_tx_queues; /* bitmap of suspended Tx queues */
267 unsigned int rx_pkt_pad; /* RX padding for L2 packets */ 267 unsigned int rx_pkt_pad; /* RX padding for L2 packets */
268 unsigned int jumbo_fl; /* jumbo freelist Q index */ 268 unsigned int jumbo_fl; /* jumbo freelist Q index */
@@ -460,7 +460,7 @@ static struct sk_buff *sched_skb(struct sge *sge, struct sk_buff *skb,
460 if (credits < MAX_SKB_FRAGS + 1) 460 if (credits < MAX_SKB_FRAGS + 1)
461 goto out; 461 goto out;
462 462
463 again: 463again:
464 for (i = 0; i < MAX_NPORTS; i++) { 464 for (i = 0; i < MAX_NPORTS; i++) {
465 s->port = ++s->port & (MAX_NPORTS - 1); 465 s->port = ++s->port & (MAX_NPORTS - 1);
466 skbq = &s->p[s->port].skbq; 466 skbq = &s->p[s->port].skbq;
@@ -483,8 +483,8 @@ static struct sk_buff *sched_skb(struct sge *sge, struct sk_buff *skb,
483 if (update-- && sched_update_avail(sge)) 483 if (update-- && sched_update_avail(sge))
484 goto again; 484 goto again;
485 485
486 out: 486out:
487 /* If there are more pending skbs, we use the hardware to schedule us 487 /* If there are more pending skbs, we use the hardware to schedule us
488 * again. 488 * again.
489 */ 489 */
490 if (s->num && !skb) { 490 if (s->num && !skb) {
@@ -641,14 +641,14 @@ static void free_cmdQ_buffers(struct sge *sge, struct cmdQ *q, unsigned int n)
641 if (likely(pci_unmap_len(ce, dma_len))) { 641 if (likely(pci_unmap_len(ce, dma_len))) {
642 pci_unmap_single(pdev, 642 pci_unmap_single(pdev,
643 pci_unmap_addr(ce, dma_addr), 643 pci_unmap_addr(ce, dma_addr),
644 pci_unmap_len(ce, dma_len), 644 pci_unmap_len(ce, dma_len),
645 PCI_DMA_TODEVICE); 645 PCI_DMA_TODEVICE);
646 q->sop = 0; 646 q->sop = 0;
647 } 647 }
648 } else { 648 } else {
649 if (likely(pci_unmap_len(ce, dma_len))) { 649 if (likely(pci_unmap_len(ce, dma_len))) {
650 pci_unmap_page(pdev, pci_unmap_addr(ce, dma_addr), 650 pci_unmap_page(pdev, pci_unmap_addr(ce, dma_addr),
651 pci_unmap_len(ce, dma_len), 651 pci_unmap_len(ce, dma_len),
652 PCI_DMA_TODEVICE); 652 PCI_DMA_TODEVICE);
653 } 653 }
654 } 654 }
@@ -770,7 +770,7 @@ void t1_set_vlan_accel(struct adapter *adapter, int on_off)
770static void configure_sge(struct sge *sge, struct sge_params *p) 770static void configure_sge(struct sge *sge, struct sge_params *p)
771{ 771{
772 struct adapter *ap = sge->adapter; 772 struct adapter *ap = sge->adapter;
773 773
774 writel(0, ap->regs + A_SG_CONTROL); 774 writel(0, ap->regs + A_SG_CONTROL);
775 setup_ring_params(ap, sge->cmdQ[0].dma_addr, sge->cmdQ[0].size, 775 setup_ring_params(ap, sge->cmdQ[0].dma_addr, sge->cmdQ[0].size,
776 A_SG_CMD0BASELWR, A_SG_CMD0BASEUPR, A_SG_CMD0SIZE); 776 A_SG_CMD0BASELWR, A_SG_CMD0BASEUPR, A_SG_CMD0SIZE);
@@ -850,7 +850,6 @@ static void refill_free_list(struct sge *sge, struct freelQ *q)
850 struct freelQ_e *e = &q->entries[q->pidx]; 850 struct freelQ_e *e = &q->entries[q->pidx];
851 unsigned int dma_len = q->rx_buffer_size - q->dma_offset; 851 unsigned int dma_len = q->rx_buffer_size - q->dma_offset;
852 852
853
854 while (q->credits < q->size) { 853 while (q->credits < q->size) {
855 struct sk_buff *skb; 854 struct sk_buff *skb;
856 dma_addr_t mapping; 855 dma_addr_t mapping;
@@ -881,7 +880,6 @@ static void refill_free_list(struct sge *sge, struct freelQ *q)
881 } 880 }
882 q->credits++; 881 q->credits++;
883 } 882 }
884
885} 883}
886 884
887/* 885/*
@@ -1075,12 +1073,12 @@ static inline struct sk_buff *get_packet(struct pci_dev *pdev,
1075 skb_put(skb, len); 1073 skb_put(skb, len);
1076 pci_dma_sync_single_for_cpu(pdev, 1074 pci_dma_sync_single_for_cpu(pdev,
1077 pci_unmap_addr(ce, dma_addr), 1075 pci_unmap_addr(ce, dma_addr),
1078 pci_unmap_len(ce, dma_len), 1076 pci_unmap_len(ce, dma_len),
1079 PCI_DMA_FROMDEVICE); 1077 PCI_DMA_FROMDEVICE);
1080 memcpy(skb->data, ce->skb->data + dma_pad, len); 1078 memcpy(skb->data, ce->skb->data + dma_pad, len);
1081 pci_dma_sync_single_for_device(pdev, 1079 pci_dma_sync_single_for_device(pdev,
1082 pci_unmap_addr(ce, dma_addr), 1080 pci_unmap_addr(ce, dma_addr),
1083 pci_unmap_len(ce, dma_len), 1081 pci_unmap_len(ce, dma_len),
1084 PCI_DMA_FROMDEVICE); 1082 PCI_DMA_FROMDEVICE);
1085 } else if (!drop_thres) 1083 } else if (!drop_thres)
1086 goto use_orig_buf; 1084 goto use_orig_buf;
@@ -1137,6 +1135,7 @@ static void unexpected_offload(struct adapter *adapter, struct freelQ *fl)
1137static inline unsigned int compute_large_page_tx_descs(struct sk_buff *skb) 1135static inline unsigned int compute_large_page_tx_descs(struct sk_buff *skb)
1138{ 1136{
1139 unsigned int count = 0; 1137 unsigned int count = 0;
1138
1140 if (PAGE_SIZE > SGE_TX_DESC_MAX_PLEN) { 1139 if (PAGE_SIZE > SGE_TX_DESC_MAX_PLEN) {
1141 unsigned int nfrags = skb_shinfo(skb)->nr_frags; 1140 unsigned int nfrags = skb_shinfo(skb)->nr_frags;
1142 unsigned int i, len = skb->len - skb->data_len; 1141 unsigned int i, len = skb->len - skb->data_len;
@@ -1343,7 +1342,7 @@ static void restart_sched(unsigned long arg)
1343 while ((skb = sched_skb(sge, NULL, credits)) != NULL) { 1342 while ((skb = sched_skb(sge, NULL, credits)) != NULL) {
1344 unsigned int genbit, pidx, count; 1343 unsigned int genbit, pidx, count;
1345 count = 1 + skb_shinfo(skb)->nr_frags; 1344 count = 1 + skb_shinfo(skb)->nr_frags;
1346 count += compute_large_page_tx_descs(skb); 1345 count += compute_large_page_tx_descs(skb);
1347 q->in_use += count; 1346 q->in_use += count;
1348 genbit = q->genbit; 1347 genbit = q->genbit;
1349 pidx = q->pidx; 1348 pidx = q->pidx;
@@ -1466,11 +1465,11 @@ static void restart_tx_queues(struct sge *sge)
1466} 1465}
1467 1466
1468/* 1467/*
1469 * update_tx_info is called from the interrupt handler/NAPI to return cmdQ0 1468 * update_tx_info is called from the interrupt handler/NAPI to return cmdQ0
1470 * information. 1469 * information.
1471 */ 1470 */
1472static unsigned int update_tx_info(struct adapter *adapter, 1471static unsigned int update_tx_info(struct adapter *adapter,
1473 unsigned int flags, 1472 unsigned int flags,
1474 unsigned int pr0) 1473 unsigned int pr0)
1475{ 1474{
1476 struct sge *sge = adapter->sge; 1475 struct sge *sge = adapter->sge;
@@ -1513,14 +1512,14 @@ static int process_responses(struct adapter *adapter, int budget)
1513 int budget_left = budget; 1512 int budget_left = budget;
1514 unsigned int flags = 0; 1513 unsigned int flags = 0;
1515 unsigned int cmdq_processed[SGE_CMDQ_N] = {0, 0}; 1514 unsigned int cmdq_processed[SGE_CMDQ_N] = {0, 0};
1516 1515
1517 1516
1518 while (likely(budget_left && e->GenerationBit == q->genbit)) { 1517 while (likely(budget_left && e->GenerationBit == q->genbit)) {
1519 flags |= e->Qsleeping; 1518 flags |= e->Qsleeping;
1520 1519
1521 cmdq_processed[0] += e->Cmdq0CreditReturn; 1520 cmdq_processed[0] += e->Cmdq0CreditReturn;
1522 cmdq_processed[1] += e->Cmdq1CreditReturn; 1521 cmdq_processed[1] += e->Cmdq1CreditReturn;
1523 1522
1524 /* We batch updates to the TX side to avoid cacheline 1523 /* We batch updates to the TX side to avoid cacheline
1525 * ping-pong of TX state information on MP where the sender 1524 * ping-pong of TX state information on MP where the sender
1526 * might run on a different CPU than this function... 1525 * might run on a different CPU than this function...
@@ -1569,7 +1568,7 @@ static int process_responses(struct adapter *adapter, int budget)
1569 --budget_left; 1568 --budget_left;
1570 } 1569 }
1571 1570
1572 flags = update_tx_info(adapter, flags, cmdq_processed[0]); 1571 flags = update_tx_info(adapter, flags, cmdq_processed[0]);
1573 sge->cmdQ[1].processed += cmdq_processed[1]; 1572 sge->cmdQ[1].processed += cmdq_processed[1];
1574 1573
1575 budget -= budget_left; 1574 budget -= budget_left;
@@ -1597,7 +1596,7 @@ static int process_pure_responses(struct adapter *adapter, struct respQ_e *e)
1597 1596
1598 cmdq_processed[0] += e->Cmdq0CreditReturn; 1597 cmdq_processed[0] += e->Cmdq0CreditReturn;
1599 cmdq_processed[1] += e->Cmdq1CreditReturn; 1598 cmdq_processed[1] += e->Cmdq1CreditReturn;
1600 1599
1601 e++; 1600 e++;
1602 if (unlikely(++q->cidx == q->size)) { 1601 if (unlikely(++q->cidx == q->size)) {
1603 q->cidx = 0; 1602 q->cidx = 0;
@@ -1613,7 +1612,7 @@ static int process_pure_responses(struct adapter *adapter, struct respQ_e *e)
1613 sge->stats.pure_rsps++; 1612 sge->stats.pure_rsps++;
1614 } while (e->GenerationBit == q->genbit && !e->DataValid); 1613 } while (e->GenerationBit == q->genbit && !e->DataValid);
1615 1614
1616 flags = update_tx_info(adapter, flags, cmdq_processed[0]); 1615 flags = update_tx_info(adapter, flags, cmdq_processed[0]);
1617 sge->cmdQ[1].processed += cmdq_processed[1]; 1616 sge->cmdQ[1].processed += cmdq_processed[1];
1618 1617
1619 return e->GenerationBit == q->genbit; 1618 return e->GenerationBit == q->genbit;
@@ -1636,12 +1635,12 @@ int t1_poll(struct net_device *dev, int *budget)
1636 if (work_done >= effective_budget) 1635 if (work_done >= effective_budget)
1637 return 1; 1636 return 1;
1638 1637
1639 spin_lock_irq(&adapter->async_lock); 1638 spin_lock_irq(&adapter->async_lock);
1640 __netif_rx_complete(dev); 1639 __netif_rx_complete(dev);
1641 writel(adapter->sge->respQ.cidx, adapter->regs + A_SG_SLEEPING); 1640 writel(adapter->sge->respQ.cidx, adapter->regs + A_SG_SLEEPING);
1642 writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA, 1641 writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
1643 adapter->regs + A_PL_ENABLE); 1642 adapter->regs + A_PL_ENABLE);
1644 spin_unlock_irq(&adapter->async_lock); 1643 spin_unlock_irq(&adapter->async_lock);
1645 1644
1646 return 0; 1645 return 0;
1647} 1646}
@@ -1652,9 +1651,9 @@ int t1_poll(struct net_device *dev, int *budget)
1652irqreturn_t t1_interrupt(int irq, void *data) 1651irqreturn_t t1_interrupt(int irq, void *data)
1653{ 1652{
1654 struct adapter *adapter = data; 1653 struct adapter *adapter = data;
1655 struct net_device *dev = adapter->sge->netdev; 1654 struct net_device *dev = adapter->sge->netdev;
1656 struct sge *sge = adapter->sge; 1655 struct sge *sge = adapter->sge;
1657 u32 cause; 1656 u32 cause;
1658 int handled = 0; 1657 int handled = 0;
1659 1658
1660 cause = readl(adapter->regs + A_PL_CAUSE); 1659 cause = readl(adapter->regs + A_PL_CAUSE);
@@ -1662,12 +1661,12 @@ irqreturn_t t1_interrupt(int irq, void *data)
1662 return IRQ_NONE; 1661 return IRQ_NONE;
1663 1662
1664 spin_lock(&adapter->async_lock); 1663 spin_lock(&adapter->async_lock);
1665 if (cause & F_PL_INTR_SGE_DATA) { 1664 if (cause & F_PL_INTR_SGE_DATA) {
1666 struct respQ *q = &adapter->sge->respQ; 1665 struct respQ *q = &adapter->sge->respQ;
1667 struct respQ_e *e = &q->entries[q->cidx]; 1666 struct respQ_e *e = &q->entries[q->cidx];
1668 1667
1669 handled = 1; 1668 handled = 1;
1670 writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE); 1669 writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE);
1671 1670
1672 if (e->GenerationBit == q->genbit && 1671 if (e->GenerationBit == q->genbit &&
1673 __netif_rx_schedule_prep(dev)) { 1672 __netif_rx_schedule_prep(dev)) {
@@ -1796,7 +1795,7 @@ static int t1_sge_tx(struct sk_buff *skb, struct adapter *adapter,
1796 * through the scheduler. 1795 * through the scheduler.
1797 */ 1796 */
1798 if (sge->tx_sched && !qid && skb->dev) { 1797 if (sge->tx_sched && !qid && skb->dev) {
1799 use_sched: 1798use_sched:
1800 use_sched_skb = 1; 1799 use_sched_skb = 1;
1801 /* Note that the scheduler might return a different skb than 1800 /* Note that the scheduler might return a different skb than
1802 * the one passed in. 1801 * the one passed in.
@@ -1900,7 +1899,7 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev)
1900 cpl = (struct cpl_tx_pkt *)hdr; 1899 cpl = (struct cpl_tx_pkt *)hdr;
1901 } else { 1900 } else {
1902 /* 1901 /*
1903 * Packets shorter than ETH_HLEN can break the MAC, drop them 1902 * Packets shorter than ETH_HLEN can break the MAC, drop them
1904 * early. Also, we may get oversized packets because some 1903 * early. Also, we may get oversized packets because some
1905 * parts of the kernel don't handle our unusual hard_header_len 1904 * parts of the kernel don't handle our unusual hard_header_len
1906 * right, drop those too. 1905 * right, drop those too.
@@ -1984,9 +1983,9 @@ send:
1984 * then silently discard to avoid leak. 1983 * then silently discard to avoid leak.
1985 */ 1984 */
1986 if (unlikely(ret != NETDEV_TX_OK && skb != orig_skb)) { 1985 if (unlikely(ret != NETDEV_TX_OK && skb != orig_skb)) {
1987 dev_kfree_skb_any(skb); 1986 dev_kfree_skb_any(skb);
1988 ret = NETDEV_TX_OK; 1987 ret = NETDEV_TX_OK;
1989 } 1988 }
1990 return ret; 1989 return ret;
1991} 1990}
1992 1991
@@ -2099,31 +2098,35 @@ static void espibug_workaround_t204(unsigned long data)
2099 2098
2100 if (adapter->open_device_map & PORT_MASK) { 2099 if (adapter->open_device_map & PORT_MASK) {
2101 int i; 2100 int i;
2102 if (t1_espi_get_mon_t204(adapter, &(seop[0]), 0) < 0) { 2101
2102 if (t1_espi_get_mon_t204(adapter, &(seop[0]), 0) < 0)
2103 return; 2103 return;
2104 } 2104
2105 for (i = 0; i < nports; i++) { 2105 for (i = 0; i < nports; i++) {
2106 struct sk_buff *skb = sge->espibug_skb[i]; 2106 struct sk_buff *skb = sge->espibug_skb[i];
2107 if ( (netif_running(adapter->port[i].dev)) && 2107
2108 !(netif_queue_stopped(adapter->port[i].dev)) && 2108 if (!netif_running(adapter->port[i].dev) ||
2109 (seop[i] && ((seop[i] & 0xfff) == 0)) && 2109 netif_queue_stopped(adapter->port[i].dev) ||
2110 skb ) { 2110 !seop[i] || ((seop[i] & 0xfff) != 0) || !skb)
2111 if (!skb->cb[0]) { 2111 continue;
2112 u8 ch_mac_addr[ETH_ALEN] = 2112
2113 {0x0, 0x7, 0x43, 0x0, 0x0, 0x0}; 2113 if (!skb->cb[0]) {
2114 memcpy(skb->data + sizeof(struct cpl_tx_pkt), 2114 u8 ch_mac_addr[ETH_ALEN] = {
2115 ch_mac_addr, ETH_ALEN); 2115 0x0, 0x7, 0x43, 0x0, 0x0, 0x0
2116 memcpy(skb->data + skb->len - 10, 2116 };
2117 ch_mac_addr, ETH_ALEN); 2117
2118 skb->cb[0] = 0xff; 2118 memcpy(skb->data + sizeof(struct cpl_tx_pkt),
2119 } 2119 ch_mac_addr, ETH_ALEN);
2120 2120 memcpy(skb->data + skb->len - 10,
2121 /* bump the reference count to avoid freeing of 2121 ch_mac_addr, ETH_ALEN);
2122 * the skb once the DMA has completed. 2122 skb->cb[0] = 0xff;
2123 */
2124 skb = skb_get(skb);
2125 t1_sge_tx(skb, adapter, 0, adapter->port[i].dev);
2126 } 2123 }
2124
2125 /* bump the reference count to avoid freeing of
2126 * the skb once the DMA has completed.
2127 */
2128 skb = skb_get(skb);
2129 t1_sge_tx(skb, adapter, 0, adapter->port[i].dev);
2127 } 2130 }
2128 } 2131 }
2129 mod_timer(&sge->espibug_timer, jiffies + sge->espibug_timeout); 2132 mod_timer(&sge->espibug_timer, jiffies + sge->espibug_timeout);
@@ -2202,7 +2205,7 @@ struct sge * __devinit t1_sge_create(struct adapter *adapter,
2202 if (adapter->params.nports > 1) 2205 if (adapter->params.nports > 1)
2203 sge->espibug_timeout = HZ/100; 2206 sge->espibug_timeout = HZ/100;
2204 } 2207 }
2205 2208
2206 2209
2207 p->cmdQ_size[0] = SGE_CMDQ0_E_N; 2210 p->cmdQ_size[0] = SGE_CMDQ0_E_N;
2208 p->cmdQ_size[1] = SGE_CMDQ1_E_N; 2211 p->cmdQ_size[1] = SGE_CMDQ1_E_N;
diff --git a/drivers/net/chelsio/subr.c b/drivers/net/chelsio/subr.c
index 38dbaf28d439..c2522cdfab37 100644
--- a/drivers/net/chelsio/subr.c
+++ b/drivers/net/chelsio/subr.c
@@ -223,13 +223,13 @@ static int fpga_slow_intr(adapter_t *adapter)
223 t1_sge_intr_error_handler(adapter->sge); 223 t1_sge_intr_error_handler(adapter->sge);
224 224
225 if (cause & FPGA_PCIX_INTERRUPT_GMAC) 225 if (cause & FPGA_PCIX_INTERRUPT_GMAC)
226 fpga_phy_intr_handler(adapter); 226 fpga_phy_intr_handler(adapter);
227 227
228 if (cause & FPGA_PCIX_INTERRUPT_TP) { 228 if (cause & FPGA_PCIX_INTERRUPT_TP) {
229 /* 229 /*
230 * FPGA doesn't support MC4 interrupts and it requires 230 * FPGA doesn't support MC4 interrupts and it requires
231 * this odd layer of indirection for MC5. 231 * this odd layer of indirection for MC5.
232 */ 232 */
233 u32 tp_cause = readl(adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE); 233 u32 tp_cause = readl(adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE);
234 234
235 /* Clear TP interrupt */ 235 /* Clear TP interrupt */
@@ -262,8 +262,7 @@ static int mi1_wait_until_ready(adapter_t *adapter, int mi1_reg)
262 udelay(10); 262 udelay(10);
263 } while (busy && --attempts); 263 } while (busy && --attempts);
264 if (busy) 264 if (busy)
265 CH_ALERT("%s: MDIO operation timed out\n", 265 CH_ALERT("%s: MDIO operation timed out\n", adapter->name);
266 adapter->name);
267 return busy; 266 return busy;
268} 267}
269 268
@@ -605,23 +604,23 @@ int t1_elmer0_ext_intr_handler(adapter_t *adapter)
605 604
606 switch (board_info(adapter)->board) { 605 switch (board_info(adapter)->board) {
607#ifdef CONFIG_CHELSIO_T1_1G 606#ifdef CONFIG_CHELSIO_T1_1G
608 case CHBT_BOARD_CHT204: 607 case CHBT_BOARD_CHT204:
609 case CHBT_BOARD_CHT204E: 608 case CHBT_BOARD_CHT204E:
610 case CHBT_BOARD_CHN204: 609 case CHBT_BOARD_CHN204:
611 case CHBT_BOARD_CHT204V: { 610 case CHBT_BOARD_CHT204V: {
612 int i, port_bit; 611 int i, port_bit;
613 for_each_port(adapter, i) { 612 for_each_port(adapter, i) {
614 port_bit = i + 1; 613 port_bit = i + 1;
615 if (!(cause & (1 << port_bit))) 614 if (!(cause & (1 << port_bit)))
616 continue; 615 continue;
617 616
618 phy = adapter->port[i].phy; 617 phy = adapter->port[i].phy;
619 phy_cause = phy->ops->interrupt_handler(phy); 618 phy_cause = phy->ops->interrupt_handler(phy);
620 if (phy_cause & cphy_cause_link_change) 619 if (phy_cause & cphy_cause_link_change)
621 t1_link_changed(adapter, i); 620 t1_link_changed(adapter, i);
622 } 621 }
623 break; 622 break;
624 } 623 }
625 case CHBT_BOARD_CHT101: 624 case CHBT_BOARD_CHT101:
626 if (cause & ELMER0_GP_BIT1) { /* Marvell 88E1111 interrupt */ 625 if (cause & ELMER0_GP_BIT1) { /* Marvell 88E1111 interrupt */
627 phy = adapter->port[0].phy; 626 phy = adapter->port[0].phy;
@@ -632,13 +631,13 @@ int t1_elmer0_ext_intr_handler(adapter_t *adapter)
632 break; 631 break;
633 case CHBT_BOARD_7500: { 632 case CHBT_BOARD_7500: {
634 int p; 633 int p;
635 /* 634 /*
636 * Elmer0's interrupt cause isn't useful here because there is 635 * Elmer0's interrupt cause isn't useful here because there is
637 * only one bit that can be set for all 4 ports. This means 636 * only one bit that can be set for all 4 ports. This means
638 * we are forced to check every PHY's interrupt status 637 * we are forced to check every PHY's interrupt status
639 * register to see who initiated the interrupt. 638 * register to see who initiated the interrupt.
640 */ 639 */
641 for_each_port(adapter, p) { 640 for_each_port(adapter, p) {
642 phy = adapter->port[p].phy; 641 phy = adapter->port[p].phy;
643 phy_cause = phy->ops->interrupt_handler(phy); 642 phy_cause = phy->ops->interrupt_handler(phy);
644 if (phy_cause & cphy_cause_link_change) 643 if (phy_cause & cphy_cause_link_change)
@@ -659,7 +658,7 @@ int t1_elmer0_ext_intr_handler(adapter_t *adapter)
659 break; 658 break;
660 case CHBT_BOARD_8000: 659 case CHBT_BOARD_8000:
661 case CHBT_BOARD_CHT110: 660 case CHBT_BOARD_CHT110:
662 CH_DBG(adapter, INTR, "External interrupt cause 0x%x\n", 661 CH_DBG(adapter, INTR, "External interrupt cause 0x%x\n",
663 cause); 662 cause);
664 if (cause & ELMER0_GP_BIT1) { /* PMC3393 INTB */ 663 if (cause & ELMER0_GP_BIT1) { /* PMC3393 INTB */
665 struct cmac *mac = adapter->port[0].mac; 664 struct cmac *mac = adapter->port[0].mac;
@@ -671,9 +670,9 @@ int t1_elmer0_ext_intr_handler(adapter_t *adapter)
671 670
672 t1_tpi_read(adapter, 671 t1_tpi_read(adapter,
673 A_ELMER0_GPI_STAT, &mod_detect); 672 A_ELMER0_GPI_STAT, &mod_detect);
674 CH_MSG(adapter, INFO, LINK, "XPAK %s\n", 673 CH_MSG(adapter, INFO, LINK, "XPAK %s\n",
675 mod_detect ? "removed" : "inserted"); 674 mod_detect ? "removed" : "inserted");
676 } 675 }
677 break; 676 break;
678#ifdef CONFIG_CHELSIO_T1_COUGAR 677#ifdef CONFIG_CHELSIO_T1_COUGAR
679 case CHBT_BOARD_COUGAR: 678 case CHBT_BOARD_COUGAR:
@@ -757,7 +756,7 @@ void t1_interrupts_disable(adapter_t* adapter)
757 756
758 /* Disable PCIX & external chip interrupts. */ 757 /* Disable PCIX & external chip interrupts. */
759 if (t1_is_asic(adapter)) 758 if (t1_is_asic(adapter))
760 writel(0, adapter->regs + A_PL_ENABLE); 759 writel(0, adapter->regs + A_PL_ENABLE);
761 760
762 /* PCI-X interrupts */ 761 /* PCI-X interrupts */
763 pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_ENABLE, 0); 762 pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_ENABLE, 0);
@@ -832,11 +831,11 @@ int t1_slow_intr_handler(adapter_t *adapter)
832/* Power sequencing is a work-around for Intel's XPAKs. */ 831/* Power sequencing is a work-around for Intel's XPAKs. */
833static void power_sequence_xpak(adapter_t* adapter) 832static void power_sequence_xpak(adapter_t* adapter)
834{ 833{
835 u32 mod_detect; 834 u32 mod_detect;
836 u32 gpo; 835 u32 gpo;
837 836
838 /* Check for XPAK */ 837 /* Check for XPAK */
839 t1_tpi_read(adapter, A_ELMER0_GPI_STAT, &mod_detect); 838 t1_tpi_read(adapter, A_ELMER0_GPI_STAT, &mod_detect);
840 if (!(ELMER0_GP_BIT5 & mod_detect)) { 839 if (!(ELMER0_GP_BIT5 & mod_detect)) {
841 /* XPAK is present */ 840 /* XPAK is present */
842 t1_tpi_read(adapter, A_ELMER0_GPO, &gpo); 841 t1_tpi_read(adapter, A_ELMER0_GPO, &gpo);
@@ -879,31 +878,31 @@ static int board_init(adapter_t *adapter, const struct board_info *bi)
879 case CHBT_BOARD_N210: 878 case CHBT_BOARD_N210:
880 case CHBT_BOARD_CHT210: 879 case CHBT_BOARD_CHT210:
881 case CHBT_BOARD_COUGAR: 880 case CHBT_BOARD_COUGAR:
882 t1_tpi_par(adapter, 0xf); 881 t1_tpi_par(adapter, 0xf);
883 t1_tpi_write(adapter, A_ELMER0_GPO, 0x800); 882 t1_tpi_write(adapter, A_ELMER0_GPO, 0x800);
884 break; 883 break;
885 case CHBT_BOARD_CHT110: 884 case CHBT_BOARD_CHT110:
886 t1_tpi_par(adapter, 0xf); 885 t1_tpi_par(adapter, 0xf);
887 t1_tpi_write(adapter, A_ELMER0_GPO, 0x1800); 886 t1_tpi_write(adapter, A_ELMER0_GPO, 0x1800);
888 887
889 /* TBD XXX Might not need. This fixes a problem 888 /* TBD XXX Might not need. This fixes a problem
890 * described in the Intel SR XPAK errata. 889 * described in the Intel SR XPAK errata.
891 */ 890 */
892 power_sequence_xpak(adapter); 891 power_sequence_xpak(adapter);
893 break; 892 break;
894#ifdef CONFIG_CHELSIO_T1_1G 893#ifdef CONFIG_CHELSIO_T1_1G
895 case CHBT_BOARD_CHT204E: 894 case CHBT_BOARD_CHT204E:
896 /* add config space write here */ 895 /* add config space write here */
897 case CHBT_BOARD_CHT204: 896 case CHBT_BOARD_CHT204:
898 case CHBT_BOARD_CHT204V: 897 case CHBT_BOARD_CHT204V:
899 case CHBT_BOARD_CHN204: 898 case CHBT_BOARD_CHN204:
900 t1_tpi_par(adapter, 0xf); 899 t1_tpi_par(adapter, 0xf);
901 t1_tpi_write(adapter, A_ELMER0_GPO, 0x804); 900 t1_tpi_write(adapter, A_ELMER0_GPO, 0x804);
902 break; 901 break;
903 case CHBT_BOARD_CHT101: 902 case CHBT_BOARD_CHT101:
904 case CHBT_BOARD_7500: 903 case CHBT_BOARD_7500:
905 t1_tpi_par(adapter, 0xf); 904 t1_tpi_par(adapter, 0xf);
906 t1_tpi_write(adapter, A_ELMER0_GPO, 0x1804); 905 t1_tpi_write(adapter, A_ELMER0_GPO, 0x1804);
907 break; 906 break;
908#endif 907#endif
909 } 908 }
@@ -943,7 +942,7 @@ int t1_init_hw_modules(adapter_t *adapter)
943 goto out_err; 942 goto out_err;
944 943
945 err = 0; 944 err = 0;
946 out_err: 945out_err:
947 return err; 946 return err;
948} 947}
949 948
@@ -985,7 +984,7 @@ void t1_free_sw_modules(adapter_t *adapter)
985 if (adapter->espi) 984 if (adapter->espi)
986 t1_espi_destroy(adapter->espi); 985 t1_espi_destroy(adapter->espi);
987#ifdef CONFIG_CHELSIO_T1_COUGAR 986#ifdef CONFIG_CHELSIO_T1_COUGAR
988 if (adapter->cspi) 987 if (adapter->cspi)
989 t1_cspi_destroy(adapter->cspi); 988 t1_cspi_destroy(adapter->cspi);
990#endif 989#endif
991} 990}
@@ -1012,7 +1011,7 @@ static void __devinit init_link_config(struct link_config *lc,
1012 CH_ERR("%s: CSPI initialization failed\n", 1011 CH_ERR("%s: CSPI initialization failed\n",
1013 adapter->name); 1012 adapter->name);
1014 goto error; 1013 goto error;
1015 } 1014 }
1016#endif 1015#endif
1017 1016
1018/* 1017/*
diff --git a/drivers/net/chelsio/tp.c b/drivers/net/chelsio/tp.c
index 0ca0b6e19e43..6222d585e447 100644
--- a/drivers/net/chelsio/tp.c
+++ b/drivers/net/chelsio/tp.c
@@ -17,39 +17,36 @@ struct petp {
17static void tp_init(adapter_t * ap, const struct tp_params *p, 17static void tp_init(adapter_t * ap, const struct tp_params *p,
18 unsigned int tp_clk) 18 unsigned int tp_clk)
19{ 19{
20 if (t1_is_asic(ap)) { 20 u32 val;
21 u32 val;
22
23 val = F_TP_IN_CSPI_CPL | F_TP_IN_CSPI_CHECK_IP_CSUM |
24 F_TP_IN_CSPI_CHECK_TCP_CSUM | F_TP_IN_ESPI_ETHERNET;
25 if (!p->pm_size)
26 val |= F_OFFLOAD_DISABLE;
27 else
28 val |= F_TP_IN_ESPI_CHECK_IP_CSUM |
29 F_TP_IN_ESPI_CHECK_TCP_CSUM;
30 writel(val, ap->regs + A_TP_IN_CONFIG);
31 writel(F_TP_OUT_CSPI_CPL |
32 F_TP_OUT_ESPI_ETHERNET |
33 F_TP_OUT_ESPI_GENERATE_IP_CSUM |
34 F_TP_OUT_ESPI_GENERATE_TCP_CSUM,
35 ap->regs + A_TP_OUT_CONFIG);
36 writel(V_IP_TTL(64) |
37 F_PATH_MTU /* IP DF bit */ |
38 V_5TUPLE_LOOKUP(p->use_5tuple_mode) |
39 V_SYN_COOKIE_PARAMETER(29),
40 ap->regs + A_TP_GLOBAL_CONFIG);
41 /*
42 * Enable pause frame deadlock prevention.
43 */
44 if (is_T2(ap) && ap->params.nports > 1) {
45 u32 drop_ticks = DROP_MSEC * (tp_clk / 1000);
46
47 writel(F_ENABLE_TX_DROP | F_ENABLE_TX_ERROR |
48 V_DROP_TICKS_CNT(drop_ticks) |
49 V_NUM_PKTS_DROPPED(DROP_PKTS_CNT),
50 ap->regs + A_TP_TX_DROP_CONFIG);
51 }
52 21
22 if (!t1_is_asic(ap))
23 return;
24
25 val = F_TP_IN_CSPI_CPL | F_TP_IN_CSPI_CHECK_IP_CSUM |
26 F_TP_IN_CSPI_CHECK_TCP_CSUM | F_TP_IN_ESPI_ETHERNET;
27 if (!p->pm_size)
28 val |= F_OFFLOAD_DISABLE;
29 else
30 val |= F_TP_IN_ESPI_CHECK_IP_CSUM | F_TP_IN_ESPI_CHECK_TCP_CSUM;
31 writel(val, ap->regs + A_TP_IN_CONFIG);
32 writel(F_TP_OUT_CSPI_CPL |
33 F_TP_OUT_ESPI_ETHERNET |
34 F_TP_OUT_ESPI_GENERATE_IP_CSUM |
35 F_TP_OUT_ESPI_GENERATE_TCP_CSUM, ap->regs + A_TP_OUT_CONFIG);
36 writel(V_IP_TTL(64) |
37 F_PATH_MTU /* IP DF bit */ |
38 V_5TUPLE_LOOKUP(p->use_5tuple_mode) |
39 V_SYN_COOKIE_PARAMETER(29), ap->regs + A_TP_GLOBAL_CONFIG);
40 /*
41 * Enable pause frame deadlock prevention.
42 */
43 if (is_T2(ap) && ap->params.nports > 1) {
44 u32 drop_ticks = DROP_MSEC * (tp_clk / 1000);
45
46 writel(F_ENABLE_TX_DROP | F_ENABLE_TX_ERROR |
47 V_DROP_TICKS_CNT(drop_ticks) |
48 V_NUM_PKTS_DROPPED(DROP_PKTS_CNT),
49 ap->regs + A_TP_TX_DROP_CONFIG);
53 } 50 }
54} 51}
55 52
@@ -61,6 +58,7 @@ void t1_tp_destroy(struct petp *tp)
61struct petp *__devinit t1_tp_create(adapter_t * adapter, struct tp_params *p) 58struct petp *__devinit t1_tp_create(adapter_t * adapter, struct tp_params *p)
62{ 59{
63 struct petp *tp = kzalloc(sizeof(*tp), GFP_KERNEL); 60 struct petp *tp = kzalloc(sizeof(*tp), GFP_KERNEL);
61
64 if (!tp) 62 if (!tp)
65 return NULL; 63 return NULL;
66 64
diff --git a/drivers/net/chelsio/vsc7326.c b/drivers/net/chelsio/vsc7326.c
index 8c4a31e20e21..bdd25c0b8458 100644
--- a/drivers/net/chelsio/vsc7326.c
+++ b/drivers/net/chelsio/vsc7326.c
@@ -234,14 +234,14 @@ static void run_table(adapter_t *adapter, struct init_table *ib, int len)
234 234
235static int bist_rd(adapter_t *adapter, int moduleid, int address) 235static int bist_rd(adapter_t *adapter, int moduleid, int address)
236{ 236{
237 int data=0; 237 int data = 0;
238 u32 result=0; 238 u32 result = 0;
239 239
240 if( (address != 0x0) && 240 if ((address != 0x0) &&
241 (address != 0x1) && 241 (address != 0x1) &&
242 (address != 0x2) && 242 (address != 0x2) &&
243 (address != 0xd) && 243 (address != 0xd) &&
244 (address != 0xe)) 244 (address != 0xe))
245 CH_ERR("No bist address: 0x%x\n", address); 245 CH_ERR("No bist address: 0x%x\n", address);
246 246
247 data = ((0x00 << 24) | ((address & 0xff) << 16) | (0x00 << 8) | 247 data = ((0x00 << 24) | ((address & 0xff) << 16) | (0x00 << 8) |
@@ -251,9 +251,9 @@ static int bist_rd(adapter_t *adapter, int moduleid, int address)
251 udelay(10); 251 udelay(10);
252 252
253 vsc_read(adapter, REG_RAM_BIST_RESULT, &result); 253 vsc_read(adapter, REG_RAM_BIST_RESULT, &result);
254 if((result & (1<<9)) != 0x0) 254 if ((result & (1 << 9)) != 0x0)
255 CH_ERR("Still in bist read: 0x%x\n", result); 255 CH_ERR("Still in bist read: 0x%x\n", result);
256 else if((result & (1<<8)) != 0x0) 256 else if ((result & (1 << 8)) != 0x0)
257 CH_ERR("bist read error: 0x%x\n", result); 257 CH_ERR("bist read error: 0x%x\n", result);
258 258
259 return (result & 0xff); 259 return (result & 0xff);
@@ -261,17 +261,17 @@ static int bist_rd(adapter_t *adapter, int moduleid, int address)
261 261
262static int bist_wr(adapter_t *adapter, int moduleid, int address, int value) 262static int bist_wr(adapter_t *adapter, int moduleid, int address, int value)
263{ 263{
264 int data=0; 264 int data = 0;
265 u32 result=0; 265 u32 result = 0;
266 266
267 if( (address != 0x0) && 267 if ((address != 0x0) &&
268 (address != 0x1) && 268 (address != 0x1) &&
269 (address != 0x2) && 269 (address != 0x2) &&
270 (address != 0xd) && 270 (address != 0xd) &&
271 (address != 0xe)) 271 (address != 0xe))
272 CH_ERR("No bist address: 0x%x\n", address); 272 CH_ERR("No bist address: 0x%x\n", address);
273 273
274 if( value>255 ) 274 if (value > 255)
275 CH_ERR("Suspicious write out of range value: 0x%x\n", value); 275 CH_ERR("Suspicious write out of range value: 0x%x\n", value);
276 276
277 data = ((0x01 << 24) | ((address & 0xff) << 16) | (value << 8) | 277 data = ((0x01 << 24) | ((address & 0xff) << 16) | (value << 8) |
@@ -281,9 +281,9 @@ static int bist_wr(adapter_t *adapter, int moduleid, int address, int value)
281 udelay(5); 281 udelay(5);
282 282
283 vsc_read(adapter, REG_RAM_BIST_CMD, &result); 283 vsc_read(adapter, REG_RAM_BIST_CMD, &result);
284 if((result & (1<<27)) != 0x0) 284 if ((result & (1 << 27)) != 0x0)
285 CH_ERR("Still in bist write: 0x%x\n", result); 285 CH_ERR("Still in bist write: 0x%x\n", result);
286 else if((result & (1<<26)) != 0x0) 286 else if ((result & (1 << 26)) != 0x0)
287 CH_ERR("bist write error: 0x%x\n", result); 287 CH_ERR("bist write error: 0x%x\n", result);
288 288
289 return 0; 289 return 0;
@@ -321,15 +321,14 @@ static int enable_mem(adapter_t *adapter, int moduleid)
321 321
322static int run_bist_all(adapter_t *adapter) 322static int run_bist_all(adapter_t *adapter)
323{ 323{
324 int port=0; 324 int port = 0;
325 u32 val=0; 325 u32 val = 0;
326 326
327 vsc_write(adapter, REG_MEM_BIST, 0x5); 327 vsc_write(adapter, REG_MEM_BIST, 0x5);
328 vsc_read(adapter, REG_MEM_BIST, &val); 328 vsc_read(adapter, REG_MEM_BIST, &val);
329 329
330 for(port=0; port<12; port++){ 330 for (port = 0; port < 12; port++)
331 vsc_write(adapter, REG_DEV_SETUP(port), 0x0); 331 vsc_write(adapter, REG_DEV_SETUP(port), 0x0);
332 }
333 332
334 udelay(300); 333 udelay(300);
335 vsc_write(adapter, REG_SPI4_MISC, 0x00040409); 334 vsc_write(adapter, REG_SPI4_MISC, 0x00040409);
@@ -352,9 +351,9 @@ static int run_bist_all(adapter_t *adapter)
352 udelay(300); 351 udelay(300);
353 vsc_write(adapter, REG_SPI4_MISC, 0x60040400); 352 vsc_write(adapter, REG_SPI4_MISC, 0x60040400);
354 udelay(300); 353 udelay(300);
355 for(port=0; port<12; port++){ 354 for (port = 0; port < 12; port++)
356 vsc_write(adapter, REG_DEV_SETUP(port), 0x1); 355 vsc_write(adapter, REG_DEV_SETUP(port), 0x1);
357 } 356
358 udelay(300); 357 udelay(300);
359 vsc_write(adapter, REG_MEM_BIST, 0x0); 358 vsc_write(adapter, REG_MEM_BIST, 0x0);
360 mdelay(10); 359 mdelay(10);
@@ -612,7 +611,7 @@ static void port_stats_update(struct cmac *mac)
612 rmon_update(mac, REG_RX_SYMBOL_CARRIER(port), 611 rmon_update(mac, REG_RX_SYMBOL_CARRIER(port),
613 &mac->stats.RxSymbolErrors); 612 &mac->stats.RxSymbolErrors);
614 rmon_update(mac, REG_RX_SIZE_1519_TO_MAX(port), 613 rmon_update(mac, REG_RX_SIZE_1519_TO_MAX(port),
615 &mac->stats.RxJumboFramesOK); 614 &mac->stats.RxJumboFramesOK);
616 615
617 /* Tx stats (skip collision stats as we are full-duplex only) */ 616 /* Tx stats (skip collision stats as we are full-duplex only) */
618 rmon_update(mac, REG_TX_OK_BYTES(port), &mac->stats.TxOctetsOK); 617 rmon_update(mac, REG_TX_OK_BYTES(port), &mac->stats.TxOctetsOK);
@@ -624,7 +623,7 @@ static void port_stats_update(struct cmac *mac)
624 rmon_update(mac, REG_TX_PAUSE(port), &mac->stats.TxPauseFrames); 623 rmon_update(mac, REG_TX_PAUSE(port), &mac->stats.TxPauseFrames);
625 rmon_update(mac, REG_TX_UNDERRUN(port), &mac->stats.TxUnderrun); 624 rmon_update(mac, REG_TX_UNDERRUN(port), &mac->stats.TxUnderrun);
626 rmon_update(mac, REG_TX_SIZE_1519_TO_MAX(port), 625 rmon_update(mac, REG_TX_SIZE_1519_TO_MAX(port),
627 &mac->stats.TxJumboFramesOK); 626 &mac->stats.TxJumboFramesOK);
628} 627}
629 628
630/* 629/*
diff --git a/drivers/net/chelsio/vsc8244.c b/drivers/net/chelsio/vsc8244.c
index f947cf6059b1..251d4859c91d 100644
--- a/drivers/net/chelsio/vsc8244.c
+++ b/drivers/net/chelsio/vsc8244.c
@@ -54,7 +54,7 @@ enum {
54}; 54};
55 55
56#define CFG_CHG_INTR_MASK (VSC_INTR_LINK_CHG | VSC_INTR_NEG_ERR | \ 56#define CFG_CHG_INTR_MASK (VSC_INTR_LINK_CHG | VSC_INTR_NEG_ERR | \
57 VSC_INTR_NEG_DONE) 57 VSC_INTR_NEG_DONE)
58#define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \ 58#define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \
59 VSC_INTR_ENABLE) 59 VSC_INTR_ENABLE)
60 60
@@ -94,19 +94,18 @@ static int vsc8244_intr_enable(struct cphy *cphy)
94{ 94{
95 simple_mdio_write(cphy, VSC8244_INTR_ENABLE, INTR_MASK); 95 simple_mdio_write(cphy, VSC8244_INTR_ENABLE, INTR_MASK);
96 96
97 /* Enable interrupts through Elmer */ 97 /* Enable interrupts through Elmer */
98 if (t1_is_asic(cphy->adapter)) { 98 if (t1_is_asic(cphy->adapter)) {
99 u32 elmer; 99 u32 elmer;
100 100
101 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer); 101 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer);
102 elmer |= ELMER0_GP_BIT1; 102 elmer |= ELMER0_GP_BIT1;
103 if (is_T2(cphy->adapter)) { 103 if (is_T2(cphy->adapter))
104 elmer |= ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4; 104 elmer |= ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4;
105 }
106 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer); 105 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer);
107 } 106 }
108 107
109 return 0; 108 return 0;
110} 109}
111 110
112static int vsc8244_intr_disable(struct cphy *cphy) 111static int vsc8244_intr_disable(struct cphy *cphy)
@@ -118,19 +117,18 @@ static int vsc8244_intr_disable(struct cphy *cphy)
118 117
119 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer); 118 t1_tpi_read(cphy->adapter, A_ELMER0_INT_ENABLE, &elmer);
120 elmer &= ~ELMER0_GP_BIT1; 119 elmer &= ~ELMER0_GP_BIT1;
121 if (is_T2(cphy->adapter)) { 120 if (is_T2(cphy->adapter))
122 elmer &= ~(ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4); 121 elmer &= ~(ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4);
123 }
124 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer); 122 t1_tpi_write(cphy->adapter, A_ELMER0_INT_ENABLE, elmer);
125 } 123 }
126 124
127 return 0; 125 return 0;
128} 126}
129 127
130static int vsc8244_intr_clear(struct cphy *cphy) 128static int vsc8244_intr_clear(struct cphy *cphy)
131{ 129{
132 u32 val; 130 u32 val;
133 u32 elmer; 131 u32 elmer;
134 132
135 /* Clear PHY interrupts by reading the register. */ 133 /* Clear PHY interrupts by reading the register. */
136 simple_mdio_read(cphy, VSC8244_INTR_ENABLE, &val); 134 simple_mdio_read(cphy, VSC8244_INTR_ENABLE, &val);
@@ -138,13 +136,12 @@ static int vsc8244_intr_clear(struct cphy *cphy)
138 if (t1_is_asic(cphy->adapter)) { 136 if (t1_is_asic(cphy->adapter)) {
139 t1_tpi_read(cphy->adapter, A_ELMER0_INT_CAUSE, &elmer); 137 t1_tpi_read(cphy->adapter, A_ELMER0_INT_CAUSE, &elmer);
140 elmer |= ELMER0_GP_BIT1; 138 elmer |= ELMER0_GP_BIT1;
141 if (is_T2(cphy->adapter)) { 139 if (is_T2(cphy->adapter))
142 elmer |= ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4; 140 elmer |= ELMER0_GP_BIT2|ELMER0_GP_BIT3|ELMER0_GP_BIT4;
143 }
144 t1_tpi_write(cphy->adapter, A_ELMER0_INT_CAUSE, elmer); 141 t1_tpi_write(cphy->adapter, A_ELMER0_INT_CAUSE, elmer);
145 } 142 }
146 143
147 return 0; 144 return 0;
148} 145}
149 146
150/* 147/*
@@ -179,13 +176,13 @@ static int vsc8244_set_speed_duplex(struct cphy *phy, int speed, int duplex)
179 176
180int t1_mdio_set_bits(struct cphy *phy, int mmd, int reg, unsigned int bits) 177int t1_mdio_set_bits(struct cphy *phy, int mmd, int reg, unsigned int bits)
181{ 178{
182 int ret; 179 int ret;
183 unsigned int val; 180 unsigned int val;
184 181
185 ret = mdio_read(phy, mmd, reg, &val); 182 ret = mdio_read(phy, mmd, reg, &val);
186 if (!ret) 183 if (!ret)
187 ret = mdio_write(phy, mmd, reg, val | bits); 184 ret = mdio_write(phy, mmd, reg, val | bits);
188 return ret; 185 return ret;
189} 186}
190 187
191static int vsc8244_autoneg_enable(struct cphy *cphy) 188static int vsc8244_autoneg_enable(struct cphy *cphy)
@@ -235,7 +232,7 @@ static int vsc8244_advertise(struct cphy *phy, unsigned int advertise_map)
235} 232}
236 233
237static int vsc8244_get_link_status(struct cphy *cphy, int *link_ok, 234static int vsc8244_get_link_status(struct cphy *cphy, int *link_ok,
238 int *speed, int *duplex, int *fc) 235 int *speed, int *duplex, int *fc)
239{ 236{
240 unsigned int bmcr, status, lpa, adv; 237 unsigned int bmcr, status, lpa, adv;
241 int err, sp = -1, dplx = -1, pause = 0; 238 int err, sp = -1, dplx = -1, pause = 0;
@@ -343,7 +340,8 @@ static struct cphy_ops vsc8244_ops = {
343 .get_link_status = vsc8244_get_link_status 340 .get_link_status = vsc8244_get_link_status
344}; 341};
345 342
346static struct cphy* vsc8244_phy_create(adapter_t *adapter, int phy_addr, struct mdio_ops *mdio_ops) 343static struct cphy* vsc8244_phy_create(adapter_t *adapter, int phy_addr,
344 struct mdio_ops *mdio_ops)
347{ 345{
348 struct cphy *cphy = kzalloc(sizeof(*cphy), GFP_KERNEL); 346 struct cphy *cphy = kzalloc(sizeof(*cphy), GFP_KERNEL);
349 347