diff options
Diffstat (limited to 'drivers/net/chelsio/vsc7326.c')
-rw-r--r-- | drivers/net/chelsio/vsc7326.c | 139 |
1 files changed, 72 insertions, 67 deletions
diff --git a/drivers/net/chelsio/vsc7326.c b/drivers/net/chelsio/vsc7326.c index 85dc3b1dc309..534ffa0f616e 100644 --- a/drivers/net/chelsio/vsc7326.c +++ b/drivers/net/chelsio/vsc7326.c | |||
@@ -226,22 +226,21 @@ static void run_table(adapter_t *adapter, struct init_table *ib, int len) | |||
226 | if (ib[i].addr == INITBLOCK_SLEEP) { | 226 | if (ib[i].addr == INITBLOCK_SLEEP) { |
227 | udelay( ib[i].data ); | 227 | udelay( ib[i].data ); |
228 | CH_ERR("sleep %d us\n",ib[i].data); | 228 | CH_ERR("sleep %d us\n",ib[i].data); |
229 | } else { | 229 | } else |
230 | vsc_write( adapter, ib[i].addr, ib[i].data ); | 230 | vsc_write( adapter, ib[i].addr, ib[i].data ); |
231 | } | ||
232 | } | 231 | } |
233 | } | 232 | } |
234 | 233 | ||
235 | static int bist_rd(adapter_t *adapter, int moduleid, int address) | 234 | static int bist_rd(adapter_t *adapter, int moduleid, int address) |
236 | { | 235 | { |
237 | int data=0; | 236 | int data = 0; |
238 | u32 result=0; | 237 | u32 result = 0; |
239 | 238 | ||
240 | if( (address != 0x0) && | 239 | if ((address != 0x0) && |
241 | (address != 0x1) && | 240 | (address != 0x1) && |
242 | (address != 0x2) && | 241 | (address != 0x2) && |
243 | (address != 0xd) && | 242 | (address != 0xd) && |
244 | (address != 0xe)) | 243 | (address != 0xe)) |
245 | CH_ERR("No bist address: 0x%x\n", address); | 244 | CH_ERR("No bist address: 0x%x\n", address); |
246 | 245 | ||
247 | data = ((0x00 << 24) | ((address & 0xff) << 16) | (0x00 << 8) | | 246 | data = ((0x00 << 24) | ((address & 0xff) << 16) | (0x00 << 8) | |
@@ -251,27 +250,27 @@ static int bist_rd(adapter_t *adapter, int moduleid, int address) | |||
251 | udelay(10); | 250 | udelay(10); |
252 | 251 | ||
253 | vsc_read(adapter, REG_RAM_BIST_RESULT, &result); | 252 | vsc_read(adapter, REG_RAM_BIST_RESULT, &result); |
254 | if((result & (1<<9)) != 0x0) | 253 | if ((result & (1 << 9)) != 0x0) |
255 | CH_ERR("Still in bist read: 0x%x\n", result); | 254 | CH_ERR("Still in bist read: 0x%x\n", result); |
256 | else if((result & (1<<8)) != 0x0) | 255 | else if ((result & (1 << 8)) != 0x0) |
257 | CH_ERR("bist read error: 0x%x\n", result); | 256 | CH_ERR("bist read error: 0x%x\n", result); |
258 | 257 | ||
259 | return(result & 0xff); | 258 | return (result & 0xff); |
260 | } | 259 | } |
261 | 260 | ||
262 | static int bist_wr(adapter_t *adapter, int moduleid, int address, int value) | 261 | static int bist_wr(adapter_t *adapter, int moduleid, int address, int value) |
263 | { | 262 | { |
264 | int data=0; | 263 | int data = 0; |
265 | u32 result=0; | 264 | u32 result = 0; |
266 | 265 | ||
267 | if( (address != 0x0) && | 266 | if ((address != 0x0) && |
268 | (address != 0x1) && | 267 | (address != 0x1) && |
269 | (address != 0x2) && | 268 | (address != 0x2) && |
270 | (address != 0xd) && | 269 | (address != 0xd) && |
271 | (address != 0xe)) | 270 | (address != 0xe)) |
272 | CH_ERR("No bist address: 0x%x\n", address); | 271 | CH_ERR("No bist address: 0x%x\n", address); |
273 | 272 | ||
274 | if( value>255 ) | 273 | if (value > 255) |
275 | CH_ERR("Suspicious write out of range value: 0x%x\n", value); | 274 | CH_ERR("Suspicious write out of range value: 0x%x\n", value); |
276 | 275 | ||
277 | data = ((0x01 << 24) | ((address & 0xff) << 16) | (value << 8) | | 276 | data = ((0x01 << 24) | ((address & 0xff) << 16) | (value << 8) | |
@@ -281,12 +280,12 @@ static int bist_wr(adapter_t *adapter, int moduleid, int address, int value) | |||
281 | udelay(5); | 280 | udelay(5); |
282 | 281 | ||
283 | vsc_read(adapter, REG_RAM_BIST_CMD, &result); | 282 | vsc_read(adapter, REG_RAM_BIST_CMD, &result); |
284 | if((result & (1<<27)) != 0x0) | 283 | if ((result & (1 << 27)) != 0x0) |
285 | CH_ERR("Still in bist write: 0x%x\n", result); | 284 | CH_ERR("Still in bist write: 0x%x\n", result); |
286 | else if((result & (1<<26)) != 0x0) | 285 | else if ((result & (1 << 26)) != 0x0) |
287 | CH_ERR("bist write error: 0x%x\n", result); | 286 | CH_ERR("bist write error: 0x%x\n", result); |
288 | 287 | ||
289 | return(0); | 288 | return 0; |
290 | } | 289 | } |
291 | 290 | ||
292 | static int run_bist(adapter_t *adapter, int moduleid) | 291 | static int run_bist(adapter_t *adapter, int moduleid) |
@@ -295,7 +294,7 @@ static int run_bist(adapter_t *adapter, int moduleid) | |||
295 | (void) bist_wr(adapter,moduleid, 0x00, 0x02); | 294 | (void) bist_wr(adapter,moduleid, 0x00, 0x02); |
296 | (void) bist_wr(adapter,moduleid, 0x01, 0x01); | 295 | (void) bist_wr(adapter,moduleid, 0x01, 0x01); |
297 | 296 | ||
298 | return(0); | 297 | return 0; |
299 | } | 298 | } |
300 | 299 | ||
301 | static int check_bist(adapter_t *adapter, int moduleid) | 300 | static int check_bist(adapter_t *adapter, int moduleid) |
@@ -309,27 +308,26 @@ static int check_bist(adapter_t *adapter, int moduleid) | |||
309 | if ((result & 3) != 0x3) | 308 | if ((result & 3) != 0x3) |
310 | CH_ERR("Result: 0x%x BIST error in ram %d, column: 0x%04x\n", | 309 | CH_ERR("Result: 0x%x BIST error in ram %d, column: 0x%04x\n", |
311 | result, moduleid, column); | 310 | result, moduleid, column); |
312 | return(0); | 311 | return 0; |
313 | } | 312 | } |
314 | 313 | ||
315 | static int enable_mem(adapter_t *adapter, int moduleid) | 314 | static int enable_mem(adapter_t *adapter, int moduleid) |
316 | { | 315 | { |
317 | /*enable mem*/ | 316 | /*enable mem*/ |
318 | (void) bist_wr(adapter,moduleid, 0x00, 0x00); | 317 | (void) bist_wr(adapter,moduleid, 0x00, 0x00); |
319 | return(0); | 318 | return 0; |
320 | } | 319 | } |
321 | 320 | ||
322 | static int run_bist_all(adapter_t *adapter) | 321 | static int run_bist_all(adapter_t *adapter) |
323 | { | 322 | { |
324 | int port=0; | 323 | int port = 0; |
325 | u32 val=0; | 324 | u32 val = 0; |
326 | 325 | ||
327 | vsc_write(adapter, REG_MEM_BIST, 0x5); | 326 | vsc_write(adapter, REG_MEM_BIST, 0x5); |
328 | vsc_read(adapter, REG_MEM_BIST, &val); | 327 | vsc_read(adapter, REG_MEM_BIST, &val); |
329 | 328 | ||
330 | for(port=0; port<12; port++){ | 329 | for (port = 0; port < 12; port++) |
331 | vsc_write(adapter, REG_DEV_SETUP(port), 0x0); | 330 | vsc_write(adapter, REG_DEV_SETUP(port), 0x0); |
332 | } | ||
333 | 331 | ||
334 | udelay(300); | 332 | udelay(300); |
335 | vsc_write(adapter, REG_SPI4_MISC, 0x00040409); | 333 | vsc_write(adapter, REG_SPI4_MISC, 0x00040409); |
@@ -352,13 +350,13 @@ static int run_bist_all(adapter_t *adapter) | |||
352 | udelay(300); | 350 | udelay(300); |
353 | vsc_write(adapter, REG_SPI4_MISC, 0x60040400); | 351 | vsc_write(adapter, REG_SPI4_MISC, 0x60040400); |
354 | udelay(300); | 352 | udelay(300); |
355 | for(port=0; port<12; port++){ | 353 | for (port = 0; port < 12; port++) |
356 | vsc_write(adapter, REG_DEV_SETUP(port), 0x1); | 354 | vsc_write(adapter, REG_DEV_SETUP(port), 0x1); |
357 | } | 355 | |
358 | udelay(300); | 356 | udelay(300); |
359 | vsc_write(adapter, REG_MEM_BIST, 0x0); | 357 | vsc_write(adapter, REG_MEM_BIST, 0x0); |
360 | mdelay(10); | 358 | mdelay(10); |
361 | return(0); | 359 | return 0; |
362 | } | 360 | } |
363 | 361 | ||
364 | static int mac_intr_handler(struct cmac *mac) | 362 | static int mac_intr_handler(struct cmac *mac) |
@@ -591,40 +589,46 @@ static void rmon_update(struct cmac *mac, unsigned int addr, u64 *stat) | |||
591 | 589 | ||
592 | static void port_stats_update(struct cmac *mac) | 590 | static void port_stats_update(struct cmac *mac) |
593 | { | 591 | { |
594 | int port = mac->instance->index; | 592 | struct { |
593 | unsigned int reg; | ||
594 | unsigned int offset; | ||
595 | } hw_stats[] = { | ||
596 | |||
597 | #define HW_STAT(reg, stat_name) \ | ||
598 | { reg, (&((struct cmac_statistics *)NULL)->stat_name) - (u64 *)NULL } | ||
599 | |||
600 | /* Rx stats */ | ||
601 | HW_STAT(RxUnicast, RxUnicastFramesOK), | ||
602 | HW_STAT(RxMulticast, RxMulticastFramesOK), | ||
603 | HW_STAT(RxBroadcast, RxBroadcastFramesOK), | ||
604 | HW_STAT(Crc, RxFCSErrors), | ||
605 | HW_STAT(RxAlignment, RxAlignErrors), | ||
606 | HW_STAT(RxOversize, RxFrameTooLongErrors), | ||
607 | HW_STAT(RxPause, RxPauseFrames), | ||
608 | HW_STAT(RxJabbers, RxJabberErrors), | ||
609 | HW_STAT(RxFragments, RxRuntErrors), | ||
610 | HW_STAT(RxUndersize, RxRuntErrors), | ||
611 | HW_STAT(RxSymbolCarrier, RxSymbolErrors), | ||
612 | HW_STAT(RxSize1519ToMax, RxJumboFramesOK), | ||
613 | |||
614 | /* Tx stats (skip collision stats as we are full-duplex only) */ | ||
615 | HW_STAT(TxUnicast, TxUnicastFramesOK), | ||
616 | HW_STAT(TxMulticast, TxMulticastFramesOK), | ||
617 | HW_STAT(TxBroadcast, TxBroadcastFramesOK), | ||
618 | HW_STAT(TxPause, TxPauseFrames), | ||
619 | HW_STAT(TxUnderrun, TxUnderrun), | ||
620 | HW_STAT(TxSize1519ToMax, TxJumboFramesOK), | ||
621 | }, *p = hw_stats; | ||
622 | unsigned int port = mac->instance->index; | ||
623 | u64 *stats = (u64 *)&mac->stats; | ||
624 | unsigned int i; | ||
625 | |||
626 | for (i = 0; i < ARRAY_SIZE(hw_stats); i++) | ||
627 | rmon_update(mac, CRA(0x4, port, p->reg), stats + p->offset); | ||
595 | 628 | ||
596 | /* Rx stats */ | 629 | rmon_update(mac, REG_TX_OK_BYTES(port), &mac->stats.TxOctetsOK); |
597 | rmon_update(mac, REG_RX_OK_BYTES(port), &mac->stats.RxOctetsOK); | 630 | rmon_update(mac, REG_RX_OK_BYTES(port), &mac->stats.RxOctetsOK); |
598 | rmon_update(mac, REG_RX_BAD_BYTES(port), &mac->stats.RxOctetsBad); | 631 | rmon_update(mac, REG_RX_BAD_BYTES(port), &mac->stats.RxOctetsBad); |
599 | rmon_update(mac, REG_RX_UNICAST(port), &mac->stats.RxUnicastFramesOK); | ||
600 | rmon_update(mac, REG_RX_MULTICAST(port), | ||
601 | &mac->stats.RxMulticastFramesOK); | ||
602 | rmon_update(mac, REG_RX_BROADCAST(port), | ||
603 | &mac->stats.RxBroadcastFramesOK); | ||
604 | rmon_update(mac, REG_CRC(port), &mac->stats.RxFCSErrors); | ||
605 | rmon_update(mac, REG_RX_ALIGNMENT(port), &mac->stats.RxAlignErrors); | ||
606 | rmon_update(mac, REG_RX_OVERSIZE(port), | ||
607 | &mac->stats.RxFrameTooLongErrors); | ||
608 | rmon_update(mac, REG_RX_PAUSE(port), &mac->stats.RxPauseFrames); | ||
609 | rmon_update(mac, REG_RX_JABBERS(port), &mac->stats.RxJabberErrors); | ||
610 | rmon_update(mac, REG_RX_FRAGMENTS(port), &mac->stats.RxRuntErrors); | ||
611 | rmon_update(mac, REG_RX_UNDERSIZE(port), &mac->stats.RxRuntErrors); | ||
612 | rmon_update(mac, REG_RX_SYMBOL_CARRIER(port), | ||
613 | &mac->stats.RxSymbolErrors); | ||
614 | rmon_update(mac, REG_RX_SIZE_1519_TO_MAX(port), | ||
615 | &mac->stats.RxJumboFramesOK); | ||
616 | |||
617 | /* Tx stats (skip collision stats as we are full-duplex only) */ | ||
618 | rmon_update(mac, REG_TX_OK_BYTES(port), &mac->stats.TxOctetsOK); | ||
619 | rmon_update(mac, REG_TX_UNICAST(port), &mac->stats.TxUnicastFramesOK); | ||
620 | rmon_update(mac, REG_TX_MULTICAST(port), | ||
621 | &mac->stats.TxMulticastFramesOK); | ||
622 | rmon_update(mac, REG_TX_BROADCAST(port), | ||
623 | &mac->stats.TxBroadcastFramesOK); | ||
624 | rmon_update(mac, REG_TX_PAUSE(port), &mac->stats.TxPauseFrames); | ||
625 | rmon_update(mac, REG_TX_UNDERRUN(port), &mac->stats.TxUnderrun); | ||
626 | rmon_update(mac, REG_TX_SIZE_1519_TO_MAX(port), | ||
627 | &mac->stats.TxJumboFramesOK); | ||
628 | } | 632 | } |
629 | 633 | ||
630 | /* | 634 | /* |
@@ -686,7 +690,8 @@ static struct cmac *vsc7326_mac_create(adapter_t *adapter, int index) | |||
686 | int i; | 690 | int i; |
687 | 691 | ||
688 | mac = kzalloc(sizeof(*mac) + sizeof(cmac_instance), GFP_KERNEL); | 692 | mac = kzalloc(sizeof(*mac) + sizeof(cmac_instance), GFP_KERNEL); |
689 | if (!mac) return NULL; | 693 | if (!mac) |
694 | return NULL; | ||
690 | 695 | ||
691 | mac->ops = &vsc7326_ops; | 696 | mac->ops = &vsc7326_ops; |
692 | mac->instance = (cmac_instance *)(mac + 1); | 697 | mac->instance = (cmac_instance *)(mac + 1); |