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path: root/drivers/net/chelsio/subr.c
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Diffstat (limited to 'drivers/net/chelsio/subr.c')
-rw-r--r--drivers/net/chelsio/subr.c89
1 files changed, 45 insertions, 44 deletions
diff --git a/drivers/net/chelsio/subr.c b/drivers/net/chelsio/subr.c
index 22ed9a383c08..c2522cdfab37 100644
--- a/drivers/net/chelsio/subr.c
+++ b/drivers/net/chelsio/subr.c
@@ -223,13 +223,13 @@ static int fpga_slow_intr(adapter_t *adapter)
223 t1_sge_intr_error_handler(adapter->sge); 223 t1_sge_intr_error_handler(adapter->sge);
224 224
225 if (cause & FPGA_PCIX_INTERRUPT_GMAC) 225 if (cause & FPGA_PCIX_INTERRUPT_GMAC)
226 fpga_phy_intr_handler(adapter); 226 fpga_phy_intr_handler(adapter);
227 227
228 if (cause & FPGA_PCIX_INTERRUPT_TP) { 228 if (cause & FPGA_PCIX_INTERRUPT_TP) {
229 /* 229 /*
230 * FPGA doesn't support MC4 interrupts and it requires 230 * FPGA doesn't support MC4 interrupts and it requires
231 * this odd layer of indirection for MC5. 231 * this odd layer of indirection for MC5.
232 */ 232 */
233 u32 tp_cause = readl(adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE); 233 u32 tp_cause = readl(adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE);
234 234
235 /* Clear TP interrupt */ 235 /* Clear TP interrupt */
@@ -262,8 +262,7 @@ static int mi1_wait_until_ready(adapter_t *adapter, int mi1_reg)
262 udelay(10); 262 udelay(10);
263 } while (busy && --attempts); 263 } while (busy && --attempts);
264 if (busy) 264 if (busy)
265 CH_ALERT("%s: MDIO operation timed out\n", 265 CH_ALERT("%s: MDIO operation timed out\n", adapter->name);
266 adapter->name);
267 return busy; 266 return busy;
268} 267}
269 268
@@ -605,22 +604,23 @@ int t1_elmer0_ext_intr_handler(adapter_t *adapter)
605 604
606 switch (board_info(adapter)->board) { 605 switch (board_info(adapter)->board) {
607#ifdef CONFIG_CHELSIO_T1_1G 606#ifdef CONFIG_CHELSIO_T1_1G
608 case CHBT_BOARD_CHT204: 607 case CHBT_BOARD_CHT204:
609 case CHBT_BOARD_CHT204E: 608 case CHBT_BOARD_CHT204E:
610 case CHBT_BOARD_CHN204: 609 case CHBT_BOARD_CHN204:
611 case CHBT_BOARD_CHT204V: { 610 case CHBT_BOARD_CHT204V: {
612 int i, port_bit; 611 int i, port_bit;
613 for_each_port(adapter, i) { 612 for_each_port(adapter, i) {
614 port_bit = i + 1; 613 port_bit = i + 1;
615 if (!(cause & (1 << port_bit))) continue; 614 if (!(cause & (1 << port_bit)))
615 continue;
616 616
617 phy = adapter->port[i].phy; 617 phy = adapter->port[i].phy;
618 phy_cause = phy->ops->interrupt_handler(phy); 618 phy_cause = phy->ops->interrupt_handler(phy);
619 if (phy_cause & cphy_cause_link_change) 619 if (phy_cause & cphy_cause_link_change)
620 t1_link_changed(adapter, i); 620 t1_link_changed(adapter, i);
621 } 621 }
622 break; 622 break;
623 } 623 }
624 case CHBT_BOARD_CHT101: 624 case CHBT_BOARD_CHT101:
625 if (cause & ELMER0_GP_BIT1) { /* Marvell 88E1111 interrupt */ 625 if (cause & ELMER0_GP_BIT1) { /* Marvell 88E1111 interrupt */
626 phy = adapter->port[0].phy; 626 phy = adapter->port[0].phy;
@@ -631,13 +631,13 @@ int t1_elmer0_ext_intr_handler(adapter_t *adapter)
631 break; 631 break;
632 case CHBT_BOARD_7500: { 632 case CHBT_BOARD_7500: {
633 int p; 633 int p;
634 /* 634 /*
635 * Elmer0's interrupt cause isn't useful here because there is 635 * Elmer0's interrupt cause isn't useful here because there is
636 * only one bit that can be set for all 4 ports. This means 636 * only one bit that can be set for all 4 ports. This means
637 * we are forced to check every PHY's interrupt status 637 * we are forced to check every PHY's interrupt status
638 * register to see who initiated the interrupt. 638 * register to see who initiated the interrupt.
639 */ 639 */
640 for_each_port(adapter, p) { 640 for_each_port(adapter, p) {
641 phy = adapter->port[p].phy; 641 phy = adapter->port[p].phy;
642 phy_cause = phy->ops->interrupt_handler(phy); 642 phy_cause = phy->ops->interrupt_handler(phy);
643 if (phy_cause & cphy_cause_link_change) 643 if (phy_cause & cphy_cause_link_change)
@@ -658,7 +658,7 @@ int t1_elmer0_ext_intr_handler(adapter_t *adapter)
658 break; 658 break;
659 case CHBT_BOARD_8000: 659 case CHBT_BOARD_8000:
660 case CHBT_BOARD_CHT110: 660 case CHBT_BOARD_CHT110:
661 CH_DBG(adapter, INTR, "External interrupt cause 0x%x\n", 661 CH_DBG(adapter, INTR, "External interrupt cause 0x%x\n",
662 cause); 662 cause);
663 if (cause & ELMER0_GP_BIT1) { /* PMC3393 INTB */ 663 if (cause & ELMER0_GP_BIT1) { /* PMC3393 INTB */
664 struct cmac *mac = adapter->port[0].mac; 664 struct cmac *mac = adapter->port[0].mac;
@@ -670,9 +670,9 @@ int t1_elmer0_ext_intr_handler(adapter_t *adapter)
670 670
671 t1_tpi_read(adapter, 671 t1_tpi_read(adapter,
672 A_ELMER0_GPI_STAT, &mod_detect); 672 A_ELMER0_GPI_STAT, &mod_detect);
673 CH_MSG(adapter, INFO, LINK, "XPAK %s\n", 673 CH_MSG(adapter, INFO, LINK, "XPAK %s\n",
674 mod_detect ? "removed" : "inserted"); 674 mod_detect ? "removed" : "inserted");
675 } 675 }
676 break; 676 break;
677#ifdef CONFIG_CHELSIO_T1_COUGAR 677#ifdef CONFIG_CHELSIO_T1_COUGAR
678 case CHBT_BOARD_COUGAR: 678 case CHBT_BOARD_COUGAR:
@@ -688,7 +688,8 @@ int t1_elmer0_ext_intr_handler(adapter_t *adapter)
688 688
689 for_each_port(adapter, i) { 689 for_each_port(adapter, i) {
690 port_bit = i ? i + 1 : 0; 690 port_bit = i ? i + 1 : 0;
691 if (!(cause & (1 << port_bit))) continue; 691 if (!(cause & (1 << port_bit)))
692 continue;
692 693
693 phy = adapter->port[i].phy; 694 phy = adapter->port[i].phy;
694 phy_cause = phy->ops->interrupt_handler(phy); 695 phy_cause = phy->ops->interrupt_handler(phy);
@@ -755,7 +756,7 @@ void t1_interrupts_disable(adapter_t* adapter)
755 756
756 /* Disable PCIX & external chip interrupts. */ 757 /* Disable PCIX & external chip interrupts. */
757 if (t1_is_asic(adapter)) 758 if (t1_is_asic(adapter))
758 writel(0, adapter->regs + A_PL_ENABLE); 759 writel(0, adapter->regs + A_PL_ENABLE);
759 760
760 /* PCI-X interrupts */ 761 /* PCI-X interrupts */
761 pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_ENABLE, 0); 762 pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_ENABLE, 0);
@@ -830,11 +831,11 @@ int t1_slow_intr_handler(adapter_t *adapter)
830/* Power sequencing is a work-around for Intel's XPAKs. */ 831/* Power sequencing is a work-around for Intel's XPAKs. */
831static void power_sequence_xpak(adapter_t* adapter) 832static void power_sequence_xpak(adapter_t* adapter)
832{ 833{
833 u32 mod_detect; 834 u32 mod_detect;
834 u32 gpo; 835 u32 gpo;
835 836
836 /* Check for XPAK */ 837 /* Check for XPAK */
837 t1_tpi_read(adapter, A_ELMER0_GPI_STAT, &mod_detect); 838 t1_tpi_read(adapter, A_ELMER0_GPI_STAT, &mod_detect);
838 if (!(ELMER0_GP_BIT5 & mod_detect)) { 839 if (!(ELMER0_GP_BIT5 & mod_detect)) {
839 /* XPAK is present */ 840 /* XPAK is present */
840 t1_tpi_read(adapter, A_ELMER0_GPO, &gpo); 841 t1_tpi_read(adapter, A_ELMER0_GPO, &gpo);
@@ -877,31 +878,31 @@ static int board_init(adapter_t *adapter, const struct board_info *bi)
877 case CHBT_BOARD_N210: 878 case CHBT_BOARD_N210:
878 case CHBT_BOARD_CHT210: 879 case CHBT_BOARD_CHT210:
879 case CHBT_BOARD_COUGAR: 880 case CHBT_BOARD_COUGAR:
880 t1_tpi_par(adapter, 0xf); 881 t1_tpi_par(adapter, 0xf);
881 t1_tpi_write(adapter, A_ELMER0_GPO, 0x800); 882 t1_tpi_write(adapter, A_ELMER0_GPO, 0x800);
882 break; 883 break;
883 case CHBT_BOARD_CHT110: 884 case CHBT_BOARD_CHT110:
884 t1_tpi_par(adapter, 0xf); 885 t1_tpi_par(adapter, 0xf);
885 t1_tpi_write(adapter, A_ELMER0_GPO, 0x1800); 886 t1_tpi_write(adapter, A_ELMER0_GPO, 0x1800);
886 887
887 /* TBD XXX Might not need. This fixes a problem 888 /* TBD XXX Might not need. This fixes a problem
888 * described in the Intel SR XPAK errata. 889 * described in the Intel SR XPAK errata.
889 */ 890 */
890 power_sequence_xpak(adapter); 891 power_sequence_xpak(adapter);
891 break; 892 break;
892#ifdef CONFIG_CHELSIO_T1_1G 893#ifdef CONFIG_CHELSIO_T1_1G
893 case CHBT_BOARD_CHT204E: 894 case CHBT_BOARD_CHT204E:
894 /* add config space write here */ 895 /* add config space write here */
895 case CHBT_BOARD_CHT204: 896 case CHBT_BOARD_CHT204:
896 case CHBT_BOARD_CHT204V: 897 case CHBT_BOARD_CHT204V:
897 case CHBT_BOARD_CHN204: 898 case CHBT_BOARD_CHN204:
898 t1_tpi_par(adapter, 0xf); 899 t1_tpi_par(adapter, 0xf);
899 t1_tpi_write(adapter, A_ELMER0_GPO, 0x804); 900 t1_tpi_write(adapter, A_ELMER0_GPO, 0x804);
900 break; 901 break;
901 case CHBT_BOARD_CHT101: 902 case CHBT_BOARD_CHT101:
902 case CHBT_BOARD_7500: 903 case CHBT_BOARD_7500:
903 t1_tpi_par(adapter, 0xf); 904 t1_tpi_par(adapter, 0xf);
904 t1_tpi_write(adapter, A_ELMER0_GPO, 0x1804); 905 t1_tpi_write(adapter, A_ELMER0_GPO, 0x1804);
905 break; 906 break;
906#endif 907#endif
907 } 908 }
@@ -941,7 +942,7 @@ int t1_init_hw_modules(adapter_t *adapter)
941 goto out_err; 942 goto out_err;
942 943
943 err = 0; 944 err = 0;
944 out_err: 945out_err:
945 return err; 946 return err;
946} 947}
947 948
@@ -983,7 +984,7 @@ void t1_free_sw_modules(adapter_t *adapter)
983 if (adapter->espi) 984 if (adapter->espi)
984 t1_espi_destroy(adapter->espi); 985 t1_espi_destroy(adapter->espi);
985#ifdef CONFIG_CHELSIO_T1_COUGAR 986#ifdef CONFIG_CHELSIO_T1_COUGAR
986 if (adapter->cspi) 987 if (adapter->cspi)
987 t1_cspi_destroy(adapter->cspi); 988 t1_cspi_destroy(adapter->cspi);
988#endif 989#endif
989} 990}
@@ -1010,7 +1011,7 @@ static void __devinit init_link_config(struct link_config *lc,
1010 CH_ERR("%s: CSPI initialization failed\n", 1011 CH_ERR("%s: CSPI initialization failed\n",
1011 adapter->name); 1012 adapter->name);
1012 goto error; 1013 goto error;
1013 } 1014 }
1014#endif 1015#endif
1015 1016
1016/* 1017/*